Patents by Inventor Steven Licking
Steven Licking has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240056348Abstract: A method of identifying a failed egress path of a hardware forwarding element. The method detects an egress link failure in a data plane of the forwarding element. The method generates a link failure signal in the data plane identifying the failed egress link. The method generates a packet that includes the identification of the egress link based on the link failure signal. The method sets the status of the egress link to failed in the data plane based on the identification of the egress link in the generated packet.Type: ApplicationFiled: October 26, 2023Publication date: February 15, 2024Applicant: Barefoot Networks, Inc.Inventors: Chaitanya KODEBOYINA, John CRUZ, Steven LICKING, Michael E. ATTIG
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Publication number: 20220321400Abstract: A method of identifying a failed egress path of a hardware forwarding element. The method detects an egress link failure in a data plane of the forwarding element. The method generates a link failure signal in the data plane identifying the failed egress link. The method generates a packet that includes the identification of the egress link based on the link failure signal. The method sets the status of the egress link to failed in the data plane based on the identification of the egress link in the generated packet.Type: ApplicationFiled: April 18, 2022Publication date: October 6, 2022Inventors: Chaitanya KODEBOYINA, John CRUZ, Steven LICKING, Michael E. ATTIG
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Patent number: 11310099Abstract: A method of identifying a failed egress path of a hardware forwarding element. The method detects an egress link failure in a data plane of the forwarding element. The method generates a link failure signal in the data plane identifying the failed egress link. The method generates a packet that includes the identification of the egress link based on the link failure signal. The method sets the status of the egress link to failed in the data plane based on the identification of the egress link in the generated packet.Type: GrantFiled: June 16, 2020Date of Patent: April 19, 2022Assignee: Barefoot Networks, Inc.Inventors: Chaitanya Kodeboyina, John Cruz, Steven Licking, Michael E. Attig
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Patent number: 11258685Abstract: A method of performing bidirectional forwarding detection (BFD) by a hardware forwarding element that includes a set of ingress pipelines and a set of egress pipelines. Each ingress pipeline includes a packet generator. A packet generator in a first pipeline periodically generates a pair of packets to monitor the health of a particular egress link. The pair includes a BFD transmit packet and a BFD dummy transmit packet. The method forwards each dummy BFD transmit packet to a first egress pipeline and increments a counter at the first egress pipeline. Each BFD packet is transmitted through the particular egress link to a network node. BFD packets received from the network node are forwarded to the first egress pipeline and the value of the counter is rest. The method marks the particular egress link as failed when the value of the counter exceeds a predetermined threshold.Type: GrantFiled: July 1, 2018Date of Patent: February 22, 2022Assignee: Barefoot Networks, Inc.Inventors: Steven Licking, Chaitanya Kodeboyina, Julianne Zhu, Changhoon Kim
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Patent number: 11258703Abstract: Some embodiments provide a data-plane forwarding circuit that can be configured to learn about a new message flow and to maintain metadata about the new message flow without first having a control plane first configure the data plane to maintain metadata about the flow. To perform its forwarding operations, the data plane includes several data message processing stages that are configured to process the data tuples associated with the data messages received by the data plane. In some embodiments, parts of the data plane message-processing stages are also configured to operate as a flow-tracking circuit that includes (1) a flow-identifying circuit to identify message flows received by the data plane, and (2) a first set of storages to store metadata about the identified flows.Type: GrantFiled: March 21, 2018Date of Patent: February 22, 2022Assignee: Barefoot Networks, Inc.Inventors: Steven Licking, Jeongkeun Lee, Patrick Bosshart, Anurag Agrawal, Michael Gregory Ferrara, Jay Evan Scott Peterson
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Patent number: 11076026Abstract: A method of generating packets in the data plane of a forwarding element is provided. The method selects a configuration set from a plurality of configuration sets of based on a triggering event. The method generates a set of packets using a packet template that corresponds to the selected configuration set. The method sets values of a plurality of the packet fields to identify different information such as the destination of packets. The method places the generated set of packets into an ingress pipeline of the forwarding element.Type: GrantFiled: July 30, 2018Date of Patent: July 27, 2021Assignee: Barefoot Networks, Inc.Inventors: Steven Licking, Chaitanya Kodeboyina, Julianne Zhu, Changhoon Kim
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Patent number: 10873534Abstract: Some embodiments provide a data-plane forwarding circuit that can be configured to learn about a new message flow and to maintain metadata about the new message flow without first having a control plane first configure the data plane to maintain metadata about the flow. To perform its forwarding operations, the data plane includes several data message processing stages that are configured to process the data tuples associated with the data messages received by the data plane. In some embodiments, parts of the data plane message-processing stages are also configured to operate as a flow-tracking circuit that includes (1) a flow-identifying circuit to identify message flows received by the data plane, and (2) a first set of storages to store metadata about the identified flows.Type: GrantFiled: March 21, 2018Date of Patent: December 22, 2020Assignee: Barefoot Networks, Inc.Inventors: Michael Gregory Ferrara, Jay Evan Scott Peterson, Steven Licking, Jeongkeun Lee, Patrick Bosshart, Anurag Agrawal
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Patent number: 10819633Abstract: A synchronous packet-processing pipeline whose data paths are populated with data-plane stateful processing units (DSPUs) is provided. A DSPU is a programmable processor whose operations are synchronous with the dataflow of the packet-processing pipeline. A DSPU performs every computation with fixed latency. Each DSPU is capable of maintaining a set of states and perform its computations based on its maintained set of states. The programming of a DSPU determines how and when the DSPU updates one of its maintained states. Such programming may configure the DSPU to update the state based on its received packet data, or to change the state regardless of the received packet data.Type: GrantFiled: February 4, 2018Date of Patent: October 27, 2020Assignee: Barefoot Networks, Inc.Inventors: Changhoon Kim, Steven Licking, Anirudh Sivaraman Kaushalram, Chaitanya Kodeboyina
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Publication number: 20200313955Abstract: A method of identifying a failed egress path of a hardware forwarding element. The method detects an egress link failure in a data plane of the forwarding element. The method generates a link failure signal in the data plane identifying the failed egress link. The method generates a packet that includes the identification of the egress link based on the link failure signal. The method sets the status of the egress link to failed in the data plane based on the identification of the egress link in the generated packet.Type: ApplicationFiled: June 16, 2020Publication date: October 1, 2020Inventors: Chaitanya Kodeboyina, John Cruz, Steven Licking, Michael E. ATTIG
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Publication number: 20200204501Abstract: A synchronous packet-processing pipeline whose data paths are populated with data-plane stateful processing units (DSPUs) is provided. A DSPU is a programmable processor whose operations are synchronous with the dataflow of the packet-processing pipeline. A DSPU performs every computation with fixed latency. Each DSPU is capable of maintaining a set of states and perform its computations based on its maintained set of states. The programming of a DSPU determines how and when the DSPU updates one of its maintained states. Such programming may configure the DSPU to update the state based on its received packet data, or to change the state regardless of the received packet data.Type: ApplicationFiled: February 28, 2020Publication date: June 25, 2020Inventors: Changhoon KIM, Patrick BOSSHART, Jay Evan Scott PETERSON, Michael Gregory FERRARA, Steven Licking, Chaitanya Kodeboyina
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Patent number: 10686658Abstract: A method of incremental updating of a network forwarding element that includes (i) a set of data plane circuits with a set of ingress buffers and a group of configurable packet processing stages and (ii) a set of control plane circuits comprising a set of direct memory access (DMA) buffers. Configuration data for reconfiguring the data plane packet processing stages is loaded into the DMA buffers while the packet processing stages are processing the packets. The ingress buffers are configured to (i) pause sending the packets to the processing stages and (ii) continue storing the incoming packets while sending the data plane packets to the processing stages is paused. The configuration data is loaded from the DMA buffers into the packet processing stages. The ingress buffers are configured to resume sending the data packet plane packets to the packet processing stages.Type: GrantFiled: December 13, 2018Date of Patent: June 16, 2020Assignee: Barefoot Networks, Inc.Inventors: Gregory C. Watson, Julianne Zhu, Ravindra Sunkad, Steven Licking, Sachin Bahadur
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Patent number: 10645029Abstract: Some embodiments of the invention provide a network forwarding element that includes a set of data plane circuits with several configurable packet processing stages for receiving and processing incoming packet traffic to the forwarding element. The forwarding element also includes a set of control plane circuits that include a set of direct memory access (DMA) buffers for configuring the configurable packet processing stages of the data plane. The control plane loads configuration data for reconfiguring the data plane packet processing stages into the set of DMA buffers while the data plane packet processing stages are processing the incoming packet traffic. The control plane pauses the incoming packet traffic to the data plane packet processing stages. The control plane loads the configuration data from the DMA buffers into the data plane packet processing stages. The control plane resumes the incoming packet traffic to the data plane packet processing stages.Type: GrantFiled: August 21, 2017Date of Patent: May 5, 2020Assignee: Barefoot Networks, Inc.Inventors: Gregory C. Watson, Julianne Zhu, Ravindra Sunkad, Steven Licking, Sachin Bahadur
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Patent number: 10616101Abstract: Some embodiments provide a data-plane forwarding circuit that can be configured to learn about a new message flow and to maintain metadata about the new message flow without first having a control plane first configure the data plane to maintain metadata about the flow. To perform its forwarding operations, the data plane includes several data message processing stages that are configured to process the data tuples associated with the data messages received by the data plane. In some embodiments, parts of the data plane message-processing stages are also configured to operate as a flow-tracking circuit that includes (1) a flow-identifying circuit to identify message flows received by the data plane, and (2) a first set of storages to store metadata about the identified flows.Type: GrantFiled: March 21, 2018Date of Patent: April 7, 2020Assignee: Barefoot Networks, Inc.Inventors: Jay Evan Scott Peterson, Steven Licking, Jeongkeun Lee, Patrick Bosshart, Anurag Agrawal, Michael Gregory Ferrara
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Patent number: 10164829Abstract: A method of incremental updating of a network forwarding element that includes (i) a set of data plane circuits with a set of ingress buffers and a group of configurable packet processing stages and (ii) a set of control plane circuits comprising a set of direct memory access (DMA) buffers. Configuration data for reconfiguring the data plane packet processing stages is loaded into the DMA buffers while the packet processing stages are processing the packets. The ingress buffers are configured to (i) pause sending the packets to the processing stages and (ii) continue storing the incoming packets while sending the data plane packets to the processing stages is paused. The configuration data is loaded from the DMA buffers into the packet processing stages. The ingress buffers are configured to resume sending the data packet plane packets to the packet processing stages.Type: GrantFiled: August 21, 2017Date of Patent: December 25, 2018Assignee: BAREFOOT NETWORKS, INC.Inventors: Gregory C. Watson, Julianne Zhu, Ravindra Sunkad, Steven Licking, Sachin Bahadur
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Patent number: 10075567Abstract: A method of generating packets in the data plane of a forwarding element is provided. The method selects a configuration set from a plurality of configuration sets of based on a triggering event. The method generates a set of packets using a packet template that corresponds to the selected configuration set. The method sets values of a plurality of the packet fields to identify different information such as the destination of packets. The method places the generated set of packets into an ingress pipeline of the forwarding element.Type: GrantFiled: May 27, 2016Date of Patent: September 11, 2018Assignee: BAREFOOT NETWORKS, INC.Inventors: Steven Licking, Chaitanya Kodeboyina, Julianne Zhu, Changhoon Kim
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Patent number: 10063407Abstract: A method of identifying a failed egress path of a hardware forwarding element. The method detects an egress link failure in a data plane of the forwarding element. The method generates a link failure signal in the data plane identifying the failed egress link. The method generates a packet that includes the identification of the egress link based on the link failure signal. The method sets the status of the egress link to failed in the data plane based on the identification of the egress link in the generated packet.Type: GrantFiled: May 9, 2016Date of Patent: August 28, 2018Assignee: BAREFOOT NETWORKS, INC.Inventors: Chaitanya Kodeboyina, John Cruz, Steven Licking, Michael E. Attig
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Publication number: 20180234340Abstract: A synchronous packet-processing pipeline whose data paths are populated with data-plane stateful processing units (DSPUs) is provided. A DSPU is a programmable processor whose operations are synchronous with the dataflow of the packet-processing pipeline. A DSPU performs every computation with fixed latency. Each DSPU is capable of maintaining a set of states and perform its computations based on its maintained set of states. The programming of a DSPU determines how and when the DSPU updates one of its maintained states. Such programming may configure the DSPU to update the state based on its received packet data, or to change the state regardless of the received packet data.Type: ApplicationFiled: February 4, 2018Publication date: August 16, 2018Inventors: Changhoon Kim, Steven Licking, Anirudh Sivaraman Kaushalram, Chaitanya Kodeboyina
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Publication number: 20180234355Abstract: A synchronous packet-processing pipeline whose data paths are populated with data-plane stateful processing units (DSPUs) is provided. A DSPU is a programmable processor whose operations are synchronous with the dataflow of the packet-processing pipeline. A DSPU performs every computation with fixed latency. Each DSPU is capable of maintaining a set of states and perform its computations based on its maintained set of states. The programming of a DSPU determines how and when the DSPU updates one of its maintained states. Such programming may configure the DSPU to update the state based on its received packet data, or to change the state regardless of the received packet data.Type: ApplicationFiled: February 4, 2018Publication date: August 16, 2018Inventors: Changhoon Kim, Patrick Bosshart, Jay Evan Scott Peterson, Michael Gregory Ferrara, Steven Licking, Chaitanya Kodeboyina
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Patent number: 10050854Abstract: A method of performing bidirectional forwarding detection (BFD) by a hardware forwarding element that includes a set of ingress pipelines and a set of egress pipelines. Each ingress pipeline includes a packet generator. A packet generator in a first pipeline periodically generates a pair of packets to monitor the health of a particular egress link. The pair includes a BFD transmit packet and a BFD dummy transmit packet. The method forwards each dummy BFD transmit packet to a first egress pipeline and increments a counter at the first egress pipeline. Each BFD packet is transmitted through the particular egress link to a network node. BFD packets received from the network node are forwarded to the first egress pipeline and the value of the counter is rest. The method marks the particular egress link as failed when the value of the counter exceeds a predetermined threshold.Type: GrantFiled: September 10, 2016Date of Patent: August 14, 2018Assignee: BAREFOOT NETWORKS, INC.Inventors: Steven Licking, Chaitanya Kodeboyina, Julianne Zhu, Changhoon Kim
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Patent number: 9923816Abstract: A synchronous packet-processing pipeline whose data paths are populated with data-plane stateful processing units (DSPUs) is provided. A DSPU is a programmable processor whose operations are synchronous with the dataflow of the packet-processing pipeline. A DSPU performs every computation with fixed latency. Each DSPU is capable of maintaining a set of states and perform its computations based on its maintained set of states. The programming of a DSPU determines how and when the DSPU updates one of its maintained states. Such programming may configure the DSPU to update the state based on its received packet data, or to change the state regardless of the received packet data.Type: GrantFiled: September 24, 2015Date of Patent: March 20, 2018Assignee: BAREFOOT NETWORKS, INC.Inventors: Changhoon Kim, Steven Licking, Anirudh Sivaraman Kaushalram, Chaitanya Kodeboyina