Patents by Inventor Steven Licking

Steven Licking has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9912610
    Abstract: A synchronous packet-processing pipeline whose data paths are populated with data-plane stateful processing units (DSPUs) is provided. A DSPU is a programmable processor whose operations are synchronous with the dataflow of the packet-processing pipeline. A DSPU performs every computation with fixed latency. Each DSPU is capable of maintaining a set of states and perform its computations based on its maintained set of states. The programming of a DSPU determines how and when the DSPU updates one of its maintained states. Such programming may configure the DSPU to update the state based on its received packet data, or to change the state regardless of the received packet data.
    Type: Grant
    Filed: September 24, 2015
    Date of Patent: March 6, 2018
    Assignee: BAREFOOT NETWORKS, INC.
    Inventors: Patrick Bosshart, Jay Evan Scott Peterson, Michael Gregory Ferrara, Changhoon Kim, Steven Licking, Chaitanya Kodeboyina
  • Publication number: 20170093707
    Abstract: A synchronous packet-processing pipeline whose data paths are populated with data-plane stateful processing units (DSPUs) is provided. A DSPU is a programmable processor whose operations are synchronous with the dataflow of the packet-processing pipeline. A DSPU performs every computation with fixed latency. Each DSPU is capable of maintaining a set of states and perform its computations based on its maintained set of states. The programming of a DSPU determines how and when the DSPU updates one of its maintained states. Such programming may configure the DSPU to update the state based on its received packet data, or to change the state regardless of the received packet data.
    Type: Application
    Filed: September 24, 2015
    Publication date: March 30, 2017
    Inventors: Changhoon Kim, Steven Licking, Anirudh Sivaraman Kaushalram, Chaitanya Kodeboyina
  • Publication number: 20170093986
    Abstract: A synchronous packet-processing pipeline whose data paths are populated with data-plane stateful processing units (DSPUs) is provided. A DSPU is a programmable processor whose operations are synchronous with the dataflow of the packet-processing pipeline. A DSPU performs every computation with fixed latency. Each DSPU is capable of maintaining a set of states and perform its computations based on its maintained set of states. The programming of a DSPU determines how and when the DSPU updates one of its maintained states. Such programming may configure the DSPU to update the state based on its received packet data, or to change the state regardless of the received packet data.
    Type: Application
    Filed: September 24, 2015
    Publication date: March 30, 2017
    Inventors: Changhoon Kim, Patrick Bosshart, Jay Evan Scott Peterson, Michael Gregory Ferrara, Steven Licking, Chaitanya Kodeboyina