Patents by Inventor Steven P. Laur
Steven P. Laur has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11876456Abstract: A controller for a switching regulator receiving an input voltage and generating a regulated output voltage includes a buck control circuit and a boost control circuit. The controller activates the buck control circuit to generate the regulated output voltage having a first voltage value less than the input voltage. The controller activates the boost control circuit to return charges stored on the output capacitor at the output node to the input node, thereby driving the regulated output voltage to a second voltage value lower than the first voltage value. In some embodiments, in response to a command instructing the controller to allow the output voltage to decay, the controller operates in the boost mode using the boost control circuit to recycle the stored charge at the output node while ramping down the output voltage.Type: GrantFiled: March 18, 2022Date of Patent: January 16, 2024Assignee: Alpha and Omega Semiconductor International LPInventors: Nicholas I. Archibald, Steven P. Laur, Rhys S. A. Philbrick
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Publication number: 20230283186Abstract: A multi-phase current mode hysteretic modulator implements phase current balancing among the multiple power stages using slope-compensated emulated phase current signals and individual phase control signal for each phase. In some embodiments, the slope-compensated emulated phase current signals of all the phases are averaged and compared to the slope-compensated emulated phase current signal of each phase to generate a phase current balance control signal for each phase. The phase current balance control signal is combined with the voltage control loop error signal to generate a phase control signal for each phase where the phase control signals are generated for the multiple phases to control the phase current delivered by each power stage.Type: ApplicationFiled: May 13, 2023Publication date: September 7, 2023Inventors: Rhys S. A. Philbrick, Steven P. Laur, Nicholas I. Archibald
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Patent number: 11711071Abstract: A current mode control modulation includes a ramp signal generator generating a slope compensated ramp signal with slope compensation. In some embodiments, the ramp signal generator generates a ramp signal for the current control loop having a first ramp portion with slope compensation and a second ramp portion that matches the expected current mode signal. In some embodiments, the ramp signal generator includes a switched capacitor circuit supplied by a current circuit to charge or discharge nodes in the switched capacitor circuit to generate the ramp signal with slope compensation.Type: GrantFiled: November 1, 2021Date of Patent: July 25, 2023Assignee: Alpha and Omega Semiconductor (Cayman) Ltd.Inventors: Nicholas I. Archibald, Rhys S. A. Philbrick, Steven P. Laur
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Patent number: 11682974Abstract: A multi-phase current mode hysteretic modulator implements phase current balancing among the multiple power stages using slope-compensated emulated phase current signals and individual phase control signal for each phase. In some embodiments, the slope-compensated emulated phase current signals of all the phases are averaged and compared to the slope-compensated emulated phase current signal of each phase to generate a phase current balance control signal for each phase. The phase current balance control signal is combined with the voltage control loop error signal to generate a phase control signal for each phase where the phase control signals are generated for the multiple phases to control the phase current delivered by each power stage.Type: GrantFiled: September 22, 2021Date of Patent: June 20, 2023Assignee: Alpha and Omega Semiconductor International LPInventors: Rhys S. A. Philbrick, Steven P. Laur, Nicholas I. Archibald
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Publication number: 20230179099Abstract: A controller for a switching regulator receiving an input voltage and generating a regulated output voltage includes a buck control circuit and a boost control circuit. The controller activates the buck control circuit to generate the regulated output voltage having a first voltage value less than the input voltage. The controller activates the boost control circuit to return charges stored on the output capacitor at the output node to the input node, thereby driving the regulated output voltage to a second voltage value lower than the first voltage value. In some embodiments, in response to a command instructing the controller to allow the output voltage to decay, the controller operates in the boost mode using the boost control circuit to recycle the stored charge at the output node while ramping down the output voltage.Type: ApplicationFiled: March 18, 2022Publication date: June 8, 2023Inventors: Nicholas I. Archibald, Steven P. Laur, Rhys S. A. Philbrick
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Publication number: 20230091808Abstract: A multi-phase current mode hysteretic modulator implements phase current balancing among the multiple power stages using slope-compensated emulated phase current signals and individual phase control signal for each phase. In some embodiments, the slope-compensated emulated phase current signals of all the phases are averaged and compared to the slope-compensated emulated phase current signal of each phase to generate a phase current balance control signal for each phase. The phase current balance control signal is combined with the voltage control loop error signal to generate a phase control signal for each phase where the phase control signals are generated for the multiple phases to control the phase current delivered by each power stage.Type: ApplicationFiled: September 22, 2021Publication date: March 23, 2023Inventors: Rhys S. A. Philbrick, Steven P. Laur, Nicholas I. Archibald
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Patent number: 11522451Abstract: An apparatus, comprising, a MOSFET, a controller coupled to the MOSFET, an inductor conductively coupled to the MOSFET. A reported current output of the controller is adjusted based on a predetermined excursion of an attribute of the inductor from a fixed attribute value.Type: GrantFiled: December 13, 2019Date of Patent: December 6, 2022Assignee: ALPHA AND OMEGA SEMICONDUCTOR (CAYMAN) LTD.Inventors: Nicholas I. Archibald, Rhys S. A. Philbrick, Steven P. Laur
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Patent number: 11480987Abstract: An error amplifier circuit receives first and second input signals and provides an error amplifier output signal indicative of the difference between the first and second input signals. The error amplifier circuit implements a proportional-integrator-differentiator (PID) circuit having a differential input signal path and including a proportional amplifier circuit, an integrator amplifier circuit, and a differentiator amplifier circuit. The differentiator amplifier circuit receives an AC coupled input signal. The error amplifier circuit sums the output from the proportional amplifier circuit, the integrator amplifier circuit and the differentiator amplifier circuit to provide the error amplifier output signal where the error amplifier output signal is referenced to a first bias voltage.Type: GrantFiled: July 24, 2021Date of Patent: October 25, 2022Assignee: Alpha and Omega Semiconductor (Cayman) Ltd.Inventors: Steven P. Laur, Rhys Philbrick, Nicholas Archibald
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Publication number: 20220052675Abstract: A current mode control modulation includes a ramp signal generator generating a slope compensated ramp signal with slope compensation. In some embodiments, the ramp signal generator generates a ramp signal for the current control loop having a first ramp portion with slope compensation and a second ramp portion that matches the expected current mode signal. In some embodiments, the ramp signal generator includes a switched capacitor circuit supplied by a current circuit to charge or discharge nodes in the switched capacitor circuit to generate the ramp signal with slope compensation.Type: ApplicationFiled: November 1, 2021Publication date: February 17, 2022Inventors: Nicholas I. Archibald, Rhys S. A. Philbrick, Steven P. Laur
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Patent number: 11196409Abstract: A ramp signal generator generates a slope compensated ramp signal with optimal slope compensation for a current mode control modulator. In some embodiments, the ramp signal generator generates a ramp signal for the current control loop having a first ramp portion with slope compensation and a second ramp portion that matches the expected current mode signal. In some embodiments, the ramp signal generator is implemented using a switched capacitor circuit with charge scaling to generate the ramp signal with optimal slope compensation built into the ramp signal.Type: GrantFiled: September 28, 2020Date of Patent: December 7, 2021Assignee: Alpha and Omega Semiconductor (Cayman) Ltd.Inventors: Nicholas I. Archibald, Rhys S. A. Philbrick, Steven P. Laur
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Publication number: 20210349488Abstract: An error amplifier circuit receives first and second input signals and provides an error amplifier output signal indicative of the difference between the first and second input signals. The error amplifier circuit implements a proportional-integrator-differentiator (PID) circuit having a differential input signal path and including a proportional amplifier circuit, an integrator amplifier circuit, and a differentiator amplifier circuit. The differentiator amplifier circuit receives an AC coupled input signal. The error amplifier circuit sums the output from the proportional amplifier circuit, the integrator amplifier circuit and the differentiator amplifier circuit to provide the error amplifier output signal where the error amplifier output signal is referenced to a first bias voltage.Type: ApplicationFiled: July 24, 2021Publication date: November 11, 2021Inventors: Steven P. Laur, Rhys Philbrick, Nicholas Archibald
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Publication number: 20210286390Abstract: An error amplifier circuit receives first and second input signals and provides an error amplifier output signal indicative of the difference between the first and second input signals. The error amplifier circuit implements a proportional-integrator-differentiator (PID) circuit having a differential input signal path and including a proportional amplifier circuit, an integrator amplifier circuit, and a differentiator amplifier circuit. The differentiator amplifier circuit receives an AC coupled input signal. The error amplifier circuit sums the output from the proportional amplifier circuit, the integrator amplifier circuit and the differentiator amplifier circuit to provide the error amplifier output signal where the error amplifier output signal is referenced to a first bias voltage.Type: ApplicationFiled: March 16, 2020Publication date: September 16, 2021Inventors: Steven P. Laur, Rhys Philbrick, Nicholas Archibald
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Patent number: 11099589Abstract: An error amplifier circuit receives first and second input signals and provides an error amplifier output signal indicative of the difference between the first and second input signals. The error amplifier circuit implements a proportional-integrator-differentiator (PID) circuit having a differential input signal path and including a proportional amplifier circuit, an integrator amplifier circuit, and a differentiator amplifier circuit. The differentiator amplifier circuit receives an AC coupled input signal. The error amplifier circuit sums the output from the proportional amplifier circuit, the integrator amplifier circuit and the differentiator amplifier circuit to provide the error amplifier output signal where the error amplifier output signal is referenced to a first bias voltage.Type: GrantFiled: March 16, 2020Date of Patent: August 24, 2021Assignee: Alpha and Omega Semiconductor (Cayman) Ltd.Inventors: Steven P. Laur, Rhys Philbrick, Nicholas Archibald
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Publication number: 20210184572Abstract: An apparatus, comprising, a MOSFET, a controller coupled to the MOSFET, an inductor conductively coupled to the MOSFET. A reported current output of the controller is adjusted based on a predetermined excursion of an attribute of the inductor from a fixed attribute value.Type: ApplicationFiled: December 13, 2019Publication date: June 17, 2021Inventors: Nicholas I. Archibald, Rhys S. A. Philbrick, Steven P. Laur
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Publication number: 20210175879Abstract: A ramp signal generator generates a slope compensated ramp signal with optimal slope compensation for a current mode control modulator. In some embodiments, the ramp signal generator generates a ramp signal for the current control loop having a first ramp portion with slope compensation and a second ramp portion that matches the expected current mode signal. In some embodiments, the ramp signal generator is implemented using a switched capacitor circuit with charge scaling to generate the ramp signal with optimal slope compensation built into the ramp signal.Type: ApplicationFiled: September 28, 2020Publication date: June 10, 2021Inventors: Nicholas I. Archibald, Rhys S. A. Philbrick, Steven P. Laur
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Patent number: 10924013Abstract: A voltage-controlled oscillator (VCO) generates a clock signal in response to an input feedback signal by applying tuning to a control loop error signal related to the input feedback signal and generating the clock signal using a voltage ramp signal that is ground referenced. The VCO includes an input tuning circuit applying tuning to a difference signal to generate a tuned voltage signal, a comparator to compare the tuned voltage signal to the ground-based ramp signal, an one-shot circuit to generate an one-shot signal pulse in response to the ramp signal increasing to the tuned voltage signal. The one-shot signal pulse is the clock signal and is also used to reset the ramp signal. In some embodiments, the voltage-controlled oscillator of the present disclosure is incorporated in a current mode hysteretic modulator.Type: GrantFiled: November 6, 2019Date of Patent: February 16, 2021Assignee: Alpha and Omega Semiconductor (Cayman) Ltd.Inventors: Steven P. Laur, Rhys Philbrick, Nicholas Archibald
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Patent number: 10833661Abstract: A ramp signal generator generates a slope compensated ramp signal with optimal slope compensation for a current mode control modulator. In some embodiments, the ramp signal generator generates a ramp signal for the current control loop having a first ramp portion with slope compensation and a second ramp portion that matches the expected current mode signal. In some embodiments, the ramp signal generator is implemented using a switched capacitor circuit with charge scaling to generate the ramp signal with optimal slope compensation built into the ramp signal.Type: GrantFiled: December 4, 2019Date of Patent: November 10, 2020Assignee: ALPHA AND OMEGA SEMICONDUCTOR (CAYMAN) LTD.Inventors: Nicholas I. Archibald, Rhys S. A. Philbrick, Steven P. Laur
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Patent number: 10795390Abstract: A circuit for providing temperature compensation to a sense signal having a first temperature coefficient includes a temperature compensation circuit receiving a temperature sense signal indicative of a temperature associated with the sense signal where the temperature compensation circuit is digitally configurable by at least one digital signal to generate a compensating impedance signal having a second temperature coefficient. The compensating impedance signal provides an impedance value in response to the temperature sense signal. The compensating impedance signal is applied to modify the sense signal to provide a modified sense signal having substantially zero temperature coefficient over a first frequency range. The circuit further includes an amplifier circuit receiving the modified sense signal and generating an output signal indicative of the sense signal where the output signal has substantially zero temperature coefficient over the first frequency range.Type: GrantFiled: January 28, 2020Date of Patent: October 6, 2020Assignee: Alpha and Omega Semiconductor (Cayman) Ltd.Inventors: Rhys Philbrick, Steven P. Laur, Nicholas Archibald
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Patent number: 10038379Abstract: A controller for controlling operation of a switching regulator including a modulator, a discontinuous conduction mode (DCM) controller, an audible DCM (ADCM) controller, and a sub-sonic discontinuous conduction mode (SBDCM) controller. The modulator generally operates in a continuous conduction mode. The DCM controller modifies operation to DCM during low loads. The ADCM controller detects when the switching frequency is less than a super-sonic frequency threshold and modifies operation to maintain the switching frequency at a super-sonic frequency level. The SBDCM controller detects a sub-sonic operating condition during ADCM operation and responsively inhibits operation of the ADCM mode controller to allow a SBDCM mode within a sub-sonic switching frequency range. The SBDCM operating mode allows for efficient connected standby operation. The SBDCM controller allows operation to return to other modes when the switching frequency increases above the subsonic level.Type: GrantFiled: January 13, 2017Date of Patent: July 31, 2018Assignee: INTERSIL AMERICAS LLCInventors: M. Jason Houston, Steven P. Laur
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Publication number: 20170133933Abstract: A controller for controlling operation of a switching regulator including a modulator, a discontinuous conduction mode (DCM) controller, an audible DCM (ADCM) controller, and a sub-sonic discontinuous conduction mode (SBDCM) controller. The modulator generally operates in a continuous conduction mode. The DCM controller modifies operation to DCM during low loads. The ADCM controller detects when the switching frequency is less than a super-sonic frequency threshold and modifies operation to maintain the switching frequency at a super-sonic frequency level. The SBDCM controller detects a sub-sonic operating condition during ADCM operation and responsively inhibits operation of the ADCM mode controller to allow a SBDCM mode within a sub-sonic switching frequency range. The SBDCM operating mode allows for efficient connected standby operation. The SBDCM controller allows operation to return to other modes when the switching frequency increases above the subsonic level.Type: ApplicationFiled: January 13, 2017Publication date: May 11, 2017Inventors: M. Jason HOUSTON, Steven P. LAUR