Patents by Inventor Steven Sherman

Steven Sherman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12005666
    Abstract: A verification method for verifying whether the aerodynamic profile of a real blade for an aircraft turbine engine complies with a theoretical blade, the method including constructing a camber line of the theoretical blade and constructing a camber line of the real blade; constructing a relationship for the thickness of the theoretical blade and constructing a relationship for the thickness of the real blade, the thickness relationship of a blade corresponding to the curve plotting the thickness of the blade as a function of curvilinear length along the camber line from a leading edge of the blade to a trailing edge of the blade, where thickness is the dimension of the blade extending perpendicularly to the camber line at each point of the camber line; superposing the thickness relationship of the real blade on the thickness relationship of the theoretical blade; and extracting the leading-edge and trailing edge thicknesses.
    Type: Grant
    Filed: August 7, 2020
    Date of Patent: June 11, 2024
    Assignees: SAFRAN AERO COMPOSITE, SAFRAN AIRCRAFT ENGINES, SAFRAN AEROSPACE COMPOSITES
    Inventors: Damien Vincent Le Cloarec, Clement Giacovelli, Jeffrey Steven Sherman, Mickaelle Lucie Alicia Thomas
  • Patent number: 11788434
    Abstract: Method for manufacturing a casing of an aircraft turbomachine, the casing including an annular shell extending about an axis A and made of a composite material including fibres that are woven and immersed in a resin, the annular layer including an abradable material arranged inside the shell, and covering a first inner annular surface of an intermediate section of the shell, the method including a step of gluing the layer on the first surface, during which the casing is heated and compressed by a system that is present at least partially inside the casing, wherein, prior to the heating and compression of the casing, a forming tool is mounted inside the casing and is made of two rings.
    Type: Grant
    Filed: July 10, 2020
    Date of Patent: October 17, 2023
    Assignees: SAFRAN AIRCRAFT ENGINES, SAFRAN AEROSPACE COMPOSITES
    Inventors: Vincent Pascal Fiore, Gatien Frisoni, Foster Alexander Maxwell, Steven Meserve, Jeffrey Steven Sherman
  • Publication number: 20220281198
    Abstract: A verification method for verifying whether the aerodynamic profile of a real blade for an aircraft turbine engine complies with a theoretical blade, the method including constructing a camber line of the theoretical blade and constructing a camber line of the real blade; constructing a relationship for the thickness of the theoretical blade and constructing a relationship for the thickness of the real blade, the thickness relationship of a blade corresponding to the curve plotting the thickness of the blade as a function of curvilinear length along the camber line from a leading edge of the blade to a trailing edge of the blade, where thickness is the dimension of the blade extending perpendicularly to the camber line at each point of the camber line; superposing the thickness relationship of the real blade on the thickness relationship of the theoretical blade; and extracting the leading-edge and trailing edge thicknesses.
    Type: Application
    Filed: August 7, 2020
    Publication date: September 8, 2022
    Applicants: SAFRAN AERO COMPOSITE, SAFRAN AIRCRAFT ENGINES, SAFRAN AEROSPACE COMPOSITES
    Inventors: Damien Vincent LE CLOAREC, Clement GIACOVELLI, Jeffrey Steven SHERMAN, Mickaelle Lucie Alicia THOMAS
  • Publication number: 20220243617
    Abstract: Method for manufacturing a casing of an aircraft turbomachine, the casing including an annular shell extending about an axis A and made of a composite material including fibres that are woven and immersed in a resin, the annular layer including an abradable material arranged inside the shell, and covering a first inner annular surface of an intermediate section of the shell, the method including a step of gluing the layer on the first surface, during which the casing is heated and compressed by a system that is present at least partially inside the casing, wherein, prior to the heating and compression of the casing, a forming tool is mounted inside the casing and is made of two rings.
    Type: Application
    Filed: July 10, 2020
    Publication date: August 4, 2022
    Inventors: Vincent Pascal FIORE, Gatien FRISONI, Foster Alexander MAXWELL, Steven MESERVE, Jeffrey Steven SHERMAN
  • Publication number: 20200141349
    Abstract: A method of forming an insulated composite piston head may include: creating a preformed aluminum or aluminum alloy foam core; suspending the preformed foam core in a piston head mold; forming a molded piston head and removing it from the mold; depositing an insulating material on at least one surface of the molded piston head; performing at least one machining operation on the molded piston head so it conforms to a predetermined specification for the insulated composite piston head; and optionally applying a lubricious piston coating to at least a portion of the outer surface of the insulated composite piston head.
    Type: Application
    Filed: December 19, 2019
    Publication date: May 7, 2020
    Inventors: Gregory ARDISANA, Lang SUI, Steven SHERMAN, Edward THAI, Isaac YEO, Michael HOLLIS, Scott ZIOLEK
  • Patent number: 10544752
    Abstract: An insulated composite piston head that includes three or more layers is formed and used in a combustion engine. The first layer is an aluminum or aluminum alloy foam core. The second layer is a metal layer that at least partially encapsulates the foam core; wherein the metal layer is selected to be aluminum or an aluminum alloy. The third layer is a layer of an insulating material located on at least one surface of the metal layer. The deposition of the insulating layer is accomplished via the use of a coaxial laser process.
    Type: Grant
    Filed: July 14, 2017
    Date of Patent: January 28, 2020
    Assignees: Hyundai Motor Company, KIA Motors Corporation
    Inventors: Gregory Ardisana, Lang Sui, Steven Sherman, Edward Thai, Isaac Yeo, Michael Hollis, Scott Ziolek
  • Patent number: 10204909
    Abstract: Provided herein are approaches for forming a gate oxide layer for a DRAM device, the method including providing a finned substrate having a recess formed therein, and performing an ion implant into a sidewall surface of the recess to form a gate oxide layer having a non-uniform thickness, wherein a thickness of the gate oxide layer at a top section of the sidewall surface is greater than a thickness of the gate oxide layer at a bottom section of the sidewall surface. In some approaches, the ion implant is provided as a series of ion implants at multiple different implant angles, varied along with an ion implantation energy and/or an ion dose to increase the thickness of the gate oxide of the top section of the sidewall surface. In some approaches, the finned substrate is also exposed to a plasma, either during or after, the ion implantation.
    Type: Grant
    Filed: December 22, 2015
    Date of Patent: February 12, 2019
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Simon Ruffell, Arvind Kumar, Tristan Ma, Kyu-Ha Shim, John Hautala, Steven Sherman
  • Publication number: 20190017465
    Abstract: An insulated composite piston head that includes three or more layers is formed and used in a combustion engine. The first layer is an aluminum or aluminum alloy foam core. The second layer is a metal layer that at least partially encapsulates the foam core; wherein the metal layer is selected to be aluminum or an aluminum alloy. The third layer is a layer of an insulating material located on at least one surface of the metal layer. The deposition of the insulating layer is accomplished via the use of a coaxial laser process.
    Type: Application
    Filed: July 14, 2017
    Publication date: January 17, 2019
    Inventors: Gregory Ardisana, Lang Sui, Steven Sherman, Edward Thai, Isaac Yeo, Michael Hollis, Scott Ziolek
  • Patent number: 9728623
    Abstract: A replacement metal gate transistor is described. Various examples provide a replacement metal gate transistor including a trench, a first sidewall and a second sidewall. A layer is disposed in the trench where the layer has a bottom section disposed on a bottom of the trench and sidewall sections disposed on the first and second sidewalls, wherein the sidewall sections of the layer are at least 50% thinner than the bottom section of the layer.
    Type: Grant
    Filed: June 19, 2013
    Date of Patent: August 8, 2017
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Ying Zhang, Steven Sherman
  • Publication number: 20170179133
    Abstract: Provided herein are approaches for forming a gate oxide layer for a DRAM device, the method including providing a finned substrate having a recess formed therein, and performing an ion implant into a sidewall surface of the recess to form a gate oxide layer having a non-uniform thickness, wherein a thickness of the gate oxide layer at a top section of the sidewall surface is greater than a thickness of the gate oxide layer at a bottom section of the sidewall surface. In some approaches, the ion implant is provided as a series of ion implants at multiple different implant angles, varied along with an ion implantation energy and/or an ion dose to increase the thickness of the gate oxide of the top section of the sidewall surface. In some approaches, the finned substrate is also exposed to a plasma, either during or after, the ion implantation.
    Type: Application
    Filed: December 22, 2015
    Publication date: June 22, 2017
    Inventors: Simon Ruffell, Arvind Kumar, Tristan Ma, Kyu-Ha Shim, John Hautala, Steven Sherman
  • Publication number: 20160272230
    Abstract: A wheeled container that includes a front face and a rear face disposed opposite the front face. A bottom surface is coupled to the rear face and the front face. A recessed skate housing is disposed in the bottom surface, the recessed skate housing comprises a slot that receives a caster assembly. The caster assembly is moveable within the slot between a first retracted position and a second deployed position.
    Type: Application
    Filed: September 2, 2015
    Publication date: September 22, 2016
    Inventors: Edwin Hathaway, Mary Carol Witry, Todd Leslie, Jason Ferraro, Doug Watts, Steven Sherman
  • Patent number: 9153444
    Abstract: A replacement metal gate transistor and methods of forming replacement metal gate transistors are described. Various examples provide methods of manufacturing a replacement metal gate transistor that includes depositing a dielectric layer into a trench, wherein the dielectric layer is deposited onto the bottom of the trench and the sidewalls of the trench, depositing a first metal layer into the trench, wherein the first metal layer is deposited onto the bottom of the trench and the sidewalls of the trench over the dielectric layer, depositing a second metal layer into the trench, wherein the second metal layer is deposited onto the bottom of the trench and the sidewalls of the trench over the first metal layer, removing at least a portion of the second metal layer from the sidewalls of the trench, and depositing a conducting layer into the trench. Other embodiments are disclosed and claimed.
    Type: Grant
    Filed: June 19, 2013
    Date of Patent: October 6, 2015
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Ying Zhang, Steven Sherman
  • Patent number: 9082949
    Abstract: A method of forming a magnetic memory includes providing a layer stack comprising a plurality of magnetic layers and a plurality of electrically conducting layers on a base portion of a substrate; forming a first mask feature on an outer surface of the layer stack above a first protected region and a second mask feature on the outer surface of the layer stack above a second protected region, the first mask feature and second mask feature defining an exposed region of the layer stack in portions of the layer stack therebetween; and directing ions towards exposed the region of the layer stack in an ion exposure that is effective to magnetically isolate the first protected region from the second protected region and to electrically isolate the first protected region from the second protected region without removal of the exposed region of the layer stack.
    Type: Grant
    Filed: April 29, 2013
    Date of Patent: July 14, 2015
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Alexander C. Kontos, Steven Sherman, John J. Hautala, Simon Ruffell
  • Patent number: 8946836
    Abstract: In one embodiment a magnetic memory includes a memory device base and a plurality of memory cells disposed on the memory cell base, where each memory cell includes a layer stack comprising a plurality of magnetic and electrically conductive layers arranged in a stack of layers common to each other memory cell. The magnetic memory further includes an implanted matrix disposed between the memory cells and surrounding each memory cell, where the implanted matrix includes component material of the layer stack of each memory cell inter mixed with implanted species, where the implanted matrix comprises a non-conducting material and a non-magnetic material, wherein each memory cell is electrically and magnetically isolated from each other memory cell.
    Type: Grant
    Filed: April 29, 2013
    Date of Patent: February 3, 2015
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Alexander C. Kontos, Steven Sherman, John J. Hautala, Simon Ruffell
  • Publication number: 20140377885
    Abstract: A replacement metal gate transistor and methods of forming replacement metal gate transistors are described. Various examples provide methods of manufacturing a replacement metal gate transistor that includes depositing a dielectric layer into a trench, wherein the dielectric layer is deposited onto the bottom of the trench and the sidewalls of the trench, depositing a first metal layer into the trench, wherein the first metal layer is deposited onto the bottom of the trench and the sidewalls of the trench over the dielectric layer, depositing a second metal layer into the trench, wherein the second metal layer is deposited onto the bottom of the trench and the sidewalls of the trench over the first metal layer, removing at least a portion of the second metal layer from the sidewalls of the trench, and depositing a conducting layer into the trench. Other embodiments are disclosed and claimed.
    Type: Application
    Filed: June 19, 2013
    Publication date: December 25, 2014
    Inventors: Ying Zhang, Steven Sherman
  • Publication number: 20140374843
    Abstract: A replacement metal gate transistor is described. Various examples provide a replacement metal gate transistor including a trench, a first sidewall and a second sidewall. A layer is disposed in the trench where the layer has a bottom section disposed on a bottom of the trench and sidewall sections disposed on the first and second sidewalls, wherein the sidewall sections of the layer are at least 50% thinner than the bottom section of the layer.
    Type: Application
    Filed: June 19, 2013
    Publication date: December 25, 2014
    Inventors: Ying Zhang, Steven Sherman
  • Patent number: 8598891
    Abstract: Detecting and/or mitigating the presence of particle contaminants in a MEMS device involves converting benign areas in which particles might become trapped undetectably by electric fields during test to field-free regions by extending otherwise non-functional conductive shield and gate layers and placing the same electrical potential on the conductive shield and gate layers. Particle contaminants can then be moved into detection locations remote from the potential trap areas and having particle detection structures by providing some mechanical disturbance.
    Type: Grant
    Filed: February 25, 2013
    Date of Patent: December 3, 2013
    Assignee: Analog Devices, Inc.
    Inventors: Vineet Kumar, William A. Clark, John A. Geen, Edward Wolfe, Steven Sherman
  • Publication number: 20130288394
    Abstract: A method of forming a magnetic memory includes providing a layer stack comprising a plurality of magnetic layers and a plurality of electrically conducting layers on a base portion of a substrate; forming a first mask feature on an outer surface of the layer stack above a first protected region and a second mask feature on the outer surface of the layer stack above a second protected region, the first mask feature and second mask feature defining an exposed region of the layer stack in portions of the layer stack therebetween; and directing ions towards exposed the region of the layer stack in an ion exposure that is effective to magnetically isolate the first protected region from the second protected region and to electrically isolate the first protected region from the second protected region without removal of the exposed region of the layer stack.
    Type: Application
    Filed: April 29, 2013
    Publication date: October 31, 2013
    Applicant: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Alexander C. Kontos, Steven Sherman, John J. Hautala, Simon Ruffell
  • Publication number: 20130285177
    Abstract: In one embodiment a magnetic memory includes a memory device base and a plurality of memory cells disposed on the memory cell base, where each memory cell includes a layer stack comprising a plurality of magnetic and electrically conductive layers arranged in a stack of layers common to each other memory cell. The magnetic memory further includes an implanted matrix disposed between the memory cells and surrounding each memory cell, where the implanted matrix includes component material of the layer stack of each memory cell inter mixed with implanted species, where the implanted matrix comprises a non-conducting material and a non-magnetic material, wherein each memory cell is electrically and magnetically isolated from each other memory cell.
    Type: Application
    Filed: April 29, 2013
    Publication date: October 31, 2013
    Applicant: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Alexander C. Kontos, Steven Sherman, John J. Hautala, Simon Ruffell
  • Publication number: 20130167588
    Abstract: A sheet wafer furnace has a chamber having an opening, and a crucible, within the chamber, and spaced from the opening. The furnace also has a puller configured to pull a sheet wafer from molten material in the crucible and through the opening in the chamber, and a seal across the opening of the chamber.
    Type: Application
    Filed: August 9, 2012
    Publication date: July 4, 2013
    Inventors: Steven Sherman, Leo van Glabbeek, Stephen Yamartino