Patents by Inventor Steven Sprouse

Steven Sprouse has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130170293
    Abstract: A memory device implements hybrid programming sequences for writing data to multiple level cells (MLCs). The memory device obtains specified data to write to the MLC and selects among multiple different programming techniques to write the specified data. Each of the programming techniques establishes a charge configuration in the MLC that represents multiple data bits. The memory device writes the specified data to the MLC using the selected programming technique. In one implementation, the programming techniques include a robust programming technique that preserves previously written data in the MLC in the event of a write abort of the specified data and an additional programming technique that has higher average performance than the robust programming technique. The selection may be made based on a wide variety of criteria, including whether data has been previously written to a block that includes the MLC.
    Type: Application
    Filed: December 28, 2011
    Publication date: July 4, 2013
    Inventors: Steven Sprouse, Chris Avila, Sergey Anatolievich Gorobets
  • Patent number: 8468294
    Abstract: A memory system and methods of its operation are presented. The memory system includes a controller and a non-volatile memory circuit, where the non-volatile memory circuit has a first section, where data is stored in a binary format, and a second section, where data is stored in a multi-state format. The memory system receives data from the host and performs a binary write operation of the received data to the first section of the non-volatile memory circuit. The memory system subsequently folds portions of the data from the first section of the non-volatile memory to the second section of the non-volatile memory, wherein a folding operation includes reading the portions of the data from the first section rewriting it into the second section of the non-volatile memory using a multi-state programming operation. The controller determines to operate the memory system according to one of multiple modes.
    Type: Grant
    Filed: December 18, 2009
    Date of Patent: June 18, 2013
    Assignee: SanDisk Technologies Inc.
    Inventors: Jianmin Huang, Chris Avila, Lee M. Gavens, Steven Sprouse, Sergey Anatolievich Gorobets, Neil David Hutchinson
  • Publication number: 20130070530
    Abstract: A non-volatile storage system is disclosed that includes non-volatile memory cells designed for high endurance and lower retention than other non-volatile memory cells.
    Type: Application
    Filed: September 18, 2012
    Publication date: March 21, 2013
    Applicant: SANDISK TECHNOLOGIES INC.
    Inventors: Jian Chen, Sergei Gorobets, Steven Sprouse, Tien-Chien Kuo, Yan Li, Seungpil Lee, Alex Mak, Deepanshu Dutta, Masaaki Higashitani
  • Publication number: 20120297140
    Abstract: A method and system for cache management in a storage device is disclosed. A portion of unused memory in the storage device is used for temporary data cache so that two levels of cache may be used (such as a permanent data cache and a temporary data cache). The storage device may manage the temporary data cache in order to maintain clean entries in the temporary data cache. In this way, the storage area associated with the temporary data cache may be immediately reclaimed and retasked for a different purpose without the need for extraneous copy operations.
    Type: Application
    Filed: May 17, 2011
    Publication date: November 22, 2012
    Inventors: William Wu, Sergey Anatolievich Gorobets, Steven Sprouse, Alan Bennett
  • Patent number: 8180994
    Abstract: During a programming data transfer process in a non-volatile storage system, recording units of data are transferred from a host to a memory device, such as a memory card. For each recording unit, pages of data are arranged in an order such that a page which takes longer to write to a memory array of the memory device is provided before a page which takes less time to write. Overall programming time for the recording unit is reduced since a greater degree of parallel processing occurs. While the page which takes longer to program is being programmed to the memory array, the page which takes less time to program is being transferred to the memory device. After programming is completed, the memory device signals the host to transfer a next recording unit. The pages of data may include lower, middle and upper pages.
    Type: Grant
    Filed: July 8, 2009
    Date of Patent: May 15, 2012
    Assignee: SanDisk Technologies Inc.
    Inventors: Steven Sprouse, Jianmin Huang, Chris Avila, Yichao Huang, Emilio Yero
  • Publication number: 20120005406
    Abstract: A method and system for performing garbage collection operations on update blocks in a memory device using volatile memory is disclosed. When performing a garbage collection operation, a first part of the data related to the garbage collection operation is written to a volatile memory in the memory device, and a second part of the data related to the garbage collection operation is written to a non-volatile memory in the memory device. The first part of the data that is written to the volatile memory (such as a random access memory) may comprise control information (such as mapping information of the logical addressable unit to a physical metablock). The second part of the data related to the garbage collection that is written to the non-volatile memory (such as a flash memory) may comprise the consolidated data in the update block.
    Type: Application
    Filed: June 30, 2010
    Publication date: January 5, 2012
    Inventors: Neil David Hutchison, Steven Sprouse
  • Publication number: 20120005405
    Abstract: A method and system pre-emptively perform garbage collection operations of a forced amount on update blocks in a memory device. The amount of garbage collection needed by a certain data write is monitored and adjusted to match the forced amount if necessary. Update blocks may be selected on the basis of their recent usage or the amount of garbage collection required. Another method and system may store control information about update blocks in a temporary storage area so that a greater number of update blocks are utilized. The sequential write performance measured by the Speed Class test may be optimized by using this method and system.
    Type: Application
    Filed: June 30, 2010
    Publication date: January 5, 2012
    Inventors: William Wu, Shai Traister, Jianmin Huang, Neil David Hutchison, Steven Sprouse
  • Publication number: 20110296122
    Abstract: A system and method for clearing data from a cache in a storage device is disclosed. The method may include analyzing the cache for the least recently fragmented logical group, and evicting the entries from the least recently fragmented logical group. Or, the method may also include analyzing compaction history and selecting entries for eviction based on the analysis of the compaction history. The method may also include scheduling of different eviction mechanisms during various operations of the storage device. The system may include a cache storage, a main storage and a controller configured to evict entries associated with a least recently fragmented logical group, configured to evict entries based on analysis of compaction history, or configured to schedule different eviction mechanisms during various operations of the storage device.
    Type: Application
    Filed: May 31, 2010
    Publication date: December 1, 2011
    Inventors: William WU, Steven Sprouse, Sergei Anatolievich Gorobets, Alan Bennett, Ameen Aslam
  • Patent number: 8001304
    Abstract: A non-volatile storage device has first and second controllers that provide external access to non-volatile memory using different protocols. In response to a request from the first controller, the second controller retrieves parameters from the non-volatile memory and provides the retrieved parameters to the first controller. In one embodiment, the device parameters are USB descriptors, which may include a vendor ID, a product ID, a product string, and/or a serial number. The first controller may be a Universal Serial Bus (USB) card reader controller. Examples of the second controller include a Secure Digital (SD) controller, a CompactFlash (CF) controller, a MemoryStick controller, or a different type of controller that is able to provide external access to the non-volatile memory. The first controller provides the device parameters to a host during enumeration of the non-volatile storage device. The device parameters may be used to establish settings for the first controller.
    Type: Grant
    Filed: February 15, 2008
    Date of Patent: August 16, 2011
    Assignee: SanDisk Technologies Inc.
    Inventors: Ka Ian Yung, Steven Sprouse, Dhaval Parikh, Nathan Rapaport
  • Publication number: 20110153911
    Abstract: A method and system for achieving die parallelism through block interleaving includes non-volatile memory having a multiple non-volatile memory dies, where each die has a cache storage area and a main storage area. A controller is configured to receive data and write sequentially addressed data to the cache storage area of a first die. The controller, after writing sequentially addressed data to the cache storage area of the first die equal to a block of the main storage area of the first die, writes additional data to a cache storage area of a next die until sequentially addressed data is written into the cache area of the next die equal to a block of the main storage area. The cache storage area may be copied to the main storage area on the first die while the cache storage area is written to on the next die.
    Type: Application
    Filed: December 18, 2009
    Publication date: June 23, 2011
    Inventors: Steven Sprouse, Chris Avila, Jianmin Huang
  • Publication number: 20110153913
    Abstract: A memory system and methods of its operation are presented. The memory system includes a controller and a non-volatile memory circuit, where the non-volatile memory circuit has a first section, where data is stored in a binary format, and a second section, where data is stored in a multi-state format. The memory system receives data from the host and performs a binary write operation of the received data to the first section of the non-volatile memory circuit. The memory system subsequently folds portions of the data from the first section of the non-volatile memory to the second section of the non-volatile memory, wherein a folding operation includes reading the portions of the data from the first section rewriting it into the second section of the non-volatile memory using a multi-state programming operation. The controller determines to operate the memory system according to one of multiple modes.
    Type: Application
    Filed: December 18, 2009
    Publication date: June 23, 2011
    Inventors: Jianmin Huang, Chris Avila, Lee M. Gavens, Steven Sprouse, Sergey Anatolievich Gorobets, Neil David Hutchinson
  • Publication number: 20110010484
    Abstract: During a programming data transfer process in a non-volatile storage system, recording units of data are transferred from a host to a memory device, such as a memory card. For each recording unit, pages of data are arranged in an order such that a page which takes longer to write to a memory array of the memory device is provided before a page which takes less time to write. Overall programming time for the recording unit is reduced since a greater degree of parallel processing occurs. While the page which takes longer to program is being programmed to the memory array, the page which takes less time to program is being transferred to the memory device. After programming is completed, the memory device signals the host to transfer a next recording unit. The pages of data may include lower, middle and upper pages.
    Type: Application
    Filed: July 8, 2009
    Publication date: January 13, 2011
    Inventors: Steven Sprouse, Jianmin Huang, Chris Avila, Yichao Huang, Emilio Yero
  • Patent number: 7810235
    Abstract: A method is disclosed for making a connector for preventing electrostatic discharge during connection of a USB-type connector. The connector includes a grounding clip provided within a recess formed at least partially down into the surface of the second level of the base block. The grounding clip may have a proximal end affixed to a proximal end of a signal ground pin of the plurality of signal pins, though the grounding clip and signal ground pin may be coupled at other locations along their lengths. The connector including the grounding clip may be affixed to a semiconductor device. A portion of the grounding clip is provided at a height above the surface of the base block such that, when a shroud is slid around the connector, the shroud engages and remains in contact with the grounding clip. Accordingly, any electrostatic discharge built up in the shroud travels from the shroud, through the ESD grounding clip, to the signal ground pin where it is harmlessly dissipated.
    Type: Grant
    Filed: December 29, 2006
    Date of Patent: October 12, 2010
    Assignee: SanDisk Corporation
    Inventors: Steven Sprouse, Patricio Collantes, Dhaval Parikh
  • Publication number: 20090307389
    Abstract: Techniques for switching access states for accessing non-volatile are disclosed. A plurality of non-volatile memory portions can be effectively presented as: (a) a single logical unit in a first access state (“single unit access state”) and (b) as multiple logical units in a second access state (“multi-unit access state”). An access switching system can be provided for a device that includes a plurality of non-volatile storage portions. As a result, the device can be operable to effectively switch between the first and second access states. In the first access state, the plurality of non-volatile storage portions can be effectively presented as a single logical unit for access by another device, thereby allowing the other device to effectively access the plurality of non-volatile storage portions from a single access point.
    Type: Application
    Filed: June 10, 2008
    Publication date: December 10, 2009
    Applicant: SANDISK CORPORATION
    Inventors: Steven Sprouse, Henry Hutton, Dhaval Parikh
  • Publication number: 20090210637
    Abstract: A non-volatile storage device has first and second controllers that provide external access to non-volatile memory using different protocols. In response to a request from the first controller, the second controller retrieves parameters from the non-volatile memory and provides the retrieved parameters to the first controller. In one embodiment, the device parameters are USB descriptors, which may include a vendor ID, a product ID, a product string, and/or a serial number. The first controller may be a Universal Serial Bus (USB) card reader controller. Examples of the second controller include a Secure Digital (SD) controller, a CompactFlash (CF) controller, a MemoryStick controller, or a different type of controller that is able to provide external access to the non-volatile memory. The first controller provides the device parameters to a host during enumeration of the non-volatile storage device. The device parameters may be used to establish settings for the first controller.
    Type: Application
    Filed: February 15, 2008
    Publication date: August 20, 2009
    Inventors: Ka Ian Yung, Steven Sprouse, Dhaval Parikh, Nathan Rapaport
  • Publication number: 20090165294
    Abstract: A low profile USB flash memory device, and methods of forming same, are disclosed. The USB flash memory device includes an integrated circuit memory portion and a USB connector. The memory portion and the USB connector may be integrally formed on the same substrate. The USB flash memory device includes a substrate on which is mounted one or more flash memory die, a controller die, passive components and an LED for indicating when the memory is being accessed. In contrast to prior art USB memory devices which used TSOP packages mounted on a printed circuit board, the semiconductor die of the present invention are affixed to the substrate and wire bonded in a SIP configuration. Omitting the encapsulated TSOP packages allows a reduction in the overall thickness of the USB flash memory device.
    Type: Application
    Filed: December 27, 2007
    Publication date: July 2, 2009
    Inventors: Suresh Upadhyayula, Robert C. Miller, Hem Takiar, Steven Sprouse, Ka Ian Yung
  • Patent number: 7410370
    Abstract: A connector is disclosed for preventing electrostatic discharge during connection of a USB-type connector. The connector includes a grounding clip provided within a recess formed at least partially down into the surface of the second level of the base block. The grounding clip may have a proximal end affixed to a proximal end of a signal ground pin of the plurality of signal pins, though the grounding clip and signal ground pin may be coupled at other locations along their lengths. The connector including the grounding clip may be affixed to a semiconductor device. A portion of the grounding clip is provided at a height above the surface of the base block such that, when a shroud is slid around the connector, the shroud engages and remains in contact with the grounding clip. Accordingly, any electrostatic discharge built up in the shroud travels from the shroud, through the ESD grounding clip, to the signal ground pin where it is harmlessly dissipated.
    Type: Grant
    Filed: December 29, 2006
    Date of Patent: August 12, 2008
    Assignee: SanDisk Corporation
    Inventors: Steven Sprouse, Patricio Collantes, Dhaval Parikh
  • Publication number: 20080160831
    Abstract: A connector is disclosed for preventing electrostatic discharge during connection of a USB-type connector. The connector includes a grounding clip provided within a recess formed at least partially down into the surface of the second level of the base block. The grounding clip may have a proximal end affixed to a proximal end of a signal ground pin of the plurality of signal pins, though the grounding clip and signal ground pin may be coupled at other locations along their lengths. The connector including the grounding clip may be affixed to a semiconductor device. A portion of the grounding clip is provided at a height above the surface of the base block such that, when a shroud is slid around the connector, the shroud engages and remains in contact with the grounding clip. Accordingly, any electrostatic discharge built up in the shroud travels from the shroud, through the ESD grounding clip, to the signal ground pin where it is harmlessly dissipated.
    Type: Application
    Filed: December 29, 2006
    Publication date: July 3, 2008
    Inventors: Steven Sprouse, Patricio Collantes, Dhaval Parikh
  • Publication number: 20080155824
    Abstract: A method is disclosed for making a connector for preventing electrostatic discharge during connection of a USB-type connector. The connector includes a grounding clip provided within a recess formed at least partially down into the surface of the second level of the base block. The grounding clip may have a proximal end affixed to a proximal end of a signal ground pin of the plurality of signal pins, though the grounding clip and signal ground pin may be coupled at other locations along their lengths. The connector including the grounding clip may be affixed to a semiconductor device. A portion of the grounding clip is provided at a height above the surface of the base block such that, when a shroud is slid around the connector, the shroud engages and remains in contact with the grounding clip. Accordingly, any electrostatic discharge built up in the shroud travels from the shroud, through the ESD grounding clip, to the signal ground pin where it is harmlessly dissipated.
    Type: Application
    Filed: December 29, 2006
    Publication date: July 3, 2008
    Inventors: Steven Sprouse, Patricio Collantes, Dhaval Parikh
  • Patent number: 7354314
    Abstract: A semiconductor device is disclosed including a sheathless connector having a grounding pin which protects against electrical shorts and damage upon a backwards insertion of the connector to a host device. If the electrical connector is inserted backwards, the grounding pin mates with the signal ground terminal of the socket, and avoids contact with the remaining terminals. As a result, the damage otherwise occurring upon a backwards insertion of prior art devices is avoided.
    Type: Grant
    Filed: December 29, 2006
    Date of Patent: April 8, 2008
    Assignee: SanDisk Corporation
    Inventors: Steven Sprouse, Ka Ian Yung, Suresh Upadhyayula, Patricio Collantes