Patents by Inventor Steven T. McClure

Steven T. McClure has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11294702
    Abstract: A method for processing data includes receiving an offload request by a first virtual machine (VM), issuing, in response to the offload request and based on a processing pipeline, a processing request to a processing unit, and servicing, by the processing unit, the processing request to obtain a result.
    Type: Grant
    Filed: May 1, 2019
    Date of Patent: April 5, 2022
    Assignee: EMC IP Holding Company LLC
    Inventors: Jonathan I. Krasner, Steven R. Chalmer, Serge Joseph Pirotte, Steven T. McClure
  • Publication number: 20210382629
    Abstract: A method, computer program product, and computer system for receiving, by a computing device, an I/O request. It may be identified whether the I/O request is eligible for handling via a first path without also requiring handling via a second path. If the I/O request is eligible, the I/O request may be processed via the first path on a host I/O stack without processing the I/O request via the second path on a storage array I/O stack.
    Type: Application
    Filed: August 25, 2021
    Publication date: December 9, 2021
    Inventors: Adnan Sahin, Michael Scharland, Robert DeCrescenzo, Steven T. McClure, James Marriott Guyer, Jason J. Duquette
  • Patent number: 11106360
    Abstract: A method, computer program product, and computer system for receiving, by a computing device, an I/O request. It may be identified whether the I/O request is eligible for handling via a first path without also requiring handling via a second path. If the I/O request is eligible, the I/O request may be processed via the first path on a host I/O stack without processing the I/O request via the second path on a storage array I/O stack. If the I/O request is ineligible, the I/O request may be processed via the first path on the host I/O stack and via the second path on the storage array I/O stack.
    Type: Grant
    Filed: October 31, 2017
    Date of Patent: August 31, 2021
    Assignee: EMC IP Holding Company, LLC
    Inventors: Adnan Sahin, Michael Scharland, Robert DeCrescenzo, Steven T. McClure, James Marriott Guyer, Jason J. Duquette
  • Patent number: 11010060
    Abstract: A high performance logical device having low latency may be provided. I/Os to the logical device may be sent only to a primary director having sole ownership of the logical device. The primary director may perform operations locally for the logical device. Such operations may include allocating global memory for use with the logical device from only a global memory portion that is local to the primary director. The global memory may be a distributed global memory including memory from multiple directors and possibly multiple engines. Cached data for the logical device may be mirrored automatically by the data storage system. Alternatively, the cached data for the logical device may be mirrored using a host-based mirroring technique.
    Type: Grant
    Filed: June 20, 2019
    Date of Patent: May 18, 2021
    Assignee: EMC IP Holding Company LLC
    Inventors: Douglas E. LeCrone, Michael J. Scharland, Steven T. McClure, Jerome Cartmell
  • Publication number: 20200348959
    Abstract: A method for processing data includes receiving an offload request by a first virtual machine (VM), issuing, in response to the offload request and based on a processing pipeline, a processing request to a processing unit, and servicing, by the processing unit, the processing request to obtain a result.
    Type: Application
    Filed: May 1, 2019
    Publication date: November 5, 2020
    Inventors: Jonathan I. Krasner, Steven R. Chalmer, Serge Joseph Pirotte, Steven T. McClure
  • Patent number: 10437622
    Abstract: Operating a hypervisor includes running a hypervisor as a thread of an underlying operating system and loading a guest operating system using the hypervisor based on the thread of the underlying operating system, where the hypervisor runs independently of the guest operating system and independently of other hypervisors running as other threads of the underlying operating system. The hypervisor may be a first hypervisor and operating a hypervisor may further include running a second hypervisor nested with the first hypervisor, where the guest operating system may be loaded using both the first hypervisor and the second hypervisor. The underlying operating system may be an operating system of a storage system.
    Type: Grant
    Filed: June 2, 2015
    Date of Patent: October 8, 2019
    Assignee: EMC IP Holding Company LLC
    Inventors: Steven R. Chalmer, Matthew H. Fredette, Steven T. McClure, Uresh K. Vahalia
  • Publication number: 20190303017
    Abstract: A high performance logical device having low latency may be provided. I/Os to the logical device may be sent only to a primary director having sole ownership of the logical device. The primary director may perform operations locally for the logical device. Such operations may include allocating global memory for use with the logical device from only a global memory portion that is local to the primary director. The global memory may be a distributed global memory including memory from multiple directors and possibly multiple engines. Cached data for the logical device may be mirrored automatically by the data storage system. Alternatively, the cached data for the logical device may be mirrored using a host-based mirroring technique.
    Type: Application
    Filed: June 20, 2019
    Publication date: October 3, 2019
    Applicant: EMC IP Holding Company LLC
    Inventors: Douglas E. LeCrone, Michael J. Scharland, Steven T. McClure, Jerome Cartmell
  • Patent number: 10430220
    Abstract: Software emulations of physical devices allow protocol neutral communications between heterogeneous operating systems. Within a computing node of a storage cluster, a logical communications cut-through device connects a guest operating system to a front end adapter and enables the guest operating system to perform operations on an allocated portion of computing node memory without hypervisor intervention. The cut-through device may implement an industry standard memory-mapped interface, thereby enabling a guest operating system to discover the cut-through device and obtain access to memory that is shared with the hypervisor and/or another guest OS. Moreover, if guest OSs and/or the hypervisor share any communications protocol then the channel may be utilized at memory speeds. This may be advantageous in symmetric multiprocessing environments in which multiple guest OSs can have core affinities.
    Type: Grant
    Filed: September 24, 2015
    Date of Patent: October 1, 2019
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Steven R. Chalmer, Jonathan Krasner, Serge Pirotte, Matt Fredette, Steven T. McClure
  • Patent number: 10372345
    Abstract: A high performance logical device having low latency may be provided. I/Os to the logical device may be sent only to a primary director having sole ownership of the logical device. The primary director may perform operations locally for the logical device. Such operations may include allocating global memory for use with the logical device from only a global memory portion that is local to the primary director. The global memory may be a distributed global memory including memory from multiple directors and possibly multiple engines. Cached data for the logical device may be mirrored automatically by the data storage system. Alternatively, the cached data for the logical device may be mirrored using a host-based mirroring technique.
    Type: Grant
    Filed: April 27, 2017
    Date of Patent: August 6, 2019
    Assignee: EMC IP Holding Company LLC
    Inventors: Douglas E. LeCrone, Michael J. Scharland, Steven T. McClure, Jerome Cartmell
  • Patent number: 10146696
    Abstract: A data storage system includes compute engines each including a CPU complex, physical memory, interfaces to host computers and physical storage devices, and a fabric interface. A non-cache-coherent fabric interconnects the compute engines as cluster members of a cluster, the fabric supporting a global lock enabling each cluster member to obtain temporary exclusive access to addressable units of non-virtual memory. The CPU complexes implement a global virtual memory (GVM) on top of the non-virtual memory, including (1) a globally shared GVM page table of global page table entries, each identifying the cluster members having a corresponding GVM page mapped, and (2) GVM page management functionality including (i) use of the global lock to obtain exclusive access to the global page table entries for page management operations, and (ii) transfer of underlying data of the pages of the GVM among the cluster members.
    Type: Grant
    Filed: September 30, 2016
    Date of Patent: December 4, 2018
    Assignee: EMC IP Holding Company LLC
    Inventors: Louis Krigovski, David Reese, Clifford Lim, Steven T. McClure
  • Patent number: 9910753
    Abstract: A data storage system has first and second computing nodes that are interconnected by a switchless fabric. Each storage node includes first and second paired storage directors with an interconnecting communication link. Atomic operations sent between the computing nodes are mediated by network adapters. Atomic operations sent between paired storage directors via the interconnecting communication link are provided to a network adapter via an internal port and mediated by network adapter. The interconnecting communication links can be used as a backup path for atomic operations in the event of a link failure of the switchless fabric.
    Type: Grant
    Filed: December 18, 2015
    Date of Patent: March 6, 2018
    Assignee: EMC IP Holding Company LLC
    Inventors: Alesia Tringale, Steven T. McClure, Jerome Cartmell, Julie Zhivich
  • Patent number: 9898316
    Abstract: Operating at least one hypervisor includes running a first hypervisor as a first thread of an underlying operating system, running a second hypervisor as a second thread of the underlying operating system, loading a first guest operating system using the first hypervisor based on the first thread of the underlying operating system, loading a second guest operating system using the second hypervisor based on the second thread of the underlying operating system, and scheduling sharing of resources of the underlying system between the first hypervisor and the second hypervisor according to a scheduler of the underlying operating system, where the first hypervisor and the second hypervisor run independently of each other. The scheduler of the underlying operating system may schedule fractional time shares for the first hypervisor and the second hypervisor to access the same resource.
    Type: Grant
    Filed: September 30, 2011
    Date of Patent: February 20, 2018
    Assignee: EMC IP Holding Company LLC
    Inventors: Steve Chalmer, John Forecast, Matthew H. Fredette, Steven T. McClure, Serge J. Pirotte, David L. Reese
  • Patent number: 9753828
    Abstract: Maintaining failure survivability in a storage system includes determining a save time corresponding to an amount of time needed to transfer system data from volatile memory to non-volatile memory, determining a threshold corresponding to time for batteries to run while transferring data from volatile memory to non-volatile memory after a power loss, and providing an indication in response to the save time being greater than the threshold. The system may include a plurality of directors and the save time and the threshold may be determined for each of the directors. Determining a threshold may include determining an amount of battery time provided by battery power following power loss and multiplying the amount of battery time by a factor less than one, such as 0.8.
    Type: Grant
    Filed: August 20, 2015
    Date of Patent: September 5, 2017
    Assignee: EMC IP Holding Company LLC
    Inventors: Preston F. Crow, Preethi Natarajan, Steven T. McClure
  • Patent number: 9141505
    Abstract: Maintaining failure survivability in a storage system includes determining a save time corresponding to an amount of time needed to transfer system data from volatile memory to non-volatile memory, determining a threshold corresponding to time for batteries to run while transferring data from volatile memory to non-volatile memory after a power loss, and providing an indication in response to the save time being greater than the threshold. The system may include a plurality of directors and the save time and the threshold may be determined for each of the directors. Determining a threshold may include determining an amount of battery time provided by battery power following power loss and multiplying the amount of battery time by a factor less than one, such as 0.8.
    Type: Grant
    Filed: September 27, 2012
    Date of Patent: September 22, 2015
    Assignee: EMC Corporation
    Inventors: Preston F. Crow, Preethi Natarajan, Steven T. McClure
  • Patent number: 9075642
    Abstract: Operating a hypervisor includes running a hypervisor as a thread of an underlying operating system and loading a guest operating system using the hypervisor based on the thread of the underlying operating system, where the hypervisor runs independently of the guest operating system and independently of other hypervisors running as other threads of the underlying operating system. The hypervisor may be a first hypervisor and operating a hypervisor may further include running a second hypervisor nested with the first hypervisor, where the guest operating system may be loaded using both the first hypervisor and the second hypervisor. The underlying operating system may be an operating system of a storage system.
    Type: Grant
    Filed: September 30, 2011
    Date of Patent: July 7, 2015
    Assignee: EMC Corporation
    Inventors: Steve Chalmer, Matthew H. Fredette, Steven T. McClure, Uresh K. Vahalia
  • Patent number: 8996821
    Abstract: Methods and systems are disclosed for providing resource sharing in a computing environment using file descriptor isomorphism. The methods and systems may perform a method in a computing environment having processor systems executing processes. The method may include receiving a request from a first process to access a first resource. Further, the method may include generating a first Global File Descriptor (GFD) that references a first entry in a GFD table, the first GFD entry including a reference to a first entry in a resource descriptor table pointing to the first resource. Based on the request, at least one GFD field associated with the first GFD entry is configured. Thus, methods and systems may manage access by the first process to the first resource using the first GFD entry.
    Type: Grant
    Filed: December 15, 2004
    Date of Patent: March 31, 2015
    Assignee: EMC Corporation
    Inventors: Steven T. McClure, Steven R. Chalmer, Brett D. Niver
  • Patent number: 8990520
    Abstract: Global memory of a storage system may be used to provide NVRAM capabilities to guest operating systems accessing the storage system. The non-volatility of NVRAM (i.e. that retains its information when power is turned off) provides that an NVRAM device provided by global memory may be used as a journaling device to track storage operations and facilitate recovery and/or failover processing in a storage system without needing to add additional hardware and/or other installed devices. Use of the global memory according to the system described herein to provide an NVRAM device, that may function as a journaling device, provides for the speeding up of transactions, thereby improving metadata intensive operations performance and reducing recovery time and/or failover time of a storage system without adding additional hardware support.
    Type: Grant
    Filed: March 30, 2012
    Date of Patent: March 24, 2015
    Assignee: EMC Corporation
    Inventors: Hongliang Tang, Lixin Pang, Matthew H. Fredette, Patrick Brian Riordan, Uresh Vahalia, Steven T. McClure
  • Patent number: 8930568
    Abstract: When a guest OS loads within the context of a container provided by the host OS, the guest OS uses PCI or other protocol to specify a virtual hardware device. The guest OS enumerates the virtual hardware device to establish the size for the BARs and establish its view of physical addresses for the memory locations. A server running in the context of the container receives read/write requests from the guest OS, maps the read/write requests to host OS physical address space, and posts responses to the virtual hardware device. Since the guest OS executes memory related operations using its own memory space, exits to the container code are not required to implement storage related actions by the Guest OS. This allows performance of an application executing in the context of the guest OS to approximate performance of an application executing in the context of the host OS.
    Type: Grant
    Filed: December 20, 2011
    Date of Patent: January 6, 2015
    Assignee: EMC Corporation
    Inventors: Steve Chalmer, Steven T. McClure, Serge Pirotte, Velmurugan Rathnam, Animesh Singh, Hongliang Tang
  • Patent number: 8645623
    Abstract: A data storage system having protocol controller for converting packets between PCIE format used by a storage processor and Rapid IO format used by a packet switching network. The controller includes a PCIE end point for transferring atomic operation (DSA) requests, a data pipe section having a plurality of data pipes for passing user data; and a message engine section for passing messages among the plurality of storage processors. An acceleration path controller bypasses a DSA buffer in the absence of congestion on the network. Packets fed to the PCIE end point include an address portion having code indicating an atomic operation. An encoder converts the code from a PCIE format into the same atomic operation in SRIO format. Each one of a plurality of CPUs is adapted to perform a second DSA request during execution of a first DSA request.
    Type: Grant
    Filed: June 28, 2007
    Date of Patent: February 4, 2014
    Assignee: EMC Corporation
    Inventors: John O'Shea, Jeffrey Kinne, Michael Sgrosso, Steven T. McClure, Yechiel Yochai
  • Patent number: 8533696
    Abstract: Methods and systems are disclosed that relate to running a plurality of software instances on an embedded computer system without requiring substantial modifications to each software instance. An exemplary method includes storing context information relating to a first instance. An instance includes a set of independent threads of execution each with its own code context, interrupt service routines, drivers, and operating system services. Both a second instance and a thread associated with the second instance are chosen to run. Context information relating to the second instance is restored and the second instance is run on the operating system.
    Type: Grant
    Filed: September 29, 2006
    Date of Patent: September 10, 2013
    Assignee: EMC Corporation
    Inventors: Steven R. Chalmer, Steven T. McClure, David L. Reese