Patents by Inventor Steven Teig

Steven Teig has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9041430
    Abstract: An integrated circuit (IC) with a novel configurable routing fabric is provided. The configurable routing fabric has signal paths that propagate signals between user registers on user clock cycles. Each signal path includes a set of configurable storage elements and a set of configurable logic elements. Each configurable storage element in the path is reconfigurable on every sub-cycle of the user clock cycle to either store an incoming signal or to pass the incoming signal transparently.
    Type: Grant
    Filed: January 28, 2014
    Date of Patent: May 26, 2015
    Assignee: TABULA, INC.
    Inventors: Andre Rohe, Steven Teig, Herman Schmit, Jason Redgrave, Andrew Caldwell
  • Publication number: 20150135148
    Abstract: An abstract decision module primitive for placement within a logical representation (i.e., a netlist) of a circuit design is described. The decision module primitive receives as inputs alternative solutions for a given function or segment of a netlist. The alternative solutions include functionally equivalent, but structurally different implementations of the function or segment of the netlist. The decision module primitive alternatively selects between connecting one of the inputs to the netlist to provide a complete functional definition for the netlist based on constraint information. The selected input of the decision module may be updated as additional constraint information is determined throughout the various stages of the design process. In addition, alternative solutions for a given function or segment of the netlist may be added to and/or removed from the inputs of a decision module as additional constraint information is identified.
    Type: Application
    Filed: November 10, 2014
    Publication date: May 14, 2015
    Inventors: Andrew Caldwell, Steven Teig
  • Publication number: 20150130508
    Abstract: Some embodiments of the invention provide a configurable integrated circuit (IC). The IC includes at least fifty configurable circuits arranged in an array having a plurality of rows and a plurality of columns. Each configurable circuit for configurably performing a set of operations. At least a first configurable circuit reconfigures at a first reconfiguration rate. The first configurable circuit performs a different operation each time the first configurable circuit is reconfigured. The reconfiguration of the first configurable circuit does not follow any sequential progression through the set of operations of the first configurable circuit.
    Type: Application
    Filed: July 14, 2014
    Publication date: May 14, 2015
    Inventors: Herman Schmit, Michael Butts, Brad L. Hutchings, Steven Teig
  • Patent number: 9018978
    Abstract: A novel configurable integrated circuit (IC) that has several configurable circuits for configurably performing different operations is provided. During the operation of the IC, each particular configurable circuit performs a particular operation that is specified by a particular configuration data set for the particular configurable circuit. While the IC operates and a first set of configurable circuits performs a first set of operations, configuration data is loaded from the outside of the IC for configuring a second set of configurable circuits. The configurable IC includes a configuration network for rapid loading configuration data in the IC from outside of the IC. The configuration network is a pipelined network.
    Type: Grant
    Filed: April 25, 2014
    Date of Patent: April 28, 2015
    Assignee: Tabula, Inc.
    Inventors: Brad Hutchings, Jason Redgrave, Teju Khubchandani, Herman Schmit, Steven Teig
  • Patent number: 8990651
    Abstract: Some embodiments provide an integrated circuit (“IC”) with a primary circuit structure. The primary circuit structure is for performing multiple operations that implement a user design. The primary circuit structure includes multiple circuits. The IC also includes a secondary monitoring structure for monitoring multiple operations. The secondary monitoring structure includes a network communicatively coupled to multiple circuits of the primary circuit structure. The secondary monitoring circuit structure is for analyzing the monitored operations and reporting on the analysis to a circuit outside of the IC.
    Type: Grant
    Filed: September 19, 2008
    Date of Patent: March 24, 2015
    Assignee: Tabula, Inc.
    Inventors: Marc Miller, Steven Teig, Brad Hutchings
  • Publication number: 20150077158
    Abstract: Some embodiments provide a configurable IC that includes a configurable routing fabric with storage elements. In some embodiments, the routing fabric provides a communication pathway that routes signals to and from source and destination components. The routing fabric of some embodiments provides the ability to selectively store the signals passing through the routing fabric within the storage elements of the routing fabric. In this manner, a source or destination component continually performs operations (e.g., computational or routing) irrespective of whether a previous signal from or to such a component is stored within the routing fabric. The source and destination components include configurable logic circuits, configurable interconnect circuits, and various other circuits that receive or distribute signals throughout the configurable IC.
    Type: Application
    Filed: April 7, 2014
    Publication date: March 19, 2015
    Applicant: Tabula, Inc.
    Inventors: Steven Teig, Herman Schmit, Randy Renfu Huang
  • Publication number: 20150082261
    Abstract: Some embodiments of the invention provide a configurable integrated circuit (“IC”). The configurable IC includes a set of multiplexers that each has a set of input terminals, a set of output terminals, and a set of select terminals. The set of multiplexers includes a group of multiplexers, where at least one input terminal of each multiplexer in the group is a permanently inverting input terminal. During at least a set of cycles during the operation of the configurable IC, several multiplexers in the group of multiplexers are used to implement a particular function.
    Type: Application
    Filed: April 7, 2014
    Publication date: March 19, 2015
    Applicant: Tabula, Inc.
    Inventors: Andrew Caldwell, Herman Schmit, Steven Teig
  • Patent number: 8984464
    Abstract: A method of detailed placement for ICs is provided. The method receives an initial placement and iteratively builds sets of constraints for placement of different groups of cells in the IC design and uses a satisfiability solver to resolve placement violations. In some embodiments, the constraints include mathematical expressions that express timing requirements. The method in some embodiments converts the mathematical expressions into Boolean clauses and sends the clauses to a satisfiability solver that is only capable of solving Boolean clauses. In some embodiments, the method groups several cells in the user design and several sites on the IC fabric and uses the satisfiability solver to resolve all placement issues in the group. The satisfiability solver informs placer after each cell is moved to a different site. The method then dynamically builds more constraints based on the new cell placement and sends the constraints to the satisfiability solver.
    Type: Grant
    Filed: November 19, 2012
    Date of Patent: March 17, 2015
    Assignee: Tabula, Inc.
    Inventors: Andrew C. Mihal, Steven Teig
  • Publication number: 20150040094
    Abstract: Some embodiments provide a method of designing an integrated circuit (IC). The design is expressed as a graph that includes several nodes that represent several IC components. The nodes include a first set of nodes that represent a set of clocked elements. The method creates a second set of nodes by removing all nodes in the first set from the nodes that represent the IC components. The method identifies a set of edges that connect two nodes in the second set without encompassing a third node in the second set. The method assigns an event time to each node in the second set. The method assigns a cost function based on the event times of the nodes connected by each edge and the number of nodes in the first set encompassed by each edge. The method optimizes the cost function and places the components based on the cost function optimization.
    Type: Application
    Filed: August 15, 2014
    Publication date: February 5, 2015
    Inventors: Andrew Caldwell, Steven Teig
  • Patent number: 8941409
    Abstract: An integrated circuit (“IC”) having configurable logic circuits for configurably performing multiple different logic operations based on configuration data is provided. The IC includes a configurable routing fabric for configurably routing signals among configurable logic circuits. The configurable routing fabric includes a particular wiring path that connects an output of a source circuit to inputs of a destination circuit. The particular wiring path includes a first path and a second path that is parallel to the first path. The first and second paths are for configurably storing output signals of the source circuit. The first path connects to a first input of the destination circuit and the second path connects to a second input of the destination path.
    Type: Grant
    Filed: July 2, 2012
    Date of Patent: January 27, 2015
    Assignee: Tabula, Inc.
    Inventors: Martin Voogel, Steven Teig, Trevis Chandler
  • Patent number: 8935640
    Abstract: Some embodiments provide a method of monitoring the implementation of a user design in a configurable integrated circuit (IC). The method receives a user design for an IC and optimizes the user design to produce a second IC design. The optimization results in the elimination of circuit element(s). The method defines the second IC design for the configurable IC and generates output data for the eliminated circuit element(s) to allow for monitoring the user design.
    Type: Grant
    Filed: April 17, 2013
    Date of Patent: January 13, 2015
    Assignee: Tabula, Inc.
    Inventors: Brad Hutchings, Andrew Caldwell, Steven Teig
  • Patent number: 8935647
    Abstract: An abstract decision module primitive for placement within a logical representation (i.e., a netlist) of a circuit design is described. The decision module primitive receives as inputs alternative solutions for a given function or segment of a netlist. The alternative solutions include functionally equivalent, but structurally different implementations of the function or segment of the netlist. The decision module primitive alternatively selects between connecting one of the inputs to the netlist to provide a complete functional definition for the netlist based on constraint information. The selected input of the decision module may be updated as additional constraint information is determined throughout the various stages of the design process. In addition, alternative solutions for a given function or segment of the netlist may be added to and/or removed from the inputs of a decision module as additional constraint information is identified.
    Type: Grant
    Filed: August 31, 2013
    Date of Patent: January 13, 2015
    Assignee: Tabula, Inc.
    Inventors: Andrew Caldwell, Steven Teig
  • Publication number: 20150012782
    Abstract: An application-specific integrated circuit (ASIC) is provided. The ASIC includes a group of non-configurable circuits customized for performing operations for a particular use. The ASIC also includes a set of reconfigurable circuits for configurably performing a set of operations based on configuration data. The ASIC also includes a configuration and monitoring network that receives a set of signals from the non-configurable circuits of the ASIC. The configuration and monitoring network also receives incremental sets of configuration data while the ASIC is performing operations of the user design. Each incremental set of data is used for reconfiguring the configuration and monitoring network (i) to monitor one or more signals in the set of signals and (ii) to take a set of actions when values of the monitored signals satisfy a condition.
    Type: Application
    Filed: May 19, 2014
    Publication date: January 8, 2015
    Applicant: Tabula, Inc.
    Inventors: Andrea Olgiati, Matthew Pond Baker, Steven Teig
  • Publication number: 20150008957
    Abstract: A method of monitoring operations of a set of ICs. The method loads a first set of configuration data into a first IC for configuring a group of configurable circuits of the first IC to perform operations of a user design. The method receives a definition of an event based on values of a set of signals in the user design and a set of corresponding actions to take when the event occurs. The set of signals includes at least one signal received from a second IC. The method generates an incremental second set of configuration data based on the definition of the event and the set of corresponding actions. While the first IC is performing the operations of the user design, the method loads the incremental second set of configuration data into the first IC and monitors the signals received from the second IC at the first IC.
    Type: Application
    Filed: May 19, 2014
    Publication date: January 8, 2015
    Applicant: Tabula, Inc.
    Inventors: Andrea Olgiati, Matthew Pond Baker, Steven Teig
  • Publication number: 20150012903
    Abstract: A method of monitoring operations of a set of ICs. The method loads a first set of configuration data into a first IC for configuring a group of configurable circuits of the first IC to perform operations of a user design. The method receives a definition of an event based on values of a set of signals in the user design and a set of corresponding actions to take when the event occurs. The set of signals includes at least one signal received from a second IC. The method generates an incremental second set of configuration data based on the definition of the event and the set of corresponding actions. While the first IC is performing the operations of the user design, the method loads the incremental second set of configuration data into the first IC and monitors the signals received from the second IC at the first IC.
    Type: Application
    Filed: May 19, 2014
    Publication date: January 8, 2015
    Applicant: Tabula, Inc.
    Inventors: Andrea Olgiati, Matthew Pond Baker, Steven Teig
  • Patent number: 8928352
    Abstract: An integrated circuit (“IC”) that includes a configurable routing fabric with controllable storage elements is described. The routing fabric provides a communication pathway that routes signals to and from source and destination components. The routing fabric may provide the ability to selectively store the signals passing through the routing fabric within the storage elements of the routing fabric. In this manner, a source or destination component may continually perform operations (e.g., computational or routing) irrespective of whether a previous signal from or to such a component is stored within the routing fabric. The source and destination components include configurable logic circuits, configurable interconnect circuits, and various other circuits that receive or distribute signals throughout the IC.
    Type: Grant
    Filed: January 28, 2014
    Date of Patent: January 6, 2015
    Assignee: Tabula, Inc.
    Inventors: Jason Redgrave, Martin Voogel, Steven Teig
  • Publication number: 20150002190
    Abstract: A system and method for reducing power consumption in a reconfigurable integrated circuit. Some embodiments provide placement and routing programs that reduce the number of bits to be reconfigured. Some embodiments provide placement and routing programs that increase the number of groups of circuits that do not need reconfiguration at some times. Some embodiments include circuits that selectively block reconfiguration.
    Type: Application
    Filed: July 7, 2014
    Publication date: January 1, 2015
    Inventors: Randy R. Huang, Martin Voogel, Jingcao Hu, Steven Teig
  • Publication number: 20140372961
    Abstract: A system and method of determining paths of components when placing and routing configurable circuits. The method identifies a probabilistic data flow through multiple components using a simplified connection matrix. The simplified connection matrix is used to determine a probabilistic data flow through the components without data flowing from any component to itself. The probabilistic data flow is used to determine a probabilistic data flow through the components with some of the components having data flowing from themselves back to themselves. The probabilistic data flow through each component and the number of inputs of the components are used to determine a cost for each component. The cost of a path through the circuit is determined from the costs of the individual components in the path. The costs of the components are used to determine which path of components to use.
    Type: Application
    Filed: June 23, 2014
    Publication date: December 18, 2014
    Inventors: Eric A. Sather, Steven Teig
  • Patent number: 8912820
    Abstract: A system and method for reducing power consumption in a reconfigurable integrated circuit. Some embodiments provide placement and routing programs that reduce the number of bits to be reconfigured. Some embodiments provide placement and routing programs that increase the number of groups of circuits that do not need reconfiguration at some times. Some embodiments include circuits that selectively block reconfiguration.
    Type: Grant
    Filed: October 21, 2010
    Date of Patent: December 16, 2014
    Assignee: Tabula, Inc.
    Inventors: Randy R. Huang, Martin Voogel, Jingcao Hu, Steven Teig
  • Publication number: 20140337660
    Abstract: Some embodiments provide an integrated circuit (“IC”). The IC includes multiple configurable circuits that configurably perform operations of a user design based on configuration data. The IC also includes a configurable trigger circuit that receives a set of configuration data that specifies an operational event. The configurable trigger circuit also determines whether the operational event has occurred during implementation of the user design of the IC. Additionally, the operational trigger event outputs a trigger signal upon determining that the operational trigger event has occurred.
    Type: Application
    Filed: May 15, 2014
    Publication date: November 13, 2014
    Applicant: Tabula, Inc.
    Inventors: Brad Hutchings, Jason Redgrave, Dai Huang, Steven Teig