Patents by Inventor STMicroelectronics (R&D) Ltd.

STMicroelectronics (R&D) Ltd. has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130140693
    Abstract: A method for forming an integrated circuit including the steps of: a) forming openings in a front surface of a first semiconductor wafer, the depth of the openings being smaller than 10 ?m, and filling them with a conductive material; b) forming doped areas of components in active areas of the front surface, forming interconnection levels on the front surface and leveling the surface supporting the interconnection levels; c) covering with an insulating layer a front surface of a second semiconductor wafer, and leveling the surface coated with an insulator; d) applying the front surface of the second wafer coated with insulator on the front surface of the first wafer supporting interconnection levels, to obtain a bonding between the two wafers; e) forming vias from the rear surface of the second wafer, to reach the interconnection levels of the first wafer; and f) thinning the first wafer to reach the openings filled with conductive material.
    Type: Application
    Filed: November 28, 2012
    Publication date: June 6, 2013
    Applicant: STMicroelectronics S.A.
    Inventor: STMicroelectronics S.A.
  • Publication number: 20130145176
    Abstract: A method distributes personalized circuits to one or more parties. The method distributes a generic circuit to each party, encrypts a unique personalization value using a secret encryption key, and transmits each encrypted personalization value to the corresponding party. Each party then stores the encrypted personalization value in their circuit. The stored encrypted personalization value allows a piece of software to be properly executed by the circuit. A semiconductor integrated circuit is arranged to execute a piece of software that inputs a personalization value as an input parameter. The circuit comprises a personalization memory arranged to store an encrypted personalization value; a key memory for storing a decryption key; a control unit comprising a cryptographic circuit arranged to decrypt the encrypted personalization value using the decryption key; and a processor arranged to receive the decrypted personalization value and execute the software using the decrypted personalization value.
    Type: Application
    Filed: January 25, 2013
    Publication date: June 6, 2013
    Applicant: STMICROELECTRONICS R&D LIMITED
    Inventor: STMicroelectronics R&D Limited
  • Publication number: 20130142227
    Abstract: A circuit includes a first n-bit communications block and a second m-bit communications block. A controller is configured to control mode of operation for the first and second communications blocks. In a first mode, the first and second communications blocks function as a single communications block for n+m bit communications. In a second mode, the first and second communications blocks operate as substantially independent communications block for n bit communications and m bit communications.
    Type: Application
    Filed: October 15, 2012
    Publication date: June 6, 2013
    Applicants: STMICROELECTRONICS SA, STMICROELECTRONICS (GRENOBLE 2) SAS, STMICROELECTRONICS (R&D) LTD
    Inventors: STMicroelectronics SA, STMicroelectronics (R&D) Ltd, STMicroelectronics (Grenoble 2) SAS
  • Publication number: 20130136129
    Abstract: A router includes a plurality of virtual networks, a plurality of output links, at least one decoder and arbitration circuitry. Each virtual network has a plurality of virtual network inputs and a plurality of virtual network outputs. Each virtual network output is associated with an output link. The decoder decodes a header of a data unit received on a virtual network of one of the virtual network inputs. The decoder generates a first request and a second request. The first request is for the allocation of a virtual network output of the virtual network to the virtual network input. The second request is for the allocation of an output link associated with the virtual network output to the virtual network output. The arbitration circuitry performs arbitration of the first request and arbitration of the second request in parallel.
    Type: Application
    Filed: November 9, 2012
    Publication date: May 30, 2013
    Applicant: STMicroelectronics (Grenoble 2) SAS
    Inventor: STMicroelectronics (Grenoble 2) SAS
  • Publication number: 20130134131
    Abstract: A process for manufacturing a membrane of nozzles of a spray device, comprising the steps of laying a substrate, forming a membrane layer on the substrate, forming a plurality of nozzles in the membrane layer, forming a plurality of supply channels in the substrate, each supply channel being substantially aligned in a vertical direction to a respective nozzle of the plurality of nozzles and in direct communication with the respective nozzle.
    Type: Application
    Filed: January 30, 2013
    Publication date: May 30, 2013
    Applicant: STMicroelectronics S.r.l.
    Inventor: STMicroelectronics S.r.l.
  • Publication number: 20130135970
    Abstract: A data transmission device includes a coder configured to code the data into a multifrequency signal. A first array of ultrasonic transducers with a vibrating membrane is disposed on a first surface of a wafer. The first array configured to convert the signal into a multifrequency acoustic signal propagating in the wafer. A second array of ultrasonic transducers is disposed on a second surface of the wafer. The second array includes at least two assemblies of vibrating membrane ultrasonic transducers having resonance frequencies equal to two different frequencies of the multifrequency signal.
    Type: Application
    Filed: November 13, 2012
    Publication date: May 30, 2013
    Applicants: UNIVERSITE FRANCOIS RABELAIS, STMICROELECTRONICS (TOURS) SAS
    Inventors: STMicroelectronics (Tours) SAS, Universite Francois Rabelais
  • Publication number: 20130138975
    Abstract: A method for loading a program, contained in at least a first memory, into a second memory accessible by an execution unit, in which the program is in a cyphered form in the first memory, a circuit for controlling the access to the second memory is configured from program initialization data, instructions of the program, and at least initialization data being decyphered to be transferred into the second memory after configuration of the circuit.
    Type: Application
    Filed: January 28, 2013
    Publication date: May 30, 2013
    Applicant: STMicroelectronics S.A.
    Inventor: STMicroelectronics S.A.
  • Publication number: 20130136352
    Abstract: A method of processing digital images by transforming a set of pixels from a three-dimensional space to a normalized two-dimensional space, determining a membership class and membership class level of each pixel in the set of pixels, and selectively modifying colors of pixels in the set of pixels based on the determined membership classes and membership class levels.
    Type: Application
    Filed: January 14, 2013
    Publication date: May 30, 2013
    Applicant: STMicroelectronics S.r.l.
    Inventor: STMicroelectronics S.r.l.
  • Publication number: 20130127454
    Abstract: A magnetic field sensor, including a Hall magnetic sensor, formed within a first die and configured to detect a first magnetic field, and a first anisotropic magnetoresistive magnetic sensor, having a first anisotropic magnetoresistive transducer, formed within a second die and configured to generate an electrical measurement quantity as a function of a second magnetic field. An electronic reading circuit formed within the first die, is electrically connected to the first anisotropic magnetoresistive transducer, and provides a first measure indicating the second magnetic field, on the basis of the electrical measurement quantity. The first and second dice are fixed with respect to one another and have main surfaces parallel to the same reference plane. The first magnetic field being oriented in a first direction perpendicular to the reference plane and the second magnetic field being oriented in a second direction parallel to the reference plane.
    Type: Application
    Filed: November 21, 2012
    Publication date: May 23, 2013
    Applicant: STMicroelectronics S.e.I.
    Inventor: STMicroelectronics S.r.I.
  • Publication number: 20130127549
    Abstract: An electronic circuit including two ring oscillators, wherein the output of each ring oscillator is looped back on the input of this same oscillator as well on the input of the other oscillator. The application of such a circuit to the detection of a dynamic disturbance.
    Type: Application
    Filed: November 6, 2012
    Publication date: May 23, 2013
    Applicant: STMicroelectronics (Rousset) SAS
    Inventor: STMicroelectronics (Rousset) SAS
  • Publication number: 20130130492
    Abstract: Solder joint reliability in an integrated circuit package is improved. Each terminal of a quad, flat, non-leaded integrated circuit package is formed having portions that define a solder slot in the bottom surface of the terminal. An external surface of the die pad of the integrated circuit package is also formed having portions that define a plurality of solder slots on the periphery of the die pad. When solder is applied to the die pad and to the terminals, the solder that fills the solder slots increases the solder joint reliability of the integrated circuit package.
    Type: Application
    Filed: November 8, 2012
    Publication date: May 23, 2013
    Applicant: STMicroelectronics, Inc.
    Inventor: STMicroelectronics, Inc.
  • Publication number: 20130128656
    Abstract: A static random access memory (SRAM) device includes a memory array of a plurality of memory cells, a controller that receives an external clock signal formed by a succession of external pulses and generates an internal clock signal formed by a succession of internal pulses, and a driving circuit that receives the internal clock signal. The controller is operable in a first mode, wherein the controller generates, for each external pulse, a corresponding internal pulse and the controller controls the driving circuit so that the driving circuitry carries out one access to the memory array for each internal pulse. The controller is further operable in a second mode, wherein the controller generates, for each external pulse, a pair of internal pulses, and the controller controls the driving circuitry so that, for each pair of internal pulses, the driving circuitry writes a first data item in a set of memory cells, and then reads the set of memory cells, so as to acquire a second data item.
    Type: Application
    Filed: November 20, 2012
    Publication date: May 23, 2013
    Applicants: STMicroelectronics S.r.l., STMicroelectronics PVT LTD.
    Inventors: STMicroelectronics PVT LTD., STMicroelectronics S.r.l.
  • Publication number: 20130127536
    Abstract: A fully differential operational amplifier includes a differential input stage, at least one output stage and a common-mode feedback circuit connected with the input stage. The differential input stage includes a differential pair of transistors and a bias circuit for the differential pair of transistors. A start-up circuit operates to detect an operating condition of the differential pair of transistors of the input stage and in response thereto turn on the bias circuit.
    Type: Application
    Filed: November 15, 2012
    Publication date: May 23, 2013
    Applicants: STMICROELECTRONICS S.R.L., STMICROELECTRONICS (GRENOBLE 2) SAS
    Inventors: STMicroelectronics (Grenoble 2) SAS, STMicroelectronics S.r.l.
  • Publication number: 20130121070
    Abstract: A memory device includes first and second inverters cross-coupled between first and second nodes. The first inverter is configured to be supplied by a first supply voltage via a first transistor and the second inverter is configured to be supplied by the first supply voltage via a second transistor. A first control circuit is configured to control a gate node of the first transistor based on the voltage at the second node and at a gate node of the second transistor. A second control circuit is configured to control the gate node of the second transistor based on the voltage at the first node and at the gate node of the first transistor.
    Type: Application
    Filed: November 5, 2012
    Publication date: May 16, 2013
    Applicant: STMICROELECTRONICS (CROLLES 2) SAS
    Inventor: STMicroelectronics (Crolles 2) SAS
  • Publication number: 20130121157
    Abstract: In accordance with an embodiment, a network device includes a network controller and at least one network interface coupled to the network controller that includes at least one media access control (MAC) device configured to be coupled to at least one physical layer interface (PHY). The network controller may be configured to determine a network path comprising the at least one network interface that has a lowest power consumption of available media types coupled to the at least one PHY.
    Type: Application
    Filed: September 28, 2012
    Publication date: May 16, 2013
    Applicant: STMICROELECTRONICS, INC.
    Inventor: STMicroelectronics, Inc.
  • Publication number: 20130119282
    Abstract: An optical detection sensor and method of forming same. The optical detection sensor be a proximity detection sensor that includes an optical system and a selectively transmissive structure. Electromagnetic radiation such as laser light can be emitted through a transmissive portion of the selectively transmissive structure. A reflected beam can be detected to determine the presence of an object.
    Type: Application
    Filed: November 7, 2012
    Publication date: May 16, 2013
    Applicant: STMicroelectronics Pte Ltd.
    Inventor: STMicroelectronics Pte Ltd.
  • Publication number: 20130118256
    Abstract: A MEMS gyroscope includes: a microstructure having a fixed structure, a driving mass, movable with respect to the fixed structure according to a driving axis, and a sensing mass, mechanically coupled to the driving mass so as to be drawn in motion according to the driving axis and movable with respect to the driving mass according to a sensing axis, in response to rotations of the microstructure; and a driving device, for keeping the driving mass in oscillation with a driving frequency. The driving device includes a discrete-time sensing interface, for detecting a position of the driving mass with respect to the driving axis and a control stage for controlling the driving frequency on the basis of the position of the driving mass.
    Type: Application
    Filed: January 11, 2013
    Publication date: May 16, 2013
    Applicant: STMICROELECTRONICS S.R.L.
    Inventor: STMicroelectronics S.r.l.
  • Publication number: 20130120049
    Abstract: A power switch includes first and second MOS transistors in series between first and second nodes. Both the first and second transistors have a gate coupled to its substrate. First and second resistive elements are coupled between the gate of the first transistor and the first node, and between the gate of the second transistor and the second node, respectively. A triac is coupled between the first and second nodes. The gate of the triac is coupled to a third node common to the first and second transistors. A third MOS transistor has a first conduction electrode coupled to the gate of the first transistor and a second conduction electrode coupled to the gate of the second transistor.
    Type: Application
    Filed: November 1, 2012
    Publication date: May 16, 2013
    Applicant: STMICROELECTRONICS SA
    Inventor: STMicroelectronics SA
  • Publication number: 20130119134
    Abstract: An antenna circuit for a device of transmission/reception by inductive coupling, including a first inductive element in parallel with a capacitive element and, between each node of the parallel association and two terminals of a switch, a second inductive element.
    Type: Application
    Filed: October 29, 2012
    Publication date: May 16, 2013
    Applicant: STMicroelectronics (Rousset) SAS
    Inventor: STMicroelectronics (Rousset) SAS
  • Publication number: 20130120012
    Abstract: A method of testing integrated circuits, including establishing at least a first physical communication channel between a test equipment and an integrated circuit under test by having at least a first probe of the test equipment contacting a corresponding physical contact terminal of the integrated circuit under test; having the test equipment and the integrated circuit under test exchange, over said first physical communication channel, at least two signals selected from the group including at least two test stimuli and at least two test response signals, wherein said at least two signals are exchanged by means of at least one modulated carrier wave modulated by the at least two signals.
    Type: Application
    Filed: December 14, 2012
    Publication date: May 16, 2013
    Applicant: STMicroelectronics S.r.I.
    Inventor: STMicroelectronics S.r.I.