Abstract: A semiconductor device comprises a semiconductor wafer; a piezoelectric resonator formed on the wafer, and an active circuit also formed on the wafer. The active circuit (e.g., a frequency divider) is electrically connected to the piezoelectric resonator.

Abstract: An integrated resonator apparatus comprises a piezoelectric resonator, an acoustic Bragg reflector coupled to the piezoelectric resonator, and a substrate on which the acoustic Bragg reflector is disposed. The apparatus also includes an active heater layer covering the piezoelectric resonator. Heat produced by the active heater layer is controllable by an amount of current provided through the heater layer.

Abstract: An integrated resonator apparatus includes a piezoelectric resonator and an acoustic Bragg reflector formed adjacent the piezoelectric resonator. The integrated resonator apparatus also includes a mass bias formed over the Bragg reflector on a side of the piezoelectric resonator opposite the piezoelectric resonator.

Abstract: In one aspect there is provided a gray scale lithographic mask that comprises a transparent substrate and a metallic layer located over the substrate, wherein the metallic layer has tapered edges with a graded transparency. The lithographic mask, along with etching processes may be used to transfer a pattern 450a into a layer of a semiconductor device.

Abstract: In one aspect there is provided a gray scale lithographic mask that comprises a transparent substrate and a metallic layer located over the substrate, wherein the metallic layer has tapered edges with a graded transparency. The lithographic mask, along with etching processes may be used to transfer a pattern 450a into a layer of a semiconductor device.

Abstract: The invention provides methods and systems for laser assisted wirebonding. One or more conditioning laser pulses are used to prepare a bonding surface for wirebonding by removing impurities such as residues from manufacturing processes, oxides, or irregularities on the bonding surface. Subsequently, a free air ball is brought into contact with the conditioned bonding surface to form a weld.

Abstract: The invention provides methods and systems for laser assisted wirebonding. One or more conditioning laser pulses are used to prepare a bonding surface for wirebonding by removing impurities such as residues from manufacturing processes, oxides, or irregularities on the bonding surface. Subsequently, a free air ball is brought into contact with the conditioned bonding surface to form a weld.

Abstract: A piezoelectric resonator with an acoustic Bragg reflector that includes alternating layers of high and low acoustic impedance materials. The high and low acoustic impedance dielectric materials make up electrically insulating layers.

Abstract: A thermal inkjet printhead 100 of the present invention includes a heating element 110, an ink chamber, control circuitry 108, an ink reservoir, and a memory array 106. The control circuitry 108 causes the heating element to generate thermal energy thereby causing ink within the ink chamber to generate bubbles of ink, which are then expelled through a nozzle. The ink reservoir replenishes used ink in the ink chamber. The memory array 106 stores and provides the identification parameters for the thermal inkjet printhead 100. The identification parameters are typically provided during initialization of the printer and include color(s) of ink (e.g., black, green, red, blue), a number of nozzles on the thermal inkjet printhead, an addressing frequency, nozzle spacing, heating architecture, and the like.

Abstract: The invention provides methods and systems for laser assisted wirebonding. One or more conditioning laser pulses are used to prepare a bonding surface for wirebonding by removing impurities such as residues from manufacturing processes, oxides, or irregularities on the bonding surface. Subsequently, a free air ball is brought into contact with the conditioned bonding surface to form a weld.

Abstract: A piezoelectric resonator with an acoustic Bragg reflector that includes alternating layers of high and low acoustic impedance materials. The high and low acoustic impedance dielectric materials make up electrically insulating layers.

Abstract: The present invention provides a method and product-by-method of integrating a bias resistor in circuit with a bottom electrode of a micro-electromechanical switch on a silicon substrate. The resistor and bottom electrode are formed simultaneously by first sequentially depositing a layer of a resistor material (320), a hard mask material (330) and a metal material (340) on a silicon substrate forming a stack. The bottom electrode and resistor lengths are subsequently patterned and etched (350) followed by a second etching (360) process to remove the hard mask and metal materials from the defined resistor length. Finally, in a preferred embodiment, the bottom electrode and resistor structure is encapsulated with a layer of dielectric which is patterned and etched (370) to correspond to the defined bottom electrode and resistor.

Abstract: A thin film resistor (60) is contained between two metal interconnect layers (40, 100) of an integrated circuit. Contact may be made to the resistor (60) through vias (95) from the metal layer (100) above the resistor (60) to both the thin film resistor (60) and the underlying metal layer (40) simultaneously. The resistor (60) may include portions of a hard mask (70) under the vias (95) to protect the resistor material (60) during the via (95) etch. This design provides increased flexibility in fabricating the resistor (60) since processes, materials, and chemicals do not have to satisfy the conditions of both the resistor (60) and the rest of the integrated circuit (especially the interconnect layer 40) simultaneously.

Abstract: A method for integrating a thin film resistor into an interconnect process flow where one of the metal layers is used as a hardmask. After a via (42) etch and fill, the thin film resistor material (62) is deposited. The metal interconnect layer (76) is then deposited, including any barrier layers desired. The metal leads (70) are then etched together with the shape of the thin film resistor (60). The metal (76) over the thin film resistor (60) is then removed.

Abstract: The present invention provides a method and product-by-method of integrating a bias resistor in circuit with a bottom electrode of a micro-electromechanical switch on a silicon substrate. The resistor and bottom electrode are formed simultaneously by first sequentially depositing a layer of a resistor material (320), a hard mask material (330) and a metal material (340) on a silicon substrate forming a stack. The bottom electrode and resistor lengths are subsequently patterned and etched (350) followed by a second etching (360) process to remove the hard mask and metal materials from the defined resistor length. Finally, in a preferred embodiment, the bottom electrode and resistor structure is encapsulated with a layer of dielectric which is patterned and etched (370) to correspond to the defined bottom electrode and resistor.

Abstract: A thin film resistor (60) is contained between two metal interconnect layers (40, 100) of an integrated circuit. Contact may be made to the resistor (60) through vias (95) from the metal layer (100) above the resistor (60) to both the thin film resistor (60) and the underlying metal layer (40) simultaneously. The resistor (60) may include portions of a hard mask (70) under the vias (95) to protect the resistor material (60) during the via (95) etch. This design provides increased flexibility in fabricating the resistor (60) since processes, materials, and chemicals do not have to satisfy the conditions of both the resistor (60) and the rest of the integrated circuit (especially the interconnect layer 40) simultaneously.

Abstract: A resonant microcavity display (20) having microcavity with a substrate (25), a phosphor active region (50) and front and rear reflectors (30 and 60). The front and rear reflectors may be spaced to create either a standing or treaveling eledtromagnetic wave to enhance the efificenty of the light transmission.

Abstract: The present invention provides a method and product-by-method of integrating a bias resistor in circuit with a bottom electrode of a micro-electromechanical switch on a silicon substrate. The resistor and bottom electrode are formed simultaneously by first sequentially depositing a layer of a resistor material (320), a hard mask material (330) and a metal material (340) on a silicon substrate forming a stack. The bottom electrode and resistor lengths are subsequently patterned and etched (350) followed by a second etching (360) process to remove the hard mask and metal materials from the defined resistor length. Finally, in a preferred embodiment, the bottom electrode and resistor structure is encapsulated with a layer of dielectric which is patterned and etched (370) to correspond to the defined bottom electrode and resistor.

Abstract: A viewing surface capable of high contrast and high resolution comprising one or more materials that preferentially reflect or transmit or scatter monochromatic light at the primary wavelengths necessary to generate the color gamut appropriate for a given display application. A viewing surface capable of high contrast and high resolution comprising one or more materials which can include rare earth ions, etc. and may be combined with absorbing substrates and/or interference filters.

Abstract: A method for integrating a thin film resistor (60) into an interconnect process flow. Metal interconnect lines (40) are formed over a semiconductor body (10). An interlevel dielectric (50) is then formed over the metal interconnect lines (40). Conductively filled vias (62) are then formed through the interlevel dielectric (50) to the metal interconnect lines (40). A thin film resistor (60) is then formed connecting between at least two of the conductively filled vias (62) using a single mask step. Connection to the resistor (60) is from below using a via process sequence already required for connecting between interconnect layers (40, 64). Thus, only one additional mask step is required to incorporate the resistor (60).