Patents by Inventor Stuart Moore
Stuart Moore has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 8478110Abstract: A digital television recorder to record television programs, having a recording section to record data onto a storage medium, a filter to identify from a received transport stream, data of a television program for recording, a timer to be set with a time and, at that time, to start the recording onto the storage medium, data of the television program received from the filter, and a cache to store data of the interactive services associated with the television programs and provided in the respective transport streams. The filter identifies data of interactive services associated with the television programs, the timer starts, at a predetermined interval before the time, acquisition of the data of interactive services and storing acquired data of interactive services in the cache, and the recording section records, immediately prior to starting recording the data of the television program, the content of the cache to the storage medium.Type: GrantFiled: August 20, 2009Date of Patent: July 2, 2013Assignee: Sony United Kingdom LimitedInventor: Nigel Stuart Moore
-
Publication number: 20110297476Abstract: A marine seismic source comprises a housing having a central axis, an open end, and a closed end opposite the open end. In addition, the source comprises a piston coaxially disposed within the housing. In addition, the source comprises a flywheel disposed within the housing and axially positioned between the closed end and the piston. The flywheel is configured to rotate about a rotational axis. Further, the source comprises a connecting rod moveably coupling the piston to the flywheel. The connecting rod has a first end pivotally coupled to the piston and a second end pivotally coupled to the flywheel. The second end of the connecting rod has a first position at a first distance measured radially from the rotational axis, and a second position at a second distance measured radially from the rotational axis. The first distance is less than the second distance.Type: ApplicationFiled: June 8, 2011Publication date: December 8, 2011Applicant: BP CORPORATION NORTH AMERICA INC.Inventors: Mark Harper, Martin Thompson, Stuart Moore
-
Publication number: 20100233032Abstract: A cartridge is used in apparatus for analysing a sample comprising a fluid and has a sample receiving cell which receives the fluid for analysis. The cell comprises a surface on one of two housing parts (120; 200; 300; 102; 202; 302) and a sensor comprising an electrical-mechanical transducer (92; 240; 340) spaced from said surface. The sensor is attached to one of the housing parts by an adhesive membrane (100; 246; 346) wherein the membrane is attached only to one of said parts of housing so that any slight relative movement or flexing of the housing parts does not result in forces being applied to the sensor via the membrane.Type: ApplicationFiled: September 26, 2007Publication date: September 16, 2010Inventors: Mark John Frogley, Christopher John Hammond, Stuart Moore, Klaus Whieler
-
Patent number: 7288723Abstract: A circuit board including a signal transmission channel includes a dielectric substrate and a signal transmission channel which may be formed on the dielectric substrate. The signal transmission channel may include a conductor, a lossy dielectric material which may longitudinally encapsulate the conductor and a conductive material which may longitudinally encapsulate the lossy dielectric.Type: GrantFiled: April 2, 2003Date of Patent: October 30, 2007Assignee: Sun Microsystems, Inc.Inventors: Edward Hugh Welbon, Roy Stuart Moore
-
Patent number: 7131047Abstract: A test system includes a device under test and a test circuit board. The device under test includes a plurality of contacts configured to provide output signals. The test circuit board may convey the output signals from the device under test to an analyzer. The test circuit board may include a dielectric layer, a via extending through the dielectric layer, a conductor formed on the dielectric layer and a resistive annular ring having a predetermined resistance value. The resistive annular ring may be formed around the via and may be electrically coupled between the via and the conductor.Type: GrantFiled: April 7, 2003Date of Patent: October 31, 2006Assignee: Sun Microsystems, Inc.Inventors: Edward Hugh Welbon, Roy Stuart Moore
-
Patent number: 7080305Abstract: A system and method for correcting data errors. A system for correcting errors in blocks of data received over a communication medium includes an error history unit coupled to an error correction unit. The error history unit may maintain information associated with each bit position of the blocks of data in which a correctable error has occurred. The error correction unit may perform an error correction on a given block of data using an error correction code capable of correcting at least a single bit error and detecting multiple bit errors. Further, in response to detecting a multiple bit error, the error correction unit may correct subsequent errors in the given block of data dependent upon the information maintained by the error history unit.Type: GrantFiled: December 23, 2002Date of Patent: July 18, 2006Assignee: Sun Microsystems, Inc.Inventors: Edward Hugh Welbon, Mary Ellen Mosher, Roy Stuart Moore
-
Publication number: 20040256899Abstract: An upper torso support structure is provided to hold and/or restrict movement of a patient suffering from injuries or muscular or skeletal defects. The support is provided by a central spine (1) and a number of left and right pairs of flexible ribs (3) curving round in front of the central spine. The ribs are capable of being set in desired attitudes to restrict movement of the patient whose torso is held by the support structure.Type: ApplicationFiled: June 10, 2004Publication date: December 23, 2004Inventors: Stuart Moore, John Edward Goldsmith
-
Publication number: 20040199844Abstract: A test system includes a device under test and a test circuit board. The device under test includes a plurality of contacts configured to provide output signals. The test circuit board may convey the output signals from the device under test to an analyzer. The test circuit board may include a dielectric layer, a via extending through the dielectric layer, a conductor formed on the dielectric layer and a resistive annular ring having a predetermined resistance value. The resistive annular ring may be formed around the via and may be electrically coupled between the via and the conductor.Type: ApplicationFiled: April 7, 2003Publication date: October 7, 2004Applicant: Sun Microsystems, Inc.Inventors: Edward Hugh Welbon, Roy Stuart Moore
-
Publication number: 20040196112Abstract: A circuit board including a signal transmission channel includes a dielectric substrate and a signal transmission channel which may be formed on the dielectric substrate. The signal transmission channel may include a conductor, a lossy dielectric material which may longitudinally encapsulate the conductor and a conductive material which may longitudinally encapsulate the lossy dielectric.Type: ApplicationFiled: April 2, 2003Publication date: October 7, 2004Applicant: Sun Microsystems, Inc.Inventors: Edward Hugh Welbon, Roy Stuart Moore
-
Publication number: 20040193989Abstract: A test system for testing a device under test which includes a plurality of output signal contacts arranged in a particular footprint pattern. The test system may include a test chip which may have a plurality of input signal contacts for receiving signals conveyed from the device under test. The plurality of input signal contacts may be arranged to symmetrically match the particular footprint pattern. The test chip may further include additional contacts for conveying output signals to be analyzed. In addition, the test system includes a test circuit board including a plurality of through-hole vias that connect the plurality of output signal contacts to the plurality of input signal contacts. Further, the test circuit board may include a plurality of blind vias for conveying the output signals to be analyzed to an analyzer unit.Type: ApplicationFiled: March 28, 2003Publication date: September 30, 2004Applicant: Sun Microsystems, Inc.Inventors: Edward Hugh Welbon, Roy Stuart Moore
-
Publication number: 20040123213Abstract: A system and method for correcting data errors. A system for correcting errors in blocks of data received over a communication medium includes an error history unit coupled to an error correction unit. The error history unit may maintain information associated with each bit position of the blocks of data in which a correctable error has occurred. The error correction unit may perform an error correction on a given block of data using an error correction code capable of correcting at least a single bit error and detecting multiple bit errors. Further, in response to detecting a multiple bit error, the error correction unit may correct subsequent errors in the given block of data dependent upon the information maintained by the error history unit.Type: ApplicationFiled: December 23, 2002Publication date: June 24, 2004Inventors: Edward Hugh Welbon, Mary Ellen Mosher, Roy Stuart Moore
-
Patent number: 6282600Abstract: A method and implementing system are provided in which a service processor is implemented in addition to system processors. The service processor is enabled to access system on-chip registers to acquire system data through the use of the system JTAG bus connections. In one embodiment, logic is provided to determine concurrent calls for use of the same registers by both the system processor(s) and also by the service processor through the JTAG bus. In case of concurrent requests, the JTAG data are held so as not to interfere with system operations until the system processor's use of the registers has been completed.Type: GrantFiled: August 14, 1998Date of Patent: August 28, 2001Assignee: International Business Machines CorporationInventors: Warren Edward Maule, Roy Stuart Moore, David W. Victor, Edward Hugh Welbon
-
Patent number: 6189072Abstract: A performance monitor implementing a plurality of counters counts several events to provide an instruction fetch bandwidth analysis, a cycles per instruction (CPI) infinite and finite analysis, an operand fetch bandwidth analysis, an instruction parallelism analysis, and a trailing edge analysis. Such analyses are performed on the performance of a data processing system in order that the designer may develop an improved processor architecture.Type: GrantFiled: December 17, 1996Date of Patent: February 13, 2001Assignee: International Business Machines CorporationInventors: Frank Eliot Levine, Roy Stuart Moore, Charles Philip Roth, Edward Hugh Welbon
-
Patent number: 6157933Abstract: A method and apparatus for loading multiple animated images on a Web page during browsing over a network with limited bandwidth. The method comprising the steps of: (1) retrieving hypertext objects containing a Java applet from servers over a network into a browser utilizing a Java engine for running Java applets; (2) displaying a default image and default image effects by the Java applet; and (3) the Java applet retrieving a target image series comprising a series of related images from the server and loading the target image series one image at a time with screen transition effects in between each image so that a speed of the screen transition effects is set to finish when a next image in the image series is retrieved over the network of limited bandwidth and prepared for loading by said Java applet, thereby making the speed of the screen transition effects proportional to a time required to retrieved the next image in the image series.Type: GrantFiled: November 26, 1997Date of Patent: December 5, 2000Assignee: International Business Machines CorporationInventors: Joseph Celi, Jr., Wendi Lynn Nusbickel, Glen Robert Walters, Victor Stuart Moore
-
Patent number: 6085338Abstract: A performance monitor implementing a plurality of counters counts several events to provide an instruction fetch bandwidth analysis, a cycles per instruction (CPI) infinite and finite analysis, an operand fetch bandwidth analysis, an instruction parallelism analysis, and a trailing edge analysis. Such analyses are performed on the performance of a data processing system in order that the designer may develop an improved processor architecture.Type: GrantFiled: December 17, 1996Date of Patent: July 4, 2000Assignee: International Business Machines CorporationInventors: Frank Eliot Levine, Roy Stuart Moore, Charles Philip Roth, Edward Hugh Welbon
-
Patent number: 6067644Abstract: A processor operable for processing an instruction through a plurality of internal stages will produce a result of the processing of the process at each stage or a reason code why the stage was unable to process the instruction. The result or the reason code will then be passed to a subsequent stage, which will attempt to process the instruction. The second stage will forward the reason code when it cannot produce its own result and it is idle. The second stage will create its own reason code when it is not idle but cannot produce a result, and will forward this reason code.Type: GrantFiled: April 15, 1998Date of Patent: May 23, 2000Assignee: International Business Machines CorporationInventors: Frank Eliot Levine, Roy Stuart Moore, Charles Philip Roth, Edward Hugh Welbon
-
Patent number: 6061797Abstract: A firewall isolates computer and network resources inside the firewall from networks, computers and computer applications outside the firewall. Typically, the inside resources could be privately owned databases and local area networks (LAN's), and outside objects could include individuals and computer applications operating through public communication networks such as the Internet. Usually, a firewall allows for an inside user or object to originate connection to an outside object or network, but does not allow for connections to be generated in the reverse direction; i.e. from outside in. The disclosed invention provides a special "tunneling" mechanism, operating on both sides of a firewall, for establishing such "outside in" connections when they are requested by certain "trusted" individuals or objects or applications outside the firewall.Type: GrantFiled: August 12, 1998Date of Patent: May 9, 2000Assignee: International Business Machines CorporationInventors: Prashanth Jade, Victor Stuart Moore, Arun Mohan Rao, Glen Robert Walters
-
Patent number: 5961654Abstract: A performance monitor implementing a plurality of counters counts several events to provide an instruction fetch bandwidth analysis, a cycles per instruction (CPI) infinite and finite analysis, an operand fetch bandwidth analysis, an instruction parallelism analysis, and a trailing edge analysis. Such analyses are performed on the performance of a data processing system in order that the designer may develop an improved processor architecture.Type: GrantFiled: December 17, 1996Date of Patent: October 5, 1999Assignee: International Business Machines CorporationInventors: Frank Eliot Levine, Roy Stuart Moore, Charles Philip Roth, Edward Hugh Welbon
-
Patent number: 5944823Abstract: A firewall isolates computer and network resources inside the firewall from networks, computers and computer applications outside the firewall. Typically, the inside resources could be privately owned databases and local area networks (LAN's), and outside objects could include individuals and computer applications operating through public communication networks such as the Internet. Usually, a firewall allows for an inside user or object to originate connection to an outside object or network, but does not allow for connections to be generated in the reverse direction; i.e. from outside in. The disclosed invention provides a special "tunneling" mechanism, operating on both sides of a firewall, for establishing such "outside in" connections when they are requested by certain "trusted" individuals or objects or applications outside the firewall.Type: GrantFiled: October 21, 1996Date of Patent: August 31, 1999Assignee: International Business Machines CorporationsInventors: Prashanth Jade, Victor Stuart Moore, Arun Mohan Rao, Glen Robert Walters
-
Patent number: D683427Type: GrantFiled: July 26, 2012Date of Patent: May 28, 2013Assignee: The Helping Hand Company (Ledbury) LimitedInventor: Stuart Moore