Patents by Inventor Stuart Moore

Stuart Moore has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • System and method for performance monitoring of instructions in a re-order buffer
    Patent number: 5938760
    Abstract: A performance monitor implementing a plurality of counters counts several events to provide an instruction fetch bandwidth analysis, a cycles per instruction (CPI) infinite and finite analysis, an operand fetch bandwidth analysis, an instruction parallelism analysis, and a trailing edge analysis. Such analyses are performed on the performance of a data processing system in order that the designer may develop an improved processor architecture.
    Type: Grant
    Filed: December 17, 1996
    Date of Patent: August 17, 1999
    Assignee: International Business Machines Corporation
    Inventors: Frank Eliot Levine, Roy Stuart Moore, Charles Philip Roth, Edward Hugh Welbon
  • Instruction fetch bandwidth analysis
    Patent number: 5881306
    Abstract: A performance monitor implementing a plurality of counters counts several events to provide an instruction fetch bandwidth analysis, a cycles per instruction (CPI) infinite and finite analysis, an operand fetch bandwidth analysis, an instruction parallelism analysis, and a trailing edge analysis. Such analyses are performed on the performance of a data processing system in order that the designer may develop an improved processor architecture.
    Type: Grant
    Filed: December 17, 1996
    Date of Patent: March 9, 1999
    Assignee: International Business Machines Corporation
    Inventors: Frank Eliot Levine, Roy Stuart Moore, Charles Philip Roth, Edward Hugh Welbon
  • Trailing edge analysis
    Patent number: 5802273
    Abstract: A performance monitor implementing a plurality of counters counts several events to provide an instruction fetch bandwidth analysis, a cycles per instruction (CPI) infinite and finite analysis, an operand fetch bandwidth analysis, an instruction parallelism analysis, and a trailing edge analysis. Such analyses are performed on the performance of a data processing system in order that the designer may develop an improved processor architecture.
    Type: Grant
    Filed: December 17, 1996
    Date of Patent: September 1, 1998
    Assignee: International Business Machines Corporation
    Inventors: Frank Eliot Levine, Roy Stuart Moore, Charles Philip Roth, Edward Hugh Welbon