Abstract: A battery module has a cell stack including a first battery cell and a second battery cell, which respectively have electrode leads and are stacked to face each other. A connector configured to connect the electrode leads of the pair of battery cells. A support frame provided to at least one side of the cell stack and having a pair of lead slits at which the electrode leads are drawn and an injection slit formed at a location corresponding to the connector to give a passage through which a venting gas discharged at venting of the battery cell is injected.

Abstract: A non-volatile memory includes a memory cell region including an outer region proximate a first end of the memory cell region and an inner region separated from the first end by the outer region, first and second bit lines, an outer memory cell string including memory cells connected to an outer pillar extending vertically upward through the outer region, and an inner memory cell string including memory cells connected to an inner pillar extending vertically upward through the inner region, and a data input/output (I/O). The data I/O circuit includes a page buffer circuit that connects the first bit line during a first read operation directed to memory cells of the outer memory cell string, and connects the second bit line during a second read operation directed to memory cells of the inner memory cell string, and a read voltage determination unit that selects a first optimal read voltage used during the first read operation, and a second optimal read voltage used during the second read operation.

Abstract: Nonvolatile memory device includes a memory cell array including pages, each of the pages including memory cells storing data bits, each of the data bits being selectable by a different threshold voltage, a page buffer circuit coupled to the memory cell array through bit-lines, the page buffer circuit including page buffers to sense data from selected memory cells, and perform a first read operation and a second read operation, each including two sequential sensing operations to determine one data state, and each of the page buffers including a latch configured to sequentially store results of the two sequential sensing operations, and a control circuit to control the page buffers to store a result of the first read operation, reset the latches after completion of the first read operation, and perform the second read operation based on a valley determined based on the result of the first read operation.

Abstract: A touch display device includes a unit pixel disposed on a substrate, the unit pixel comprising a plurality of subpixels; a light-emitting element disposed at each of the plurality of subpixels; an encapsulation unit disposed on the light-emitting element; a plurality of touch electrodes disposed on the encapsulation unit; a touch line connected to each of the plurality of touch electrodes, the touch line extending through the touch electrode; and at least one redundant electrode spaced apart from the touch electrode, the redundant electrode being independently disposed in each of the plurality of touch electrodes, the redundant electrode being disposed in the unit pixel. The redundant electrode is disposed along the touch line, whereby it is possible to reduce parasitic capacitance formed between the touch line and the touch electrode.

Abstract: A memory system may include: a memory device; and a controller. When at least one data group is received, the data group including a plurality of data which is required to be collectively processed, the controller reads preceding logical-to-physical (L2P) map information for the data group from a first table and stores the read L2P map information in a second table before reception of the plurality of the data of the data group is committed, and the controller stores the plurality of the data in the memory device, and the controller updates the L2P map information for the data group that is stored in the first table in response to the storing of the plurality of the data in the memory device.

Abstract: A battery module having a low height and ensuring stable cooling performance, including a heat dissipation member disposed at a lower portion thereof, a cell assembly having a plurality of can-type secondary batteries stacked in a lying-down form in a horizontal direction and a bus bar, the bus bar including a connection part contacting electrodes of two or more can-type secondary batteries of the cell assembly to electrically connect the two or more can-type secondary batteries, and a heat transfer part located below the connection part to contact the heat dissipation member to transfer heat of the secondary batteries to the heat dissipation member.

Abstract: Nonvolatile memory device includes memory cell region including a first metal pad and a second metal pad, peripheral circuit region including a third metal pad and a fourth metal pad, vertically connected to the memory cell region. The nonvolatile memory device includes a page buffer circuit including page buffers to sense data from selected memory cells, each including two sequential sensing operations to determine one data state, and each of the page buffers including a latch to sequentially store results of the two sequential sensing operations. The nonvolatile memory device includes control circuit in the peripheral circuit region, to control the page buffers to store result of the first read operation, reset the latches after completion of the first read operation, and control the page buffers to perform the second read operation based on a valley determined based on the result of the first read operation.

Abstract: Disclosed is a display device having a reduced bezel area. The display device includes a plurality of touch electrodes disposed on a light-emitting element, display link lines and touch lines disposed in a non-active area, and a touch passivation film disposed on the touch electrodes, the touch passivation film contacting the touch lines disposed in a bending area of the non-active area. Consequently, a narrow bezel may be realized.

Abstract: A display apparatus is provided. In the display apparatus, a touch electrode may be disposed on the encapsulating element covering a light-emitting device, and a touch pad may be disposed on the outside of the encapsulating element. A touch line may be connected to the touch electrode. The touch line may be connected to the touch pad by a first touch link and a second touch link. The first touch link may include a first end connected to the second touch link, and a second end connected to the touch line. The first end of the first touch link may overlap with the encapsulating element. Thus, in the display apparatus, the reliability for a touch of a user or a tool may be improved.

Abstract: Disclosed is a display device having a reduced bezel area. The display device includes a plurality of touch lines electrically connected to a plurality of touch electrodes and display link lines electrically connected to a light-emitting element, the display link lines being disposed in a non-active area of a substrate, wherein a minimum of M touch lines (M being a natural number greater than 1 and less than N) is disposed with respect to a minimum of N display link lines (N being a natural number greater than 1), among the plurality of display link lines, in the non-active area. Consequently, a narrow bezel may be realized.

Abstract: A battery module including a cell stack formed by stacking a plurality of battery cells; a module frame coupled to one side or both sides of the cell stack; and a fire extinguishing unit accommodated in the module frame to eject a fire extinguishing agent at a reference temperature or above.

Abstract: A nonvolatile memory device includes a peripheral circuit region and a memory cell region vertically connected with the peripheral circuit region, the peripheral circuit region including at least one first metal pad, and the memory cell region including at least one second metal pad directly connected with the at least one first metal pad. A method of programming the nonvolatile memory device includes: receiving a programming command, data for a plurality of pages, and an address corresponding to a selected word-line; programming the data for one of the pages to an unselected word-line; reading data of a previously programmed page from the selected word-line; and programming the data for the remaining pages and the data of the previously programmed page to the selected word-line.

Abstract: A cylindrical battery cell including a first electrode terminal and a second electrode terminal having different polarities: an electrode assembly in which a positive electrode, a negative electrode and a separator interposed between the positive electrode and the negative electrode are wound; a battery case configured to include the electrode assembly therein in a state of being impregnated with an electrolytic solution; a cap assembly mounted to a top end of the battery case; and a connection cap including a cap housing loaded on the battery case and the cap assembly and having an insulating material, and a first connection plate and a second connection plate placed on the cap housing and electrically connected to the first electrode terminal and the second electrode terminal, respectively.

Abstract: A method of programming a nonvolatile memory device includes: receiving a programming command, data for a plurality of pages, and an address corresponding to a selected word-line; programming the data for one of the pages to an unselected word-line; reading data of a previously programmed page from the selected word-line; and programming the data for the remaining pages and the data of the previously programmed page to the selected word-line.

Abstract: A non-volatile memory includes a memory cell region including an outer region proximate a first end of the memory cell region and an inner region separated from the first end by the outer region, first and second bit lines, an outer memory cell string including memory cells connected to an outer pillar extending vertically upward through the outer region, and an inner memory cell string including memory cells connected to an inner pillar extending vertically upward through the inner region, and a data input/output (I/O). The data I/O circuit includes a page buffer circuit that connects the first bit line during a first read operation directed to memory cells of the outer memory cell string, and connects the second bit line during a second read operation directed to memory cells of the inner memory cell string, and a read voltage determination unit that selects a first optimal read voltage used during the first read operation, and a second optimal read voltage used during the second read operation.

Abstract: A non-volatile memory includes a memory cell region including a first metal pad, a peripheral circuit region including a second metal pad and vertically connected to the memory cell region by the first metal pad and the second metal pad, a memory cell array region in the memory cell region including an outer region proximate a first end of the memory cell region and an inner region separated from the first end by the outer region, first and second bit lines in the memory cell region, an outer memory cell string in the memory cell region including memory cells connected to an outer pillar extending vertically upward through the outer region, and an inner memory cell string including memory cells connected to an inner pillar extending vertically upward through the inner region, and a data input/output (I/O) circuit in the peripheral circuit region including a page buffer circuit that connects the first bit line during a first read operation directed to memory cells of the outer memory cell string, and connects

Abstract: A memory system includes a non-volatile memory device including a plurality of memory blocks; and a controller comprising a volatile memory and configured to: store a plurality of write data delivered from a host in the memory blocks to the plurality of memory blocks; and managing mapping information corresponding to the stored write data in the volatile memory, wherein the controller is configured to check whether the plurality of write data are grouped into a transaction, selectively set a transaction flag to the mapping information based on a check result; and selectively store the mapping information in the memory blocks when the transaction flag is not set.

Abstract: A method for assembling a secondary battery cell module by using an assembling jig including a plurality of guide rods disposed on a jig plate includes: mounting a lower frame on the jig plate while the guide rods are inserted into a plurality of arranging through-holes of the lower frame; disposing a plurality of battery cells on the lower frame; mounting an upper frame on the battery cells while the guide rods are inserted into a plurality of arranging through-holes of the upper frame; fastening the upper frame and the lower frame together; and separating the assembling jig from the upper frame and the lower frame.

Abstract: A data processing system includes a host suitable for generating a plurality of write data grouped into transactions and a plurality of write commands including transaction information of each of the write data; and a memory system suitable for storing the write data in a normal region of a memory device in response to the write commands received from the host, and storing the transaction information included in each of the write commands in a spare region, which corresponds to the normal region, of the memory device.

Abstract: Disclosed is a vehicle software control device which includes hardware, a kernel connected to the hardware and configured to execute a first operating system, a system library connected to the kernel, a first connecting unit configured to connect a library for a second operating system different from the first operating system to the system library, and a first application executed on the second operating system.