Patents by Inventor Su Jin Jung
Su Jin Jung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11670716Abstract: A semiconductor device includes an active region extending in a first direction on a substrate, channel layers on the active region and spaced apart vertically, a gate structure intersecting the active region and the channel layers, the gate structure extending in a second direction and surrounding the channel layers, and a source/drain region on the active region at a side of the gate structure, the source/drain region contacting the channel layers, the source/drain region including first epitaxial layers having a first composition and including first layers on side surfaces of the channel layers and a second layer on the active region at a lower end of the source/drain region, and a second epitaxial layer having a second composition different from the first composition, the second epitaxial layer being between the first epitaxial layers in the first direction and being between the first epitaxial layers vertically in a third direction.Type: GrantFiled: June 3, 2021Date of Patent: June 6, 2023Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Sung Uk Jang, Young Dae Cho, Ki Hwan Kim, Su Jin Jung
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Patent number: 11594598Abstract: A semiconductor device including an active region defined in a substrate; at least one channel layer on the active region; a gate electrode intersecting the active region and on the active region and surrounding the at least one channel layer; and a pair of source/drain regions adjacent to both sides of the gate electrode, on the active region, and in contact with the at least one channel layer, wherein the pair of source/drain regions includes a selective epitaxial growth (SEG) layer, and a maximum width of each of the pair of source/drain regions in a first direction is 1.3 times or less a width of the active region in the first direction.Type: GrantFiled: December 9, 2021Date of Patent: February 28, 2023Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Sung Uk Jang, Seung Hun Lee, Su Jin Jung, Young Dae Cho
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Publication number: 20220415905Abstract: A semiconductor device may include a first active fin, a plurality of second active fins, a first source/drain layer structure, and a second source/drain layer structure. The first active fin may be on a first region of a substrate. The second active fins may be on a second region of the substrate. The first and second gate structures may be on the first and second active fins, respectively. The first source/drain layer structure may be on a portion of the first active fin that is adjacent to the first gate structure. The second source/drain layer structure may commonly contact upper surfaces of the second active fins adjacent to the second gate structure. A top surface of the second source/drain layer structure may be further from the surface of the substrate than a top surface of the first source/drain layer structure is to the surface of the substrate.Type: ApplicationFiled: September 2, 2022Publication date: December 29, 2022Inventors: Jin-Bum KIM, Myung-Gil KANG, Kang-Hun MOON, Cho-Eun LEE, Su-Jin JUNG, Min-Hee CHOI, Yang XU, Dong-Suk SHIN, Kwan-Heum LEE, Hoi-Sung CHUNG
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Publication number: 20220406892Abstract: A semiconductor device is provided.Type: ApplicationFiled: March 31, 2022Publication date: December 22, 2022Inventors: SU JIN JUNG, JIN BUM KIM, DA HYE KIM, IN GYU JANG, DONG SUK SHIN
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Patent number: 11469237Abstract: A semiconductor device may include a first active fin, a plurality of second active fins, a first source/drain layer structure, and a second source/drain layer structure. The first active fin may be on a first region of a substrate. The second active fins may be on a second region of the substrate. The first and second gate structures may be on the first and second active fins, respectively. The first source/drain layer structure may be on a portion of the first active fin that is adjacent to the first gate structure. The second source/drain layer structure may commonly contact upper surfaces of the second active fins adjacent to the second gate structure. A top surface of the second source/drain layer structure may be further from the surface of the substrate than a top surface of the first source/drain layer structure is to the surface of the substrate.Type: GrantFiled: April 18, 2019Date of Patent: October 11, 2022Assignee: Samsung Electronics Co., Ltd.Inventors: Jin-Bum Kim, Myung-Gil Kang, Kang-Hun Moon, Cho-Eun Lee, Su-Jin Jung, Min-Hee Choi, Yang Xu, Dong-Suk Shin, Kwan-Heum Lee, Hoi-Sung Chung
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Patent number: 11462606Abstract: A display device includes a display panel and a signal transmission film including a first extension portion, a second extension portion, and a first dummy pattern. The signal transmission film is connected to one side of the display panel. The first extension portion extends in a first direction, and a first contact hole is formed at a first side of the first extension portion. The second extension portion extends from the first side of the first extension portion in a second direction which is different from the first direction. The first dummy pattern is disposed adjacent to the first contact hole at the first side.Type: GrantFiled: September 3, 2020Date of Patent: October 4, 2022Assignee: Samsung Display Co., Ltd.Inventors: Sang Kyu Choi, Su Jin Jung, Yeong Bong Kang, Seong Sik Ahn, Ki Chang Lee, Min Hyuk Im, Myoung-Ha Jeon
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Publication number: 20220181459Abstract: An integrated circuit device includes a substrate having source and drain recesses therein that are lined with respective silicon-germanium liners and filled with doped semiconductor source and drain regions. A stacked plurality of semiconductor channel layers are provided, which are separated vertically from each other within the substrate by corresponding buried insulated gate electrode regions that extend laterally between the silicon-germanium liners. An insulated gate electrode is provided on an uppermost one of the plurality of semiconductor channel layers. The silicon-germanium liners may be doped with carbon.Type: ApplicationFiled: July 22, 2021Publication date: June 9, 2022Inventors: Young Dae Cho, Ki Hwan Kim, Sung Uk Jang, Su Jin Jung
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Publication number: 20220181499Abstract: A semiconductor device is provided. The semiconductor comprises an active pattern including a lower pattern and a plurality of sheet patterns that are spaced apart from the lower pattern in a first direction, a source/drain pattern on the lower pattern and in contact with the plurality of sheet patterns, and a gate structure on opposing sides of the source/drain pattern in a second direction different from the first direction, the gate structure including a gate electrode on the plurality of sheet patterns, wherein the source/drain pattern includes an epitaxial region that comprises a semiconductor material and a cavity region that is inside the epitaxial region and that is surrounded by the semiconductor material.Type: ApplicationFiled: August 10, 2021Publication date: June 9, 2022Inventors: Su Jin Jung, Ki Hwan Kim, Sung Uk Jang, Young Dae Cho
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Publication number: 20220157990Abstract: A semiconductor device including an active region extending in a first direction on a substrate; a gate structure intersecting the active region and extending in a second direction on the substrate; and a source/drain region on the active region and at least one side of the gate structure, wherein the source/drain region includes a plurality of first epitaxial layers spaced apart from each other in the first direction, the plurality of first epitaxial layers including first impurities of a first conductivity type; and a second epitaxial layer filling a space between the plurality of first epitaxial layers, the second epitaxial layer including second impurities of the first conductivity type.Type: ApplicationFiled: January 28, 2022Publication date: May 19, 2022Inventors: Sung Uk JANG, Ki Hwan KIM, Su Jin JUNG, Bong Soo KIM, Young Dae CHO
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Publication number: 20220102497Abstract: A semiconductor device including an active region defined in a substrate; at least one channel layer on the active region; a gate electrode intersecting the active region and on the active region and surrounding the at least one channel layer; and a pair of source/drain regions adjacent to both sides of the gate electrode, on the active region, and in contact with the at least one channel layer, wherein the pair of source/drain regions includes a selective epitaxial growth (SEG) layer, and a maximum width of each of the pair of source/drain regions in a first direction is 1.3 times or less a width of the active region in the first direction.Type: ApplicationFiled: December 9, 2021Publication date: March 31, 2022Inventors: Sung Uk JANG, Seung Hun LEE, Su Jin JUNG, Young Dae CHO
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Patent number: 11257905Abstract: A semiconductor device including an active region defined in a substrate; at least one channel layer on the active region; a gate electrode intersecting the active region and on the active region and surrounding the at least one channel layer; and a pair of source/drain regions adjacent to both sides of the gate electrode, on the active region, and in contact with the at least one channel layer, wherein the pair of source/drain regions includes a selective epitaxial growth (SEG) layer, and a maximum width of each of the pair of source/drain regions in a first direction is 1.3 times or less a width of the active region in the first direction.Type: GrantFiled: April 17, 2019Date of Patent: February 22, 2022Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Sung Uk Jang, Seung Hun Lee, Su Jin Jung, Young Dae Cho
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Patent number: 11239363Abstract: A semiconductor device including an active region extending in a first direction on a substrate; a gate structure intersecting the active region and extending in a second direction on the substrate; and a source/drain region on the active region and at least one side of the gate structure, wherein the source/drain region includes a plurality of first epitaxial layers spaced apart from each other in the first direction, the plurality of first epitaxial layers including first impurities of a first conductivity type; and a second epitaxial layer filling a space between the plurality of first epitaxial layers, the second epitaxial layer including second impurities of the first conductivity type.Type: GrantFiled: October 10, 2019Date of Patent: February 1, 2022Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Sung Uk Jang, Ki Hwan Kim, Su Jin Jung, Bong Soo Kim, Young Dae Cho
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Publication number: 20210296499Abstract: A semiconductor device includes an active region extending in a first direction on a substrate, channel layers on the active region and spaced apart vertically, a gate structure intersecting the active region and the channel layers, the gate structure extending in a second direction and surrounding the channel layers, and a source/drain region on the active region at a side of the gate structure, the source/drain region contacting the channel layers, the source/drain region including first epitaxial layers having a first composition and including first layers on side surfaces of the channel layers and a second layer on the active region at a lower end of the source/drain region, and a second epitaxial layer having a second composition different from the first composition, the second epitaxial layer being between the first epitaxial layers in the first direction and being between the first epitaxial layers vertically in a third direction.Type: ApplicationFiled: June 3, 2021Publication date: September 23, 2021Inventors: Sung Uk JANG, Young Dae CHO, Ki Hwan KIM, Su Jin JUNG
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Patent number: 11031502Abstract: A semiconductor device includes an active region extending in a first direction on a substrate, channel layers on the active region and spaced apart vertically, a gate structure intersecting the active region and the channel layers, the gate structure extending in a second direction and surrounding the channel layers, and a source/drain region on the active region at a side of the gate structure, the source/drain region contacting the channel layers, the source/drain region including first epitaxial layers having a first composition and including first layers on side surfaces of the channel layers and a second layer on the active region at a lower end of the source/drain region, and a second epitaxial layer having a second composition different from the first composition, the second epitaxial layer being between the first epitaxial layers in the first direction and being between the first epitaxial layers vertically in a third direction.Type: GrantFiled: December 10, 2019Date of Patent: June 8, 2021Assignee: Samsung Electronics Co., Ltd.Inventors: Sung Uk Jang, Young Dae Cho, Ki Hwan Kim, Su Jin Jung
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Publication number: 20210159302Abstract: A display device includes a display panel and a signal transmission film including a first extension portion, a second extension portion, and a first dummy pattern. The signal transmission film is connected to one side of the display panel. The first extension portion extends in a first direction, and a first contact hole is formed at a first side of the first extension portion. The second extension portion extends from the first side of the first extension portion in a second direction which is different from the first direction. The first dummy pattern is disposed adjacent to the first contact hole at the first side.Type: ApplicationFiled: September 3, 2020Publication date: May 27, 2021Inventors: Sang Kyu CHOI, Su Jin JUNG, Yeong Bong KANG, Seong Sik AHN, Ki Chang LEE, Min Hyuk IM, Myoung-Ha JEON
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Patent number: 10727348Abstract: A semiconductor device may include first and second fins formed side by side on a substrate, a first elevated doped region formed on the first fin and having a first doping concentration of impurities, a second elevated doped region formed on the second fin, and a first bridge connecting the first elevated doped region and the second elevated doped region to each other. Methods of manufacturing such a semiconductor device are also disclosed.Type: GrantFiled: March 28, 2019Date of Patent: July 28, 2020Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Seok-Hoon Kim, Bon-Young Koo, Nam-Kyu Kim, Woo-Bin Song, Byeong-Chan Lee, Su-Jin Jung
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Publication number: 20200220015Abstract: A semiconductor device including an active region extending in a first direction on a substrate; a gate structure intersecting the active region and extending in a second direction on the substrate; and a source/drain region on the active region and at least one side of the gate structure, wherein the source/drain region includes a plurality of first epitaxial layers spaced apart from each other in the first direction, the plurality of first epitaxial layers including first impurities of a first conductivity type; and a second epitaxial layer filling a space between the plurality of first epitaxial layers, the second epitaxial layer including second impurities of the first conductivity type.Type: ApplicationFiled: October 10, 2019Publication date: July 9, 2020Inventors: Sung Uk JANG, Ki Hwan KIM, Su Jin JUNG, Bong Soo KIM, Young Dae CHO
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Publication number: 20200220018Abstract: A semiconductor device includes an active region extending in a first direction on a substrate, channel layers on the active region and spaced apart vertically, a gate structure intersecting the active region and the channel layers, the gate structure extending in a second direction and surrounding the channel layers, and a source/drain region on the active region at a side of the gate structure, the source/drain region contacting the channel layers, the source/drain region including first epitaxial layers having a first composition and including first layers on side surfaces of the channel layers and a second layer on the active region at a lower end of the source/drain region, and a second epitaxial layer having a second composition different from the first composition, the second epitaxial layer being between the first epitaxial layers in the first direction and being between the first epitaxial layers vertically in a third direction.Type: ApplicationFiled: December 10, 2019Publication date: July 9, 2020Inventors: Sung Uk JANG, Young Dae CHO, Ki Hwan KIM, Su Jin JUNG
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Publication number: 20200188464Abstract: The present invention can effectively protect a liver from oxidative stress caused by liver damage by significantly reducing the aspartate aminotransferase (AST) and alanine aminotransferase (ALT) values, which are widely known as indicators of liver damage when applied to liver toxicity animal models. The present invention relates to a composition for protecting a liver comprising a dandelion extract and a lemon balm extract as active ingredients that can be usefully used for preventing, ameliorating or treating liver damage, wherein the composition is characterized by comprising a dandelion extract and a lemon balm extract as active ingredients.Type: ApplicationFiled: July 6, 2018Publication date: June 18, 2020Applicant: PHYTONUTRIMEDI CO., LTD.Inventors: Byoung Ok SO, Su Jin JUNG
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Publication number: 20200152740Abstract: A semiconductor device including an active region defined in a substrate; at least one channel layer on the active region; a gate electrode intersecting the active region and on the active region and surrounding the at least one channel layer; and a pair of source/drain regions adjacent to both sides of the gate electrode, on the active region, and in contact with the at least one channel layer, wherein the pair of source/drain regions includes a selective epitaxial growth (SEG) layer, and a maximum width of each of the pair of source/drain regions in a first direction is 1.3 times or less a width of the active region in the first direction.Type: ApplicationFiled: April 17, 2019Publication date: May 14, 2020Inventors: Sung Uk JANG, Seung Hun LEE, Su Jin JUNG, Young Dae CHO