Patents by Inventor Su-Youn Lee

Su-Youn Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220230059
    Abstract: Provided is a method of operating a neuron in a neuromorphic system. The method includes evaluating a membrane potential value at a corresponding time when receiving an input spike, time-modulating a synaptic weight of the membrane potential value and converting the time-modulated synaptic weight into a membrane potential value at a reference time, and generating an output spike when the membrane potential value at the reference time exceeds a certain threshold value. The membrane potential value at the reference time is represented by a floating point number including a predetermined bit of exponent and mantissa, and the floating point number includes time information. The method further includes accessing a memory and scanning a neural state variable when a timer is updated to “0” to update the neural state variable to an updated value at a reference time.
    Type: Application
    Filed: January 19, 2022
    Publication date: July 21, 2022
    Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Jong Kil PARK, In Ho KIM, Su Youn LEE, Jong Keuk PARK, Joon Young KWAK, Jae Wook KIM, Yeon Joo JEONG
  • Publication number: 20220230060
    Abstract: A neuromorphic device includes: a neuron block unit including a plurality of neurons; a synapse block unit including a plurality of synapses; and a topology block unit including a plurality of parallel Look-Up Table (LUT) modules including pre and post neuron elements configured with addresses of a presynaptic neuron and a postsynaptic neuron. Each of the plurality of neurons has an intrinsic address, each of the plurality of synapses has an intrinsic address. The parallel LUT module is partitioned based on a first synapse address among synapse addresses, and each of the partitions is indexed based on a second synapse address among the synapse addresses.
    Type: Application
    Filed: July 5, 2019
    Publication date: July 21, 2022
    Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Vladimir KORNIJCUK, Doo Seok JEONG, Joon Young KWAK, Jae Wook KIM, Jong Kil PARK, In Ho KIM, Jong Keuk PARK, Su Youn LEE, Yeon Joo JEONG, Joon Yeon CHANG
  • Patent number: 10292586
    Abstract: The present invention relates to a non-invasive health indicator monitoring system including a sensing module, an electric power storage module, and a circuit module to collect health indicator information by contacting with a subject. In addition, the present invention also relates to a method for monitoring health indicator continuously by using the health indicator monitoring system.
    Type: Grant
    Filed: November 11, 2014
    Date of Patent: May 21, 2019
    Assignee: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Yong Won Song, Su Youn Lee, Ji Yeon Lee, Jung Ah Lim, Ji Won Choi, Byung Ki Cheong, Jin Seok Kim, Ho Seong Jang, Hyun Jung Yi
  • Patent number: 9252181
    Abstract: A color image sensor is disclosed. In one aspect, the color image sensor includes: a photo-sensitive cell having a lower electrode, an upper electrode, and a chalcogenide material located between the lower electrode and the upper electrode; and an image sensing circuit for measuring the wavelength or intensity of incident light based on an electric characteristic value generated from the photo-sensitive cell.
    Type: Grant
    Filed: April 26, 2012
    Date of Patent: February 2, 2016
    Assignee: Korea Institute of Science and Technology
    Inventors: Su Youn Lee, Byung Ki Cheong, Doo Seok Jeong
  • Publication number: 20150201837
    Abstract: The present invention relates to a non-invasive health indicator monitoring system including a sensing module, an electric power storage module, and a circuit module to collect health indicator information by contacting with a subject. In addition, the present invention also relates to a method for monitoring health indicator continuously by using the health indicator monitoring system.
    Type: Application
    Filed: November 11, 2014
    Publication date: July 23, 2015
    Inventors: Yong Won SONG, Su Youn LEE, Ji Yeon LEE, Jung Ah LIM, Ji Won CHOI, Byung Ki CHEONG, Jin Seok KIM, Ho Seong JANG, Hyun Jung YI
  • Publication number: 20130092818
    Abstract: A color image sensor is disclosed. In one aspect, the color image sensor includes: a photo-sensitive cell having a lower electrode, an upper electrode, and a chalcogenide material located between the lower electrode and the upper electrode; and an image sensing circuit for measuring the wavelength or intensity of incident light based on an electric characteristic value generated from the photo-sensitive cell.
    Type: Application
    Filed: April 26, 2012
    Publication date: April 18, 2013
    Inventors: Su Youn Lee, Byung Ki Cheong, Doo Seok Jeong
  • Patent number: 8026543
    Abstract: A phase-change memory device has an oxidation barrier layer to protect against memory cell contamination or oxidation. In one embodiment, a semiconductor memory device includes a molding layer disposed over semiconductor substrate, a phase-changeable material pattern, and an oxidation barrier of electrically insulative material. The molding layer has a protrusion at its upper portion. One portion of the phase-changeable material pattern overlies the protrusion of the molding layer, and another portion of the phase-changeable material pattern extends through the protrusion. The electrically insulative material of the oxidation barrier may cover the phase-changeable material pattern and/or extend along and cover the entire area at which the protrusion of the molding layer and the portion of the phase-change material pattern disposed on the protrusion adjoin.
    Type: Grant
    Filed: December 18, 2008
    Date of Patent: September 27, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yoon-Jong Song, Young-Nam Hwang, Sang-Don Nam, Sung-Lae Cho, Gwan-Hyeob Koh, Choong-Man Lee, Bong-Jin Kuh, Yong-Ho Ha, Su-Youn Lee, Chang-Wook Jeong, Ji-Hye Yi, Kyung-Chang Ryoo, Se-Ho Lee, Su-Jin Ahn, Soon-Oh Park, Jang-Eun Lee
  • Patent number: 7888667
    Abstract: A phase change memory device includes a mold layer disposed on a substrate, a heating electrode, a filling insulation pattern and a phase change material pattern. The heating electrode is disposed in an opening exposing the substrate through the mold layer. The heating electrode is formed in a substantially cylindrical shape, having its sidewalls conformally disposed on the lower inner walls of the opening. The filling insulation pattern fills an empty region surrounded by the sidewalls of the heating electrode. The phase change material pattern is disposed on the mold layer and downwardly extended to fill the empty part of the opening. The phase change material pattern contacts the top surfaces of the sidewalls of the heating electrode.
    Type: Grant
    Filed: January 9, 2008
    Date of Patent: February 15, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yoon-Jong Song, Se-Ho Lee, Ki-Nam Kim, Su-Youn Lee, Jae-Hyun Park
  • Publication number: 20090101881
    Abstract: In one embodiment, a phase-change memory device has an oxidation barrier layer to protect against memory cell contamination or oxidation and a method of manufacturing the same. In one embodiment, a semiconductor memory device comprises a molding layer overlying a semiconductor substrate. The molding layer has a protrusion portion vertically extending from a top surface thereof. The device further includes a phase-changeable material pattern adjacent the protrusion portion and a lower electrode electrically connected to the phase-changeable material pattern.
    Type: Application
    Filed: December 18, 2008
    Publication date: April 23, 2009
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Yoon-Jong Song, Young-Nam Hwang, Sang-Don Nam, Sung-Lae Cho, Gwan-Hyeob Koh, Choong-Man Lee, Bong-Jin Kuh, Yong-Ho Ha, Su-Youn Lee, Chang-Wook Jeong, Ji-Hye Yi, Kyung-Chang Ryoo, Se-Ho Lee, Su-Jin Ahn, Soon-Oh Park, Jang-Eun Lee
  • Patent number: 7521281
    Abstract: Phase-changeable memory devices include non-volatile memory cells. Each of these non-volatile memory cells may include a phase-changeable diode on a semiconductor substrate and a phase-changeable memory element having a first terminal electrically coupled to a terminal of the phase-changeable diode. This phase-changeable diode may include a lower electrode pattern on the semiconductor substrate, a first phase-changeable pattern on the lower electrode pattern and a gate switching layer pattern on the first phase-changeable pattern. The phase-changeable memory element includes a second phase-changeable pattern electrically coupled to the terminal of the phase-changeable diode and a memory switching layer pattern on the second phase-changeable pattern. The memory switching layer pattern may include a composite of a titanium layer pattern contacting the phase-changeable memory element and a titanium nitride layer pattern contacting the titanium layer pattern.
    Type: Grant
    Filed: August 4, 2006
    Date of Patent: April 21, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Su-Youn Lee, Su-Jin Ahn, Chang-Wook Jeong
  • Patent number: 7482616
    Abstract: In one embodiment, a phase-change memory device has an oxidation barrier layer to protect against memory cell contamination or oxidation and a method of manufacturing the same. In one embodiment, a semiconductor memory device comprises a molding layer overlying a semiconductor substrate. The molding layer has a protrusion portion vertically extending from a top surface thereof. The device further includes a phase-changeable material pattern adjacent the protrusion portion and a lower electrode electrically connected to the phase-changeable material pattern.
    Type: Grant
    Filed: May 27, 2005
    Date of Patent: January 27, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yoon-Jong Song, Young-Nam Hwang, Sang-Don Nam, Sung-Lae Cho, Gwan-Hyeob Koh, Choong-Man Lee, Bong-Jin Kuh, Yong-Ho Ha, Su-Youn Lee, Chang-Wook Jeong, Ji-Hye Yi, Kyung-Chang Ryoo, Se-Ho Lee, Su-Jin Ahn, Soon-Oh Park, Jang-Eun Lee
  • Patent number: 7440308
    Abstract: A phase-change random access memory device may include a phase-change pattern, a first electrode structure connected to the phase-change pattern, and a second electrode structure spaced apart from the first electrode structure and connected to the phase-change pattern, wherein at least one of the first electrode structure and the second electrode structure includes a plurality of resistor patterns connected to the phase-change pattern in parallel.
    Type: Grant
    Filed: September 5, 2006
    Date of Patent: October 21, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chang Wook Jeong, Su-Youn Lee, Won-Cheol Jeong, Jae-Hyun Park, Su-Jin Ahn, Fai Yeung
  • Patent number: 7411208
    Abstract: A phase-change memory device has an oxidation barrier layer to protect against memory cell contamination or oxidation and a method of manufacturing the same. In one embodiment, a semiconductor memory device comprises a molding layer overlying a semiconductor substrate. The molding layer has a protrusion portion vertically extending from a top surface thereof. The device further includes a phase-changeable material pattern adjacent the protrusion portion and a lower electrode electrically connected to the phase-changeable material pattern.
    Type: Grant
    Filed: December 30, 2004
    Date of Patent: August 12, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young-Nam Hwang, Gwan-Hyeob Koh, Su-Jin Ahn, Sung-Lae Cho, Se-Ho Lee, Kyung-Chang Ryoo, Chang-Wook Jeong, Su-Youn Lee, Bong-Jin Kuh
  • Publication number: 20080173862
    Abstract: A phase change memory device includes a mold layer disposed on a substrate, a heating electrode, a filling insulation pattern and a phase change material pattern. The heating electrode is disposed in an opening exposing the substrate through the mold layer. The heating electrode is formed in a substantially cylindrical shape, having its sidewalls conformally disposed on the lower inner walls of the opening. The filling insulation pattern fills an empty region surrounded by the sidewalls of the heating electrode. The phase change material pattern is disposed on the mold layer and downwardly extended to fill the empty part of the opening. The phase change material pattern contacts the top surfaces of the sidewalls of the heating electrode.
    Type: Application
    Filed: January 9, 2008
    Publication date: July 24, 2008
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Yoon-Jong Song, Se-Ho Lee, Ki-Nam Kim, Su-Youn Lee, Jae-Hyun Park
  • Patent number: 7339185
    Abstract: A phase change memory device includes a mold layer disposed on a substrate, a heating electrode, a filling insulation pattern and a phase change material pattern. The heating electrode is disposed in an opening exposing the substrate through the mold layer. The heating electrode is formed in a substantially cylindrical shape, having its sidewalls conformally disposed on the lower inner walls of the opening. The filling insulation pattern fills an empty region surrounded by the sidewalls of the heating electrode. The phase change material pattern is disposed on the mold layer and downwardly extended to fill the empty part of the opening. The phase change material pattern contacts the top surfaces of the sidewalls of the heating electrode.
    Type: Grant
    Filed: June 10, 2005
    Date of Patent: March 4, 2008
    Assignee: Samsung Electronics Col Ltd.
    Inventors: Yoon-Jong Song, Se-Ho Lee, Ki-Nam Kim, Su-Youn Lee, Jae-Hyun Park
  • Publication number: 20070133270
    Abstract: A phase-change random access memory device may include a phase-change pattern, a first electrode structure connected to the phase-change pattern, and a second electrode structure spaced apart from the first electrode structure and connected to the phase-change pattern, wherein at least one of the first electrode structure and the second electrode structure includes a plurality of resistor patterns connected to the phase-change pattern in parallel.
    Type: Application
    Filed: September 5, 2006
    Publication date: June 14, 2007
    Inventors: Chang Jeong, Su-Youn Lee, Won-Cheol Jeong, Jae-Hyun Park, Su-Jin Ahn, Fai Yeung
  • Patent number: 7214957
    Abstract: According to some embodiments of the present invention, there are provided PRAMS having a phase-change layer pattern interposed between a molding layer and a forming layer pattern, and methods of forming the same that include a node conductive layer pattern, a molding layer, a forming layer pattern and a protecting layer. The molding layer, the forming layer pattern and the protecting layer are formed to cover the planarized interlayer insulating layer and the node conductive layer pattern. A lower electrode is interposed between the molding layer and the planarized interlayer insulating layer. A phase-change layer pattern is formed on the planarized interlayer insulating layer. A spacer pattern is disposed between the phase-change layer pattern and the molding layer.
    Type: Grant
    Filed: September 1, 2005
    Date of Patent: May 8, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyung-Chang Ryoo, Su-Youn Lee, Young-Nam Hwang, Se-Ho Lee
  • Publication number: 20060270180
    Abstract: Phase-changeable memory devices include non-volatile memory cells. Each of these non-volatile memory cells may include a phase-changeable diode on a semiconductor substrate and a phase-changeable memory element having a first terminal electrically coupled to a terminal of the phase-changeable diode. This phase-changeable diode may include a lower electrode pattern on the semiconductor substrate, a first phase-changeable pattern on the lower electrode pattern and a gate switching layer pattern on the first phase-changeable pattern. The phase-changeable memory element includes a second phase-changeable pattern electrically coupled to the terminal of the phase-changeable diode and a memory switching layer pattern on the second phase-changeable pattern. The memory switching layer pattern may include a composite of a titanium layer pattern contacting the phase-changeable memory element and a titanium nitride layer pattern contacting the titanium layer pattern.
    Type: Application
    Filed: August 4, 2006
    Publication date: November 30, 2006
    Inventors: Su-Youn Lee, Su-Jin Ahn, Chang-Wook Jeong
  • Patent number: 7105870
    Abstract: Phase-changeable memory devices include non-volatile memory cells. Each of these non-volatile memory cells may include a phase-changeable diode on a semiconductor substrate and a phase-changeable memory element having a first terminal electrically coupled to a terminal of the phase-changeable diode. This phase-changeable diode may include a lower electrode pattern on the semiconductor substrate, a first phase-changeable pattern on the lower electrode pattern and a gate switching layer pattern on the first phase-changeable pattern. The phase-changeable memory element includes a second phase-changeable pattern electrically coupled to the terminal of the phase-changeable diode and a memory switching layer pattern on the second phase-changeable pattern. The memory switching layer pattern may include a composite of a titanium layer pattern contacting the phase-changeable memory element and a titanium nitride layer pattern contacting the titanium layer pattern.
    Type: Grant
    Filed: June 3, 2005
    Date of Patent: September 12, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Su-Youn Lee, Su-Jin Ahn, Chang-Wook Jeong
  • Publication number: 20060043355
    Abstract: According to some embodiments of the present invention, there are provided PRAMS having a phase-change layer pattern interposed between a molding layer and a forming layer pattern, and methods of forming the same that include a node conductive layer pattern, a molding layer, a forming layer pattern and a protecting layer. The molding layer, the forming layer pattern and the protecting layer are formed to cover the planarized interlayer insulating layer and the node conductive layer pattern. A lower electrode is interposed between the molding layer and the planarized interlayer insulating layer. A phase-change layer pattern is formed on the planarized interlayer insulating layer. A spacer pattern is disposed between the phase-change layer pattern and the molding layer.
    Type: Application
    Filed: September 1, 2005
    Publication date: March 2, 2006
    Inventors: Kyung-Chang Ryoo, Su-Youn Lee, Young-Nam Hwang, Se-Ho Lee