Patents by Inventor Su-Youn Lee

Su-Youn Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7105870
    Abstract: Phase-changeable memory devices include non-volatile memory cells. Each of these non-volatile memory cells may include a phase-changeable diode on a semiconductor substrate and a phase-changeable memory element having a first terminal electrically coupled to a terminal of the phase-changeable diode. This phase-changeable diode may include a lower electrode pattern on the semiconductor substrate, a first phase-changeable pattern on the lower electrode pattern and a gate switching layer pattern on the first phase-changeable pattern. The phase-changeable memory element includes a second phase-changeable pattern electrically coupled to the terminal of the phase-changeable diode and a memory switching layer pattern on the second phase-changeable pattern. The memory switching layer pattern may include a composite of a titanium layer pattern contacting the phase-changeable memory element and a titanium nitride layer pattern contacting the titanium layer pattern.
    Type: Grant
    Filed: June 3, 2005
    Date of Patent: September 12, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Su-Youn Lee, Su-Jin Ahn, Chang-Wook Jeong
  • Publication number: 20060043355
    Abstract: According to some embodiments of the present invention, there are provided PRAMS having a phase-change layer pattern interposed between a molding layer and a forming layer pattern, and methods of forming the same that include a node conductive layer pattern, a molding layer, a forming layer pattern and a protecting layer. The molding layer, the forming layer pattern and the protecting layer are formed to cover the planarized interlayer insulating layer and the node conductive layer pattern. A lower electrode is interposed between the molding layer and the planarized interlayer insulating layer. A phase-change layer pattern is formed on the planarized interlayer insulating layer. A spacer pattern is disposed between the phase-change layer pattern and the molding layer.
    Type: Application
    Filed: September 1, 2005
    Publication date: March 2, 2006
    Inventors: Kyung-Chang Ryoo, Su-Youn Lee, Young-Nam Hwang, Se-Ho Lee
  • Publication number: 20060011902
    Abstract: A phase change memory device includes a mold layer disposed on a substrate, a heating electrode, a filling insulation pattern and a phase change material pattern. The heating electrode is disposed in an opening exposing the substrate through the mold layer. The heating electrode is formed in a substantially cylindrical shape, having its sidewalls conformally disposed on the lower inner walls of the opening. The filling insulation pattern fills an empty region surrounded by the sidewalls of the heating electrode. The phase change material pattern is disposed on the mold layer and downwardly extended to fill the empty part of the opening. The phase change material pattern contacts the top surfaces of the sidewalls of the heating electrode.
    Type: Application
    Filed: June 10, 2005
    Publication date: January 19, 2006
    Inventors: Yoon-Jong Song, Se-Ho Lee, Ki-Nam Kim, Su-Youn Lee, Jae-Hyun Park
  • Publication number: 20050285094
    Abstract: Phase-changeable memory devices include non-volatile memory cells. Each of these non-volatile memory cells may include a phase-changeable diode on a semiconductor substrate and a phase-changeable memory element having a first terminal electrically coupled to a terminal of the phase-changeable diode. This phase-changeable diode may include a lower electrode pattern on the semiconductor substrate, a first phase-changeable pattern on the lower electrode pattern and a gate switching layer pattern on the first phase-changeable pattern. The phase-changeable memory element includes a second phase-changeable pattern electrically coupled to the terminal of the phase-changeable diode and a memory switching layer pattern on the second phase-changeable pattern. The memory switching layer pattern may include a composite of a titanium layer pattern contacting the phase-changeable memory element and a titanium nitride layer pattern contacting the titanium layer pattern.
    Type: Application
    Filed: June 3, 2005
    Publication date: December 29, 2005
    Inventors: Su-Youn Lee, Su-Jin Ahn, Chang-Wook Jeong
  • Publication number: 20050263801
    Abstract: A semiconductor device comprises a semiconductor substrate having an isolation region that defines an active region. The active region has a planar surface and a non-planar surface that extends from the planar surface. The device further includes a gate dielectric layer covering the non-planar surface and a first gate electrode extending across the non-planar surface with the gate dielectric layer therebetween. In addition, a source and drain region are formed on opposite sides of the gate electrode. According to an aspect of the present invention, the resulting device has a non-planar channel region extending between the source region and the drain region. The non-planar channel region is formed along the non-planar surface described above. Further, programmable resistance element is electrically coupled to the drain region to form a phase-change memory device.
    Type: Application
    Filed: March 21, 2005
    Publication date: December 1, 2005
    Inventors: Jae-Hyun Park, Sung-Min Kim, Yoon-Jong Song, Su-Youn Lee, Young-Nam Hwang
  • Publication number: 20050263829
    Abstract: In one embodiment, a phase-change memory device has an oxidation barrier layer to protect against memory cell contamination or oxidation and a method of manufacturing the same. In one embodiment, a semiconductor memory device comprises a molding layer overlying a semiconductor substrate. The molding layer has a protrusion portion vertically extending from a top surface thereof. The device further includes a phase-changeable material pattern adjacent the protrusion portion and a lower electrode electrically connected to the phase-changeable material pattern.
    Type: Application
    Filed: May 27, 2005
    Publication date: December 1, 2005
    Inventors: Yoon-Jong Song, Young-Nam Hwang, Sang-Don Nam, Sung-Lae Cho, Gwan-Hyeob Koh, Choong-Man Lee, Bong-Jin Kuh, Yong-Ho Ha, Su-Youn Lee, Chang-Wook Jeong, Ji-Hye Yi, Kyung-Chang Ryoo, Se-Ho Lee, Su-Jin Ahn, Soon-Oh Park, Jang-Eun Lee
  • Publication number: 20050263823
    Abstract: A phase-change memory device has an oxidation barrier layer to protect against memory cell contamination or oxidation and a method of manufacturing the same. In one embodiment, a semiconductor memory device comprises a molding layer overlying a semiconductor substrate. The molding layer has a protrusion portion vertically extending from a top surface thereof. The device further includes a phase-changeable material pattern adjacent the protrusion portion and a lower electrode electrically connected to the phase-changeable material pattern.
    Type: Application
    Filed: December 30, 2004
    Publication date: December 1, 2005
    Inventors: Young-Nam Hwang, Gwan-Hyeob Koh, Su-Jin Ahn, Sung-Lae Cho, Se-Ho Lee, Kyung-Chang Ryoo, Chang-Wook Jeong, Su-Youn Lee, Bong-Jin Kuh