Patents by Inventor Subal Sahni
Subal Sahni has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250123452Abstract: The present disclosure relates to circuit package implementations. The circuit package includes a PIC that allows for the transmission of data photonically between hardware coupled to the PIC. The circuit package further includes one or more spacers that are positioned above the PIC in a manner that allows light to pass through an optical path between the top surface of the circuit package and the PIC. Different spacers can be added to the package at different stages of the manufacturing process such that the optical path is maintained through the manufacturing of the circuit package. The circuit package having the optically accessible PIC may be implemented within the framework of a microelectronic package.Type: ApplicationFiled: December 20, 2024Publication date: April 17, 2025Inventors: Ankur Aggarwal, Subal Sahni, Philip Winterbottom
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Publication number: 20250123453Abstract: The present disclosure relates to circuit package implementations. The circuit package includes a PIC that allows for the transmission of data photonically between hardware coupled to the PIC. The circuit package further includes one or more spacers that are positioned above the PIC in a manner that allows light to pass through an optical path between the top surface of the circuit package and the PIC. Different spacers can be added to the package at different stages of the manufacturing process such that the optical path is maintained through the manufacturing of the circuit package. The circuit package having the optically accessible PIC may be implemented within the framework of a microelectronic package.Type: ApplicationFiled: December 20, 2024Publication date: April 17, 2025Inventors: Ankur Aggarwal, Subal Sahni
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Patent number: 12242122Abstract: A package includes a first die with a compute element and first region, a second die with a compute element and second region, and a bridging element connecting the first and second dies. The bridging element includes interconnect regions for electrical coupling, a first photonic path from the first interconnect region to the second, and a second photonic path in the reverse direction. A photonic transceiver is integrated into the bridging element, with one portion sending and receiving optical signals via the photonic paths, and the other portion located in an AMS block in the first die or second die near the memory and compute elements. The transceiver portions are connected by a short electrical interconnect (less than 2 mm).Type: GrantFiled: April 11, 2024Date of Patent: March 4, 2025Assignee: Celestial AI Inc.Inventors: Philip Winterbottom, David Lazovsky, Ankur Aggarwal, Martinus Bos, Subal Sahni
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Patent number: 12216318Abstract: A package includes a first die with a bridging element with a first interconnect region, a first photonic transceiver portion, a second interconnect region, a first photonic path to an optical interface (OI), and a second photonic path from the OI to the first photonic transceiver portion. The first interconnect region electrically couples the first photonic transceiver portion to a second photonic transceiver portion in an analog/mixed-signal die (AMS die), while the second interconnect region connects a third photonic transceiver portion in a general die to the second photonic transceiver portion using an electrical coupling embedded in the first die. The electrical interconnects in the first interconnect region are less than two millimeters in length.Type: GrantFiled: March 20, 2024Date of Patent: February 4, 2025Assignee: Celestial AI Inc.Inventors: Philip Winterbottom, David Lazovsky, Ankur Aggarwal, Martinus Bos, Subal Sahni
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Patent number: 12197023Abstract: The present disclosure relates to circuit package implementations. The circuit package includes a PIC that allows for the transmission of data photonically between hardware coupled to the PIC. The circuit package further includes one or more spacers that are positioned above the PIC in a manner that allows light to pass through an optical path between the top surface of the circuit package and the PIC. Different spacers can be added to the package at different stages of the manufacturing process such that the optical path is maintained through the manufacturing of the circuit package. The circuit package having the optically accessible PIC may be implemented within the framework of a microelectronic package.Type: GrantFiled: May 10, 2024Date of Patent: January 14, 2025Assignee: Celestial AI Inc.Inventors: Ankur Aggarwal, Subal Sahni, Philip Winterbottom
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Patent number: 12189198Abstract: The present disclosure relates to circuit package implementations. The circuit package includes a PIC that allows for the transmission of data photonically between hardware coupled to the PIC. The circuit package further includes one or more spacers that are positioned above the PIC in a manner that allows light to pass through an optical path between the top surface of the circuit package and the PIC. Different spacers can be added to the package at different stages of the manufacturing process such that the optical path is maintained through the manufacturing of the circuit package. The circuit package having the optically accessible PIC may be implemented within the framework of a microelectronic package.Type: GrantFiled: May 10, 2024Date of Patent: January 7, 2025Assignee: Celestial AI Inc.Inventors: Ankur Aggarwal, Subal Sahni
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Patent number: 12164161Abstract: An implementation provides a package that includes a first die including a bridging element, an analog/mixed-signal (AMS) die, and a general die. The first die includes: a first photonic transceiver portion, a first die first interconnect region, and an optical interface (OI). The AMS die includes a second photonic transceiver portion, an AMS die first interconnect region on a first surface of the AMS die electrically and physically coupled with the first die first interconnect region; and an AMS die second interconnect region on a second surface of the AMS die. The general die includes a third photonic transceiver portion, and a general die first interconnect region electrically and physically coupled with the second photonic transceiver portion.Type: GrantFiled: March 20, 2024Date of Patent: December 10, 2024Assignee: Celestial AI Inc.Inventors: Philip Winterbottom, David Lazovsky, Ankur Aggarwal, Martinus Bos, Subal Sahni
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Patent number: 12164162Abstract: A package comprises a first die and a bridging element. The first die includes a compute element and/or memory element, a first region, a first portion of a photonic transceiver, and a first die interconnect region. The first region intersects a center of the first die. The first portion of a photonic transceiver includes and AMS block with a driver and transimpedance amplifier, coupled with the first die interconnect region. The bridging element includes a modulator and photodetector, connected with a bridging interconnect region. An optical interface, photonically linked with the first photonic transceiver, routes packets from an external device optical interface to the compute and/or memory element.Type: GrantFiled: April 11, 2024Date of Patent: December 10, 2024Assignee: Celestial AI Inc.Inventors: Philip Winterbottom, David Lazovsky, Ankur Aggarwal, Martinus Bos, Subal Sahni
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Patent number: 12160273Abstract: An optical system includes a first optical source, a second optical source, a first optical modulator, and a second optical modulator. The first optical modulator includes a first input and a first output. The second optical modulator includes a second input, a third input, a second output, and a third output. During a first mode, the first optical source emits a first optical signal to the first input and the second input, the first optical modulator produces a first modulated optical signal at the first output, and the second optical modulator produces a second modulated optical signal at the second output. During a second mode, the second optical source emits a second optical signal to the third input and the second optical modulator produces a third modulated optical signal at the third output.Type: GrantFiled: December 1, 2022Date of Patent: December 3, 2024Assignee: Cisco Technology, Inc.Inventors: Brian P. Welch, Subal Sahni
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Patent number: 12130485Abstract: An implementation provides a package that includes a first die including a bridging element, an analog/mixed-signal (AMS) die, and a general die. The first die includes: a first photonic transceiver portion, a first die first interconnect region, and an optical interface (OI). The AMS die includes a second photonic transceiver portion, an AMS die first interconnect region on a first surface of the AMS die electrically and physically coupled with the first die first interconnect region; and an AMS die second interconnect region on a second surface of the AMS die. The general die includes a third photonic transceiver portion, and a general die first interconnect region electrically and physically coupled with the second photonic transceiver portion.Type: GrantFiled: March 20, 2024Date of Patent: October 29, 2024Assignee: Celestial AI Inc.Inventors: Philip Winterbottom, David Lazovsky, Ankur Aggarwal, Martinus Bos, Subal Sahni
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Patent number: 12124095Abstract: A package includes a bridging element (an OMIB), and first and second photonic paths, forming a bidirectional photonic path. The OMIB has first and second interconnect regions to connect with one or more dies. Third and fourth unidirectional photonic paths may couple between the first interconnect region and an optical interface (OI). A photonic transceiver has a first portion in the OMIB and a second portion in one of the dies. The first and the second portions may be coupled via an electrical interconnect less than 2 mm in length. The die includes compute elements around a central region, proximate to the second portion. The OMIB may include an electro-absorption modulator fabricated with germanium, silicon, an alloy of germanium, an alloy of silicon, a III-V material based on indium phosphide (InP), or a III-V material based on gallium arsenide (GaAs). The OMIB may include a temperature compensation for the modulator.Type: GrantFiled: September 7, 2023Date of Patent: October 22, 2024Assignee: Celestial AI Inc.Inventors: Philip Winterbottom, David Lazovsky, Ankur Aggarwal, Martinus Bos, Subal Sahni
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Publication number: 20240272392Abstract: A package comprises a first die and a bridging element. The first die includes a compute element and/or memory element, a first region, a first portion of a photonic transceiver, and a first die interconnect region. The first region intersects a center of the first die. The first portion of a photonic transceiver includes and AMS block with a driver and transimpedance amplifier, coupled with the first die interconnect region. The bridging element includes a modulator and photodetector, connected with a bridging interconnect region. An optical interface, photonically linked with the first photonic transceiver, routes packets from an external device optical interface to the compute and/or memory element.Type: ApplicationFiled: April 11, 2024Publication date: August 15, 2024Inventors: Philip WINTERBOTTOM, David LAZOVSKY, Ankur AGGARWAL, Martinus BOS, Subal SAHNI
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Publication number: 20240272393Abstract: A package includes a first die with a compute element and first region, a second die with a compute element and second region, and a bridging element connecting the first and second dies. The bridging element includes interconnect regions for electrical coupling, a first photonic path from the first interconnect region to the second, and a second photonic path in the reverse direction. A photonic transceiver is integrated into the bridging element, with one portion sending and receiving optical signals via the photonic paths, and the other portion located in an AMS block in the first die or second die near the memory and compute elements. The transceiver portions are connected by a short electrical interconnect (less than 2 mm).Type: ApplicationFiled: April 11, 2024Publication date: August 15, 2024Inventors: Philip WINTERBOTTOM, David Lazovsky, Ankur Aggarwal, Martinus Bos, Subal Sahni
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Publication number: 20240219664Abstract: A package includes a first die with a bridging element with a first interconnect region, a first photonic transceiver portion, a second interconnect region, a first photonic path to an optical interface (OI), and a second photonic path from the OI to the first photonic transceiver portion. The first interconnect region electrically couples the first photonic transceiver portion to a second photonic transceiver portion in an analog/mixed-signal die (AMS die), while the second interconnect region connects a third photonic transceiver portion in a general die to the second photonic transceiver portion using an electrical coupling embedded in the first die. The electrical interconnects in the first interconnect region are less than two millimeters in length.Type: ApplicationFiled: March 20, 2024Publication date: July 4, 2024Inventors: Philip WINTERBOTTOM, David LAZOVSKY, Ankur AGGARWAL, Martinus BOS, Subal SAHNI
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Publication number: 20240187102Abstract: An optical system includes a first optical source, a second optical source, a first optical modulator, and a second optical modulator. The first optical modulator includes a first input and a first output. The second optical modulator includes a second input, a third input, a second output, and a third output. During a first mode, the first optical source emits a first optical signal to the first input and the second input, the first optical modulator produces a first modulated optical signal at the first output, and the second optical modulator produces a second modulated optical signal at the second output. During a second mode, the second optical source emits a second optical signal to the third input and the second optical modulator produces a third modulated optical signal at the third output.Type: ApplicationFiled: December 1, 2022Publication date: June 6, 2024Inventors: Brian P. WELCH, Subal SAHNI
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Publication number: 20240176169Abstract: One some embodiments, a method for tuning optical components includes receiving an optical signal in a waveguide in a photonic-integrated circuit (PIC) and detecting optical outputs of the optical components. The method further includes determining pulse signals for the optical components designed to cause the optical components to each have a peak-resonance wavelength that matches a corresponding wavelength of the optical signal. The method further includes tuning the optical components by sending the pulse signals to the optical components.Type: ApplicationFiled: November 29, 2023Publication date: May 30, 2024Inventors: Subal Sahni, Philip Winterbottom
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Publication number: 20240145328Abstract: The present disclosure relates to thermal control systems, photonic memory fabrics, and electro-absorption modulators (EAMs). For example, the thermal control systems efficiently move data in a memory fabric based on utilizing and controlling thermally controlling optical components. As another example, the EAMs are instances of optical modulators used to efficiently move data within digital circuits while maintaining thermally-stable optical modulation across a wide temperature range.Type: ApplicationFiled: March 17, 2023Publication date: May 2, 2024Inventor: Subal Sahni
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Publication number: 20240077672Abstract: Embodiments include a photonic device with a compensation structure. The photonic device includes a waveguide with a refractive index which changes according to the thermo-optic effect as a temperature of the photonic device fluctuates. The compensation structure is positioned on the photonic device to counteract or otherwise alter the thermo-optic effect on the refractive index of the waveguide in order to prevent malfunctions of the photonic device.Type: ApplicationFiled: November 10, 2023Publication date: March 7, 2024Inventors: Subal SAHNI, Kamal V. KARIMANAL, Gianlorenzo MASINI, Attila MEKIS, Roman BRUCK
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Publication number: 20240027711Abstract: A package includes a bridging element (an OMIB), and first and second photonic paths, forming a bidirectional photonic path. The OMIB has first and second interconnect regions to connect with one or more dies. Third and fourth unidirectional photonic paths may couple between the first interconnect region and an optical interface (OI). A photonic transceiver has a first portion in the OMIB and a second portion in one of the dies. The first and the second portions may be coupled via an electrical interconnect less than 2 mm in length. The die includes compute elements around a central region, proximate to the second portion. The OMIB may include an electro-absorption modulator fabricated with germanium, silicon, an alloy of germanium, an alloy of silicon, a III-V material based on indium phosphide (InP), or a III-V material based on gallium arsenide (GaAs). The OMIB may include a temperature compensation for the modulator.Type: ApplicationFiled: October 4, 2023Publication date: January 25, 2024Inventors: Philip WINTERBOTTOM, David LAZOVSKY, Ankur AGGARWAL, Martinus BOS, Subal SAHNI
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Publication number: 20240004260Abstract: Methods and systems for a vertical junction high-speed phase modulator are disclosed and may include a semiconductor device having a semiconductor waveguide including a slab section, a rib section extending above the slab section, and raised ridges extending above the slab section on both sides of the rib section. The semiconductor device has a vertical pn junction with p-doped material and n-doped material arranged vertically with respect to each other in the rib and slab sections. The rib section may be either fully n-doped or p-doped in each cross-section along the semiconductor waveguide. Electrical connection to the p-doped and n-doped material may be enabled by forming contacts on the raised ridges, and electrical connection may be provided to the rib section from one of the contacts via periodically arranged sections of the semiconductor waveguide, where a cross-section of both the rib section and the slab section in the periodically arranged sections may be fully n-doped or fully p-doped.Type: ApplicationFiled: September 13, 2023Publication date: January 4, 2024Inventors: Attila MEKIS, Subal SAHNI, Yannick DE KONINCK, Gianlorenzo MASINI, Faezeh GHOLAMI