Abstract: Methods and systems for optical power monitoring of a light source assembly coupled to a silicon photonically-enabled integrated circuit (chip) are disclosed and may include, in a system comprising an optical source assembly coupled to the chip: emitting a primary beam from a front facet of a laser in the optical source assembly and a secondary beam from a back facet of the laser, directing the primary beam to an optical coupler in the chip, directing the secondary beam to a surface-illuminated photodiode in the chip, and monitoring an output power of the laser utilizing an output signal from the photodiode. The primary beam may comprise an optical source for a photonics transceiver in the chip. The focused primary beam and the secondary beam may be directed to the chip using reflectors in a lid of the optical source assembly.

Abstract: A method and system for optoelectronic receivers utilizing waveguide heterojunction phototransistors (HPTs) integrated in a CMOS SOI wafer are disclosed and may include receiving optical signals via a top surface of a photonically-enabled CMOS chip; and generating electrical signals in the chip utilizing one or more HPTs that detect optical signals. The HPTs may comprise a base and a split collector, with the split collector comprising a silicon-on-insulator (SOI) layer and a germanium layer. The thickness of the germanium layer may be such that carriers in the base do not interact with defects from an interface between the SOI layer and the germanium layer. The electrical signals may be amplified by amplifiers, the outputs of which may be utilized to bias the HPTs by a feedback network. An electrode formed longitudinally in the direction of light travel through the HPTs may bias the base of the HPTs.

Abstract: Methods and systems for optical power monitoring of a light source assembly coupled to a silicon photonically-enabled integrated circuit (chip) are disclosed and may include, in a system comprising an optical source assembly coupled to the chip: emitting a primary beam from a front facet of a laser in the optical source assembly and a secondary beam from a back facet of the laser, directing the primary beam to an optical coupler in the chip, directing the secondary beam to a surface-illuminated photodiode in the chip, and monitoring an output power of the laser utilizing an output signal from the photodiode. The primary beam may comprise an optical source for a photonics transceiver in the chip. The focused primary beam and the secondary beam may be directed to the chip using reflectors in a lid of the optical source assembly.

Abstract: Methods and systems for germanium-on-silicon photodetectors without germanium layer contacts are disclosed and may include, in a semiconductor die having a photodetector, where the photodetector includes an n-type silicon layer, a germanium layer, a p-type silicon layer, and a metal contact on each of the n-type silicon layer and the p-type silicon layer: receiving an optical signal, absorbing the optical signal in the germanium layer, generating an electrical signal from the absorbed optical signal, and communicating the electrical signal out of the photodetector via the n-type silicon layer and the p-type silicon layer. The photodetector may include a horizontal or vertical junction double heterostructure where the germanium layer is above the n-type and p-type silicon layers. An intrinsically-doped silicon layer may be below the germanium layer between the n-type silicon layer and the p-type silicon layer. A top portion of the germanium layer may be p-doped.

Abstract: Methods and systems for an optoelectronic built-in self-test (BIST) system for silicon photonics optical transceivers are disclosed and may include, in an optoelectronic transceiver having a transmit (Tx) path and a receive (Rx) path, where the Rx path includes a main Rx path and a BIST loopback path: generating a pseudo-random bit sequence (PRBS) signal, generating an optical signal in the Tx path by applying the PRBS signal to a modulator, communicating the optical signal to the BIST loopback path and converting to an electrical signal utilizing a photodetector, the photodetector being a replica of a photodetector in the main Rx path, and assessing the performance of the Tx and Rx paths by extracting a PRBS signal from the electrical signal. The transceiver may be a single complementary-metal oxide semiconductor (CMOS) die or in two CMOS die, where a first comprises electronic devices and a second comprises optical devices.

Abstract: Methods and systems for a silicon-based optical phase modulator with high modal overlap are disclosed and may include, in an optical modulator having a rib waveguide in which a cross-shaped depletion region separates four alternately doped sections: receiving an optical signal at one end of the optical modulator, modulating the received optical signal by applying a modulating voltage, and communicating a modulated optical signal out of an opposite end of the modulator. The modulator may be in a silicon photonically-enabled integrated circuit which may be in a complementary-metal oxide semiconductor (CMOS) die. An optical mode may be centered on the cross-shaped depletion region. The four alternately doped sections may include: a shallow depth p-region, a shallow depth n-region, a deep p-region, and a deep n-region. The shallow depth p-region may be electrically coupled to the deep p-region periodically along the length of the modulator.

Abstract: Methods and systems for a low-parasitic silicon high-speed phase modulator are disclosed and may include fabricating an optical phase modulator that comprises a PN junction waveguide formed in a silicon layer, wherein the silicon layer may be on an oxide layer and the oxide layer may be on a silicon substrate. The PN junction waveguide may have p-doped and n-doped regions on opposite sides along a length of the PN junction waveguide, and portions of the p-doped and n-doped regions may be removed. Contacts may be formed on remaining portions of the p-doped and n-doped regions. Portions of the p-doped and n-doped regions may be removed symmetrically about the PN junction waveguide. Portions of the p-doped and n-doped regions may be removed in a staggered fashion along the length of the PN junction waveguide. Etch transition features may be removed along the p-doped and n-doped regions.

Abstract: Methods and systems for optical power monitoring of a light source assembly coupled to a silicon photonically-enabled integrated circuit (chip) are disclosed and may include, in a system comprising an optical source assembly coupled to the chip: emitting a primary beam from a front facet of a laser in the optical source assembly and a secondary beam from a back facet of the laser, directing the primary beam to an optical coupler in the chip, directing the secondary beam to a surface-illuminated photodiode in the chip, and monitoring an output power of the laser utilizing an output signal from the photodiode. The primary beam may comprise an optical source for a photonics transceiver in the chip. The focused primary beam and the secondary beam may be directed to the chip using reflectors in a lid of the optical source assembly.

Abstract: A method and system for optoelectronic receivers utilizing waveguide heterojunction phototransistors (HPTs) integrated in a CMOS SOI wafer are disclosed and may include receiving optical signals via a top surface of a photonically-enabled CMOS chip; and generating electrical signals in the chip utilizing one or more HPTs that detect optical signals. The HPTs may comprise a base and a split collector, with the split collector comprising a silicon-on-insulator (SOI) layer and a germanium layer. The thickness of the germanium layer may be such that carriers in the base do not interact with defects from an interface between the SOI layer and the germanium layer. The electrical signals may be amplified by amplifiers, the outputs of which may be utilized to bias the HPTs by a feedback network. An electrode formed longitudinally in the direction of light travel through the HPTs may bias the base of the HPTs.

Abstract: A method and system for optoelectronic receivers utilizing waveguide heterojunction phototransistors (HPTs) integrated in a CMOS SOI wafer are disclosed and may include receiving optical signals via optical fibers operably coupled to a top surface of the chip. Electrical signals may be generated utilizing HPTs that detect the optical signals. The electrical signals may be amplified via voltage amplifiers, or transimpedance amplifiers, the outputs of which may be utilized to bias the HPTs by a feedback network. The optical signals may be coupled into opposite ends of the HPTs. A collector of the HPTs may comprise a silicon layer and a germanium layer, a base may comprise a silicon germanium alloy with germanium composition ranging from 70% to 100%, and an emitter including crystalline or poly Si or SiGe. The optical signals may be demodulated by communicating a mixer signal to a base terminal of the HPTs.

Abstract: A method and system for optoelectronic receivers utilizing waveguide heterojunction phototransistors (HPTs) integrated in a CMOS SOI wafer are disclosed and may include receiving optical signals via optical fibers operably coupled to a top surface of the chip. Electrical signals may be generated utilizing HPTs that detect the optical signals. The electrical signals may be amplified via voltage amplifiers, or transimpedance amplifiers, the outputs of which may be utilized to bias the HPTs by a feedback network. The optical signals may be coupled into opposite ends of the HPTs. A collector of the HPTs may comprise a silicon layer and a germanium layer, a base may comprise a silicon germanium alloy with germanium composition ranging from 70% to 100%, and an emitter including crystalline or poly Si or SiGe. The optical signals may be demodulated by communicating a mixer signal to a base terminal of the HPTs.