Abstract: A hybrid class-H/predictive class-G switching amplifier architecture and techniques for amplifying a signal (e.g., an audio signal) using such an architecture. One example method of amplification generally includes delaying an input signal to generate a delayed version of the input signal, amplifying the delayed version of the input signal with an amplifier powered by a boost converter, and selectively controlling the boost converter to operate in at least one of a predictive class-G mode or a class-H mode, based on a magnitude of the input signal.

Abstract: A trigger circuit includes a first capacitor and a second capacitor connected in series, a control device and an output of the trigger circuit. The first capacitor is connected to a first voltage rail and to a common node. The second capacitor is connected to a second voltage rail and to the common node. The control device has a first terminal that is coupled to the common node and a control terminal to receive a control signal. The control signal may be decoupled from transients on the first voltage rail and the second voltage rail. The output of the trigger circuit is coupled to the common node.

Abstract: Apparatus and techniques for adaptively adjusting an input current limit for a boost converter supplying power to a load, such as an amplifier. An example circuit for supplying power generally includes a boost converter having an output coupled to a load, and logic configured to adaptively adjust an input current limit for the boost converter based on an estimated output power for the boost converter and to apply the input current limit to the boost converter. One example method for supplying power generally includes converting an input voltage to an output voltage with a boost converter, to power a load for the boost converter, adaptively adjusting an input current limit for the boost converter based on an estimated output power for the boost converter, and applying the input current limit to the boost converter during the converting.

Abstract: A hybrid class-H/predictive class-G switching amplifier architecture and techniques for amplifying a signal (e.g., an audio signal) using such an architecture. One example method of amplification generally includes delaying an input signal to generate a delayed version of the input signal, amplifying the delayed version of the input signal with an amplifier powered by a boost converter, and selectively controlling the boost converter to operate in at least one of a predictive class-G mode or a class-H mode, based on a magnitude of the input signal.

Abstract: An example power supply circuit includes a boost converter and a feedback control circuit. The boost converter generally includes an inductive element coupled between an input voltage node and a switching node, a first switch coupled between the switching node and a reference potential node, a second switch or a diode coupled between the switching node and an output voltage node. The feedback control circuit has a first input coupled to the output voltage node and has an output coupled to at least a control input of the first switch. The feedback control circuit generally includes a voltage node configured to influence a duty cycle of the boost converter; and a feedforward path coupled to the voltage node and configured to have a voltage signal derived from at least one of an input voltage at the input voltage node or an output signal at the output voltage node.

Abstract: A class-D amplifier including a pulse width modulator including an input configured to receive a first signal based on an input signal, and an output configured to generate a pulse width modulated (PWM) signal; an H-bridge including an input coupled to an output of the pulse width modulator and an output coupled to a load, wherein the H-bridge is configured to generate an output signal across the load based on the PWM signal; and a deadtime compensation circuit coupled to the H-bridge, wherein the deadtime compensation circuit is configured to compensate for deadtime distortion in the output signal. The deadtime compensation circuit may be a feedback circuit between an output of the H-bridge and an input of the pulse width modulator, a pulse modification circuit at the output of the pulse width modulator, or an offset signal generating circuit providing an offset signal to the pulse width modulator.

Abstract: A trigger circuit includes a first capacitor and a second capacitor connected in series, a control device and an output of the trigger circuit. The first capacitor is connected to a first voltage rail and to a common node. The second capacitor is connected to a second voltage rail and to the common node. The control device has a first terminal that is coupled to the common node and a control terminal to receive a control signal. The control signal may be decoupled from transients on the first voltage rail and the second voltage rail. The output of the trigger circuit is coupled to the common node.

Abstract: A method includes receiving first data associated with a first power amplifier and second data associated with a second power amplifier. The method also includes generating a first amplitude limiting signal having gain parameters that are based on the first data and the second data. The first data includes at least one of a temperature measurement associated with the first power amplifier, a supply voltage measurement associated with the first power amplifier, a load resistance associated with the first power amplifier, or a gain associated with the first power amplifier. The method further includes modifying an audio signal based at least in part on the first amplitude limiting signal to generate a first gain-adjusted audio signal. The method also includes providing a first output audio signal to the first power amplifier for amplification. The first output audio signal is based at least in part on the first gain-adjusted audio signal.

Abstract: A class-D amplifier including a pulse width modulator including an input configured to receive a first signal based on an input signal, and an output configured to generate a pulse width modulated (PWM) signal; an H-bridge including an input coupled to an output of the pulse width modulator and an output coupled to a load, wherein the H-bridge is configured to generate an output signal across the load based on the PWM signal; and a deadtime compensation circuit coupled to the H-bridge, wherein the deadtime compensation circuit is configured to compensate for deadtime distortion in the output signal. The deadtime compensation circuit may be a feedback circuit between an output of the H-bridge and an input of the pulse width modulator, a pulse modification circuit at the output of the pulse width modulator, or an offset signal generating circuit providing an offset signal to the pulse width modulator.

Abstract: Certain aspects of the present disclosure provide a power supply circuit. The power supply circuit generally includes: a switched-mode power supply (SMPS) having an inductive element and a first switch coupled to the inductive element; a feedback path coupled between an output of the SMPS and a control input of the first switch; and a current limit circuit comprising a first capacitive element, a charge circuit coupled to the first capacitive element, a first current source, a first resistive element coupled to the first current source, the capacitive element being coupled to a node between the resistive element and the first current source, a sample-and-hold circuit coupled to the first capacitive element, and a clamp circuit coupled between the sample-and-hold circuit and the feedback path.

Abstract: Certain aspects of the present disclosure are directed to an apparatus for voltage regulation. The apparatus generally includes a first switch, an inductive element, the first switch being coupled between a first voltage rail and a first terminal of the inductive element, a second switch coupled between a second voltage rail and the first terminal of the inductive element, a third switch coupled between a second terminal of the inductive element and a reference potential node, and a fourth switch coupled between the second terminal of the inductive element and an output node.

Abstract: An example power supply circuit includes a boost converter and a feedback control circuit. The boost converter generally includes an inductive element coupled between an input voltage node and a switching node, a first switch coupled between the switching node and a reference potential node, a second switch or a diode coupled between the switching node and an output voltage node. The feedback control circuit has a first input coupled to the output voltage node and has an output coupled to at least a control input of the first switch. The feedback control circuit generally includes a voltage node configured to influence a duty cycle of the boost converter; and a feedforward path coupled to the voltage node and configured to have a voltage signal derived from at least one of an input voltage at the input voltage node or an output signal at the output voltage node.

Abstract: Certain aspects of the present disclosure provide apparatus and techniques for capacitance modulation to mitigate pixel leakage in ultrasonic sensors. For example, certain aspects are directed to an ultrasonic sensor including a column line, a pixel having a transistor coupled to the column line, a pixel control circuit coupled to a drain the transistor of the pixel. The ultrasonic sensor may also include a column control circuit coupled to a source of the transistor, wherein at least one of the pixel control circuit or the column control circuit is configured to couple at least one of the drain or the source of the transistor, respectively, to an electric ground during a hold phase of the ultrasonic sensor, and a receiver circuit coupled to the column line.

Abstract: Certain aspects of the present disclosure provide a power supply circuit. The power supply circuit generally includes: a switched-mode power supply (SMPS) having an inductive element and a first switch coupled to the inductive element; a feedback path coupled between an output of the SMPS and a control input of the first switch; and a current limit circuit comprising a first capacitive element, a charge circuit coupled to the first capacitive element, a first current source, a first resistive element coupled to the first current source, the capacitive element being coupled to a node between the resistive element and the first current source, a sample-and-hold circuit coupled to the first capacitive element, and a clamp circuit coupled between the sample-and-hold circuit and the feedback path.

Abstract: Certain aspects of the present disclosure provide techniques for look-ahead column sensing for fast voltage-mode read on ultrasonic sensors. For example, certain aspects are directed to an ultrasonic sensor that generally includes a column line, a pixel having a transistor coupled between a voltage rail and the column line, a receiver circuit, and a first column control circuit coupled between the receiver circuit and the pixel, the first column control circuit being configured to electrically isolate the column line from the receiver circuit during a look-ahead settling phase of the ultrasonic sensor, and electrically couple the column line to the receiver circuit during a sensing phase of the ultrasonic sensor.

Abstract: Certain aspects of the present disclosure provide apparatus and techniques for capacitance modulation to mitigate pixel leakage in ultrasonic sensors. For example, certain aspects are directed to an ultrasonic sensor including a column line, a pixel having a transistor coupled to the column line, a pixel control circuit coupled to a drain the transistor of the pixel. The ultrasonic sensor may also include a column control circuit coupled to a source of the transistor, wherein at least one of the pixel control circuit or the column control circuit is configured to couple at least one of the drain or the source of the transistor, respectively, to an electric ground during a hold phase of the ultrasonic sensor, and a receiver circuit coupled to the column line.

Abstract: Certain aspects of the present disclosure provide techniques for look-ahead column sensing for fast voltage-mode read on ultrasonic sensors. For example, certain aspects are directed to an ultrasonic sensor that generally includes a column line, a pixel having a transistor coupled between a voltage rail and the column line, a receiver circuit, and a first column control circuit coupled between the receiver circuit and the pixel, the first column control circuit being configured to electrically isolate the column line from the receiver circuit during a look-ahead settling phase of the ultrasonic sensor, and electrically couple the column line to the receiver circuit during a sensing phase of the ultrasonic sensor.

Abstract: In certain aspects, a delay circuit includes a multiplexer, a first delay path coupled between an input of the delay circuit and a first input of the multiplexer, and a second delay path coupled between the input of the delay circuit and a second input of the multiplexer. The first delay path includes a first delay device, and the second delay path includes a first inverter, a second delay device, and a second inverter. In other aspects, a delay circuit includes a latch including a first input, a second input, and an output. The first input of the latch is coupled to an input of the delay circuit. The delay circuit also includes a delay path coupled between the input of the delay circuit and the second input of the latch, wherein the delay path includes a pulse generator and a delay device.

Abstract: In one embodiment, a control circuit adjusts a duty cycle of a boost converter and comprises a duty cycle limiter generator configured to receive an input voltage provided to the boost converter and to generate a control signal to be provided to the boost converter for adjusting the duty cycle of the boost converter to control the output voltage of the booster converter in response to the input voltage. In one embodiment, the maximum duty cycle limit generator further generates the maximum duty cycle signal in response to an output voltage of the boost converter.

Abstract: An amplifier circuit includes an amplifier and a voltage boost circuit configured to provide a variable supply voltage to the amplifier, the variable supply voltage continuously proportional to an audio input signal, the variable supply voltage configured to follow an output of the amplifier.