Patents by Inventor Subbarao Surendra Chakkirala

Subbarao Surendra Chakkirala has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180337680
    Abstract: Aspects of the disclosure are directed to a level shifter circuit. In accordance with one aspect, the level shifter circuit includes a high voltage device; a latch having a first side and a second side, wherein the latch is tied to a weak pull down to ground; and a pair of current-mirror transistors; wherein a first current-mirror transistor of the pair includes a first input coupled to the first side of the latch and a first output coupled to the high voltage device; and wherein a second current-mirror transistor of the pair includes a second input coupled to the second side of the latch and a second output coupled to the high voltage device.
    Type: Application
    Filed: May 17, 2017
    Publication date: November 22, 2018
    Inventor: Subbarao Surendra Chakkirala
  • Publication number: 20180337637
    Abstract: An amplifier circuit includes an amplifier and a voltage boost circuit configured to provide a variable supply voltage to the amplifier, the variable supply voltage continuously proportional to an audio input signal, the variable supply voltage configured to follow an output of the amplifier.
    Type: Application
    Filed: May 18, 2017
    Publication date: November 22, 2018
    Inventors: Sherif GALAL, Subbarao Surendra CHAKKIRALA, Khaled ABDELFATTAH, Earl SCHREYER
  • Publication number: 20160126839
    Abstract: In one embodiment, a control circuit adjusts a duty cycle of a boost converter and comprises a duty cycle limiter generator configured to receive an input voltage provided to the boost converter and to generate a control signal to be provided to the boost converter for adjusting the duty cycle of the boost converter to control the output voltage of the booster converter in response to the input voltage. In one embodiment, the maximum duty cycle limit generator further generates the maximum duty cycle signal in response to an output voltage of the boost converter.
    Type: Application
    Filed: November 5, 2014
    Publication date: May 5, 2016
    Inventors: Subbarao Surendra Chakkirala, Jiwei Chen