Abstract: A method of wear leveling receives a write request. The write request indicates received data to be written to memory blocks. The method detects a system condition. Example system conditions include a random write condition, a garbage collection start condition, and/or a sequential write condition. Based on the system condition, the method determines whether the received data comprises hot data or cold data. Some embodiments use a write amplification value to determine the system condition. If the received data comprises hot data, the method writes the received data to a cold block. If the received data comprises cold data, the method writes the received data to a hot block.

Abstract: A data storage device includes a nonvolatile solid-state memory comprising a plurality of blocks and a controller configured to maintain age data associated with each of a plurality of memory units, wherein each memory unit comprises one or more of the plurality of blocks, determine a capacity of the nonvolatile solid-state memory, and perform a wear leveling operation on a first memory unit of the plurality of memory units based at least in part on the age data associated with the first memory unit and the capacity of the nonvolatile solid-state memory.

Abstract: The subject technology provides for managing a data storage system. A host write command to write host data associated with a logical address to a non-volatile memory is received. A first physical address in the non-volatile memory mapped to the logical address in an address mapping table is determined. An indicator that the first physical address is bad checked. If the first physical address is indicated as bad, a valid count associated with a first set of physical addresses at a current value is maintained. The first set of physical addresses comprises the first physical address. If the first physical address is not indicated as bad, the first physical address is marked as invalid. The valid count associated with the first set of physical addresses is decremented.

Abstract: A data storage device that provides priority-based internal data movement includes a controller communicatively coupled to volatile memory and to non-volatile memory circuits, where the controller is configured to queue requests in a plurality of queues in the volatile memory, where each of the requests is associated with one of a plurality of internal data movement command types. The controller is also configured to select one of the plurality of queues based on a prioritization of the plurality of internal data movement command types. The controller is also configured to determine that the selected queue includes at least one request of the associated internal data movement command type. The controller is also configured to issue the at least one request from the selected queue to at least one of the non-volatile memory circuits.

Abstract: Host data segments are received and stored in a cached data unit corresponding to a previously stored data unit currently stored in non-volatile memory. Metadata is created that identifies unmodified previously stored segments of host data in the previously stored data unit that correspond to the received host data segments, the metadata including an update flag indicating that the previously stored data unit requires updating. In response to detecting the unexpected interruption of power, the cached data unit and the metadata is written to an area of the non-volatile memory array that is different than where the previously stored data unit is currently stored. Upon resuming operation following the unexpected interruption of power, the cached data unit is identified based on the update flag, as having been saved in response to the power shutdown without the previously stored data unit being updated in the non-volatile memory array, and then reloaded into the memory cache.

Abstract: A data storage device includes a nonvolatile solid-state memory comprising a plurality of blocks and a controller configured to maintain age data associated with each of a plurality of memory units, wherein each memory unit comprises one or more of the plurality of blocks, determine a capacity of the nonvolatile solid-state memory, and perform a wear leveling operation on a first memory unit of the plurality of memory units based at least in part on the age data associated with the first memory unit and the capacity of the nonvolatile solid-state memory.

Abstract: The subject technology provides for recovering a validity table for a data storage system. A set of logical addresses in a mapping table is partitioned into subsets of logical addresses. Each of the subsets of logical addresses is assigned to respective processor cores in the data storage system. Each of the processor cores is configured to check each logical address of the assigned subset of logical addresses in the mapping table for a valid physical address mapped to the logical address, for each valid physical address mapped to a logical address of the assigned subset of logical addresses, increment a validity count in a local validity table associated with a blockset of the non-volatile memory corresponding to the valid physical address, and update validity counts in a global validity table associated with respective blocksets of the non-volatile memory with the validity counts in the local validity table.

Abstract: A method of wear leveling receives a write request. The write request indicates received data to be written to memory blocks. The method detects a system condition. Example system conditions include a random write condition, a garbage collection start condition, and/or a sequential write condition. Based on the system condition, the method determines whether the received data comprises hot data or cold data. Some embodiments use a write amplification value to determine the system condition. If the received data comprises hot data, the method writes the received data to a cold block. If the received data comprises cold data, the method writes the received data to a hot block.

Abstract: An example device includes a memory device and one or more processors. The memory device is configured to store a table that includes two or more mappings, each mapping being associated with a respective logical address and a respective physical address. The processors are configured to identify, within the table, a first zone and a second zone. Each zone includes one or more mappings of the table. The zones do not share any mapping of the table. The processors are further configured to form a first log list indicating one or more mapping updates associated with the mapping(s) included in the first zone, to form a second log list indicating one or more mapping updates associated with the mapping(s) included in the second zone, and to replay a portion of the first log list and a portion of the second log list concurrently to update the table.

Abstract: An example device includes a memory device and one or more processors. The memory device is configured to store a table that includes two or more mappings, each mapping being associated with a respective logical address and a respective physical address. The processors are configured to identify, within the table, a first zone and a second zone. Each zone includes one or more mappings of the table. The zones do not share any mapping of the table. The processors are further configured to form a first log list indicating one or more mapping updates associated with the mapping(s) included in the first zone, to form a second log list indicating one or more mapping updates associated with the mapping(s) included in the second zone, and to replay a portion of the first log list and a portion of the second log list concurrently to update the table.