Abstract: Methods and semiconductor devices are provided. A vertical junction field effect transistor (JFET) includes a substrate, an active region having a plurality of semiconductor fins, a source metal layer on an upper surface of the fins, a source metal pad layer coupled to the semiconductor fins through the source metal layer, a gate region surrounding the semiconductor fins, and a body diode surrounding the gate region.

Abstract: A method to address imbalance across User Plane Function nodes supporting a network slice. The method includes calculating an average utilization load for a resource for a network slice supported by multiple User Plane Function nodes, identifying an imbalance in utilization of the resource for at least one of the User Plane Function nodes, based on the average utilization load, and in response to identifying the imbalance, controlling the at least one of the User Plane Function nodes to select, based on a predetermined criterion supplied to the at least one of the User Plane Function nodes, a session that supports the network slice and to perform a corrective action with respect to the session.

Abstract: Embodiments of the disclosure are in the field of advanced integrated circuit structure fabrication and, in particular, 10 nanometer node and smaller integrated circuit structure fabrication and the resulting structures. In an example, an integrated circuit structure includes a fin. A gate dielectric layer is over the top of the fin and laterally adjacent the sidewalls of the fin. A gate electrode is over the gate dielectric layer over the top of the fin and laterally adjacent the sidewalls of the fin. First and second semiconductor source or drain regions are adjacent the first and second sides of the gate electrode, respectively. First and second trench contact structures are over the first and second semiconductor source or drain regions, respectively, the first and second trench contact structures both comprising a U-shaped metal layer and a T-shaped metal layer on and over the entirety of the U-shaped metal layer.

Abstract: This invention is directed to immunogenic composition, conjugates, virus-lie particles (VLP) compositions, vaccines and methods directed to the treatment and/or prevent of infection by Human Papillomavirus.

Abstract: A vertical, fin-based field effect transistor (FinFET) device includes an array of individual FinFET cells. The array includes a plurality of rows and columns of separated fins. Each of the separated fins is in electrical communication with a source contact. The vertical FinFET device also includes one or more rows of first inactive fins disposed on a first set of sides of the array of individual FinFET cells, one or more columns of second inactive fins disposed on a second set of sides of the array of individual FinFET cells, and a gate region surrounding the individual FinFET cells of the array of individual FinFET cells, the first inactive fins, and the second inactive fins.

Abstract: The present disclosure is directed to systems and techniques for providing signaling optimization for Modify Access Bearer Request (MABR) messaging in a network. In one example, the systems and techniques can include negotiating, using a Mobility Management Engine (MME), a MABR support for the MME to include subscriber information in one or more MABR messages transmitted by the MME. The MME can determine an updated subscriber information, wherein the updated subscriber information is determined based on a User Equipment (UE) location change. Based at least in part on the negotiated MABR support, and in response to the MME determining the updated subscriber information, the MME can transmit a single MABR to a Serving Gateway (SGW), wherein the single MABR message includes the updated subscriber information.

Abstract: The technologies described herein are generally directed to provisioning services from a network. For example, a method described herein can include facilitating receiving a provisioning request for a network provisioning task. Further, the method can include, based on the network provisioning task, selecting a logical provisioning template to facilitate a performance of the network provisioning task. Further, based on the logical provisioning template, the method can include identifying a programming object comprising logical commands for the performance of the network provisioning task. The method can include executing the logical commands of the programming object to control service implementation equipment to perform the network provisioning task.

Abstract: Embodiments herein disclose a method for fabricating high aspect ratio structures. The method includes depositing a predefined quantity of a viscoelastic fluid on a top surface of a bottom cell plate and compressing the viscoelastic fluid deposited on the top surface of the bottom cell plate using a bottom surface of a top cell plate. The viscoelastic fluid is a blend of a solvent and a polymer. At least one of the top cell plate and bottom cell plate comprises a plurality of lands, sealed source holes and/or unsealed source hole for penetration of a low-viscous fluid. Further, the method includes separating the top cell plate and the bottom cell plate to induce out of plane stretching of the high viscous fluid and obtaining a plurality of high aspect ratio structures between the top cell plate and the bottom cell plate due to the penetration of the low-viscous fluid.

Abstract: The invention is directed to compositions and methods for the prevention and treatment of infections where the causative agent is a Klebsiella microorganism. In particular, the invention is directed to multivalent immunogenic compositions and vaccines containing multiple different serotypes of Klebsiella capsular polysaccharides and/or subcapsular polysaccharides that are prevalent in low- and middle-income countries where the burden of disease is high.

Abstract: Methods and systems are described for a retimer module comprising a first cable connector and a second cable connector, a peripheral component interconnect express (PCIe) retimer die comprising one or more upstream PHYs coupled to the first cable connector and one or more downstream PHYs coupled to the second cable connector, the PCIe retimer die further comprising an I2C input coupled between designated I2C pins of the first and second cable connectors, a voltage regulator module (VRM) configured to receive a supply voltage via a pin of the first cable connector, to responsively generate a plurality of regulated supply voltages, and to provide the plurality of regulated supply voltages to the retimer die, and a casing containing the retimer die and the voltage regulator module, the casing comprising a fastener for mounting to a chassis.

Abstract: Described are electrostatic chucks that are useful to support a workpiece during a step of processing the workpiece, and electrostatic chuck base components prepared by an additive manufacturing technique.

Abstract: A cabinet for a refrigerator includes: (a) a first inner liner defining a first cavity; (b) a second inner liner defining a second cavity; (c) an outer wrapper at least partially surrounding the first inner liner and the second inner liner; (d) a trim breaker coupling the outer wrapper, the first inner liner, and the second inner liner together, the trim breaker comprising (i) a first opening into the first cavity, (ii) a second opening into the second cavity, and (iii) a transition portion extending between the first opening and the second opening, the transition portion comprising a forward portion and a rear portion; and (e) a vacuum insulated panel disposed proximate the rear portion of the transition portion.

Abstract: A refrigeration appliance includes a cabinet having a trim breaker defining a mullion region and a refrigerant system. The cabinet defines a first compartment and a second compartment. The refrigerant system includes a refrigerant defining a flow path through a compressor, a heat loop coupled to the compressor, a condenser coupled to the heat loop, and an evaporator assembly coupled to the compressor and the condenser. The heat loop is routed around a perimeter of the cabinet and through the mullion region. The evaporator assembly includes at least one first evaporator disposed in the first compartment and a second evaporator disposed in the second compartment. The at least one first evaporator may include a first roll bond evaporator coupled to a second roll bond evaporator in series with the first, or a wire-on-tube evaporator.

Abstract: An otic application for treatment of an upper respiratory infection of an upper respiratory system of a human or animal subject, the otic application including an antiviral agent to inhibit viral replication or infection, and at least one oil to facilitate transport of the antiviral agent to the upper respiratory system of the subject, such that the otic application is configured for use within an ear of the subject for treating the upper respiratory infection within the subject, and such that the otic application is configured to diffuse through an intact tympanic membrane of the subject from the ear and deliver the antiviral agent to the upper respiratory system of the subject, thereby treating the upper respiratory infection.

Abstract: The disclosure relates generally novel inhibitors of human cGAS and methods of treating cGAS-related diseases or disorders in a patient.

Abstract: A fire sprinkler includes a body, a seal, a trigger, and a detector. The body includes an inlet, an outlet, and a passageway between the inlet and the outlet. The seal is coupled with the outlet to seal the outlet. The trigger is coupled with the seal such that operation of the trigger releases the seal from the outlet. The detector is coupled with the body. The detector is to cause the operation of the trigger responsive to detection of a fire condition.

Abstract: Techniques are described for predicting a wide area network (WAN) issue based on detection of service provider connection swapping. A cloud-based network management system (NMS) obtains connection event data for one or more network access server (NAS) devices at a site, where each event included in the connection event data comprises a connection or disconnection event of a connection session provided by a service provider. The NMS detects a number of connection swaps in the connection event data over a time window, where a connection swap includes a change from a first connection session provided by a first service provider to a second connection session provided by a second service provider. Based on the detected number of connection swaps satisfying a threshold, the NMS predicts a root cause of the connection swaps as a WAN issue and generates a notification of the predicted root cause of the connection swaps.

Abstract: A hardware acceleration circuit, a chip, a data processing acceleration method, an accelerator, and a device are provided. The circuit includes: a lookup table circuit, configured to: in response to an ith element in an input data set, output an exponential function value corresponding to a first index value of the ith element based on a first lookup table, and/or output a reciprocal of the exponential function value corresponding to a second index value of the ith element based on a second lookup table; an adder, configured to output an addition operation result of exponential function values corresponding to at least some elements in the input data set; and a multiplier, configured to output a multiplication operation result of a reciprocal of an exponential function value corresponding to the ith element and the addition operation result, to obtain a reciprocal of a specific function value corresponding to the ith element.

Abstract: Systems and methods for a mobile electronic system that gathers and analyzes odors, airborne chemicals and/or compounds. A signature or representation of the odors, airborne chemicals and/or compounds can be generated. Extrinsic data associated with the odors, airborne chemicals and/or compounds or capturing the odors, airborne chemicals and/or compounds can be identified. A model can be generated based on the representation and the extrinsic data. Filters can be generated based on the extrinsic data. The model can be searched for candidate matches, solutions, or other results based on the representation and the filters. Results can be generated based on the search and candidate matches.

Abstract: A III-N-based vertical transistor includes a III-N substrate, a source, a drain, and a channel comprising a III-N crystal material and extending between the source and the drain. The channel includes at least one sidewall surface aligned ±0.3° with respect to an m-plane of the III-N crystal material. The III-N-based vertical transistor also includes a gate electrically coupled to the at least one sidewall surface of the channel.