Patents by Inventor Subir Ghosh
Subir Ghosh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11681501Abstract: A method, computer system, and a computer program product for project development in a collaborative platform is provided. The present invention may include identifying one or more features of an open source project. The present invention may include analyzing the one or more features of the open source project and assigning a sentiment to each of the one or more features. The present invention may include generating a requirement mapping for the open source project, wherein the requirement mapping is a series of the one or more features.Type: GrantFiled: May 11, 2021Date of Patent: June 20, 2023Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Vamsi Vasireddy, Subir Ghosh, Shailendra Moyal, Venkata Vara Prasad Karri, Akash U. Dhoot
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Publication number: 20220365756Abstract: A method, computer system, and a computer program product for project development in a collaborative platform is provided. The present invention may include identifying one or more features of an open source project. The present invention may include analyzing the one or more features of the open source project and assigning a sentiment to each of the one or more features. The present invention may include generating a requirement mapping for the open source project, wherein the requirement mapping is a series of the one or more features.Type: ApplicationFiled: May 11, 2021Publication date: November 17, 2022Inventors: Vamsi Vasireddy, Subir Ghosh, Shailendra Moyal, Venkata Vara Prasad Karri, Akash U. Dhoot
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Patent number: 10733350Abstract: A chip design environment is disclosed which accepts application specific processing, memory and IO elements and declarative specification of function, cost and performance of peripheral, low-level and infrastructural elements and of overall design and generates synthesizable module RTLs and relevant place-and-route constraints. The generated elements include the network interconnecting all the elements, a programming memory consistency model and its coherence protocol, allocation and scheduling processes realizing run-time inference of optimal parallel execution and processes for control of coherence action and prefetch intensity, task-data migration, voltage-frequency scaling and power-clock gating. The environment employs knowledge bases, models to predict performance and to assign confidence scores to predictions and, in turn, the predictions to explore space of topology, architecture, composition, etc options.Type: GrantFiled: April 4, 2019Date of Patent: August 4, 2020Inventors: Sharat C Prasad, Subir Ghosh
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Publication number: 20170193136Abstract: A chip design environment is disclosed which automates component requirements based on processes to provide a synthesized design. The system may simulate the synthesized design performance and may evaluate performance results with a learning controller to correct inefficiencies using predictive modeling based on confidence scores.Type: ApplicationFiled: February 28, 2017Publication date: July 6, 2017Inventors: Sharat C. Prasad, SUBIR GHOSH
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Patent number: 9635373Abstract: A digital video transmission system that operates with three different video rendering paths. A first rendering path operates by receiving display requests and rendering bit-mapped graphics in a local screen buffer. The display information in that local screen buffer is then encoded and transmitted to a remote display system that recreates the content of that local screen buffer in a video buffer of remote display system. A second rendering path operates by receiving encoded video stream requests that can be decoded by the remote display system. Such encoded video streams are sent to the remote display system with minimal addition transport encoding. The third rendering path handles encoded video streams that cannot be handled natively by the remote display system. Such video streams may be either transcoded before transmission or decoded and stored within the local screen buffer.Type: GrantFiled: October 9, 2015Date of Patent: April 25, 2017Assignee: nComputing, Inc.Inventors: Subir Ghosh, Gabriele Sartori
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Publication number: 20160381370Abstract: A digital video transmission system that operates with three different video rendering paths. A first rendering path operates by receiving display requests and rendering bit-mapped graphics in a local screen buffer. The display information in that local screen buffer is then encoded and transmitted to a remote display system that recreates the content of that local screen buffer in a video buffer of remote display system. A second rendering path operates by receiving encoded video stream requests that can be decoded by the remote display system. Such encoded video streams are sent to the remote display system with minimal addition transport encoding. The third rendering path handles encoded video streams that cannot be handled natively by the remote display system. Such video streams may be either transcoded before transmission or decoded and stored within the local screen buffer.Type: ApplicationFiled: October 9, 2015Publication date: December 29, 2016Inventors: Subir Ghosh, Gabriele Sartori
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Patent number: 9449585Abstract: An internal matrix corresponding to a representation of a display screen and having transparency data of a macro block is accessed. Display plane data from either a first or second plane is read if the internal matrix indicates the macro block is non-translucent and from both planes when the internal matrix indicates translucency. A high-level external matrix having high-level external transparency data indicating transparency of pixels is accessed if the internal transparency data indicates the macro block includes a window boundary. Display plane data from either the first or second plane is read if the high-level external transparency data indicates a non-translucent pixel and from both planes when the internal matrix indicates translucency. A detailed external matrix is accessed if the internal transparency data indicates the macro block is translucent or if the high-level external transparency data indicates the pixel is translucent. The first and second planes are blended accordingly.Type: GrantFiled: April 17, 2014Date of Patent: September 20, 2016Assignee: nComputing, Inc.Inventors: Subir Ghosh, Anita Chowdhry
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Patent number: 9411760Abstract: In a system and method for a thin-client terminal system having a local screen buffer using a serial bus, a serial bus interface device receives encoded data from a thin-client server system. The serial bus interface device decodes the encoded data according to a serial bus data format and provides the decoded data to a thin-client control system. The thin-client control system distributes the decoded data for processing to a video processing system, an audio processing system, and an input/output control system. The thin-client control system also receives input data from input devices connected to the thin-client terminal system. The input data is processed and encoded according to the serial bus data format for transmission to the thin-client server system.Type: GrantFiled: October 1, 2010Date of Patent: August 9, 2016Assignee: nComputing Inc.Inventors: Gabriele Sartori, Subir Ghosh, William Liao
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Patent number: 9317891Abstract: Systems and methods for hardware-accelerated key color extraction are disclosed. An update corresponding to a portion of a digital representation of a display screen is received. Key color information for locations within the update is identified. A data structure code associated with the portion of the digital representation of the display screen is determined based on the identification of the key color information. The data structure code is provided to a data structure. During a scan of the frame buffer for display, the frame buffer is capable of being read according to the data structure.Type: GrantFiled: June 7, 2013Date of Patent: April 19, 2016Assignee: nComputing, Inc.Inventors: Anita Chowdhry, Subir Ghosh
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Publication number: 20160080754Abstract: A digital video transmission system that operates with three different video rendering paths. A first rendering path operates by receiving display requests and rendering bit-mapped graphics in a local screen buffer. The display information in that local screen buffer is then encoded and transmitted to a remote display system that recreates the content of that local screen buffer in a video buffer of remote display system. A second rendering path operates by receiving encoded video stream requests that can be decoded by the remote display system. Such encoded video streams are sent to the remote display system with minimal addition transport encoding. The third rendering path handles encoded video streams that cannot be handled natively by the remote display system. Such video streams may be either transcoded before transmission or decoded and stored within the local screen buffer.Type: ApplicationFiled: October 9, 2015Publication date: March 17, 2016Inventors: Subir Ghosh, Gabriele Sartori
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Patent number: 9161063Abstract: A digital video transmission system that operates with three different video rendering paths. A first rendering path operates by receiving display requests and rendering bit-mapped graphics in a local screen buffer. The display information in that local screen buffer is then encoded and transmitted to a remote display system that recreates the content of that local screen buffer in a video buffer of remote display system. A second rendering path operates by receiving encoded video stream requests that can be decoded by the remote display system. Such encoded video streams are sent to the remote display system with minimal addition transport encoding. The third rendering path handles encoded video streams that cannot be handled natively by the remote display system. Such video streams may be either transcoded before transmission or decoded and stored within the local screen buffer.Type: GrantFiled: February 27, 2009Date of Patent: October 13, 2015Assignee: nComputing, Inc.Inventors: Subir Ghosh, Gabriele Sartori
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Patent number: 9142053Abstract: Systems and methods for compositing an image from display planes are disclosed. An internal matrix having transparency data indicating transparency of a macro block of a digital representation of a display is accessed. An external matrix is accessed if the internal matrix indicates the macro block includes a transparent and opaque pixel, wherein the external matrix has transparency data indicating transparency of each pixel in the macro block. A first display plane is read based on the transparency data indicating opaque pixels and the first display plane data is sent to a first buffer. Second display plane data of a second display plane is read and sent to a second buffer if the transparency data indicates transparent pixels. Control data is inserted into the first buffer accordingly such that an image is generated based on at least one of the first and second display plane data and the control data.Type: GrantFiled: November 15, 2013Date of Patent: September 22, 2015Assignee: nComputing, Inc.Inventors: Subir Ghosh, Anita Chowdhry
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Publication number: 20150138237Abstract: An internal matrix corresponding to a representation of a display screen and having transparency data of a macro block is accessed. Display plane data from either a first or second plane is read if the internal matrix indicates the macro block is non-translucent and from both planes when the internal matrix indicates translucency. A high-level external matrix having high-level external transparency data indicating transparency of pixels is accessed if the internal transparency data indicates the macro block includes a window boundary. Display plane data from either the first or second plane is read if the high-level external transparency data indicates a non-translucent pixel and from both planes when the internal matrix indicates translucency. A detailed external matrix is accessed if the internal transparency data indicates the macro block is translucent or if the high-level external transparency data indicates the pixel is translucent. The first and second planes are blended accordingly.Type: ApplicationFiled: April 17, 2014Publication date: May 21, 2015Applicant: nComputing Inc.Inventors: Subir Ghosh, Anita Chowdhry
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Publication number: 20150138229Abstract: Systems and methods for compositing an image from display planes are disclosed. An internal matrix having transparency data indicating transparency of a macro block of a digital representation of a display is accessed. An external matrix is accessed if the internal matrix indicates the macro block includes a transparent and opaque pixel, wherein the external matrix has transparency data indicating transparency of each pixel in the macro block. A first display plane is read based on the transparency data indicating opaque pixels and the first display plane data is sent to a first buffer. Second display plane data of a second display plane is read and sent to a second buffer if the transparency data indicates transparent pixels. Control data is inserted into the first buffer accordingly such that an image is generated based on at least one of the first and second display plane data and the control data.Type: ApplicationFiled: November 15, 2013Publication date: May 21, 2015Applicant: nComputing Inc.Inventors: Subir Ghosh, Anita Chowdhry
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Publication number: 20140362097Abstract: Systems and methods for hardware-accelerated key color extraction are disclosed. An update corresponding to a portion of a digital representation of a display screen is received. Key color information for locations within the update is identified. A data structure code associated with the portion of the digital representation of the display screen is determined based on the identification of the key color information. The data structure code is provided to a data structure. During a scan of the frame buffer for display, the frame buffer is capable of being read according to the data structure.Type: ApplicationFiled: June 7, 2013Publication date: December 11, 2014Applicant: nComputing Inc.Inventors: Anita Chowdhry, Subir Ghosh
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Patent number: 8907987Abstract: The video output system in a computer system reads pixel information from a frame buffer to generate a video output signal. In addition, full-motion video may also be displayed in a window defined in the frame buffer. If the native resolution of the full-motion video is larger than the window defined in said frame buffer then valuable memory space and memory bandwidth is being wasted by writing said larger full-motion video in a memory system (and later reading it back) when some data from the full-motion video will be discarded. Thus, a video pre-processor is disclosed to reduce the size of the full-motion video before that full-motion video is written into a memory system. The video pre-processor will scale the full-motion video down to a size no larger than the window defined in the frame buffer.Type: GrantFiled: October 20, 2010Date of Patent: December 9, 2014Assignee: nComputing Inc.Inventors: Anita Chowdhry, Subir Ghosh
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Patent number: 8896612Abstract: The video output system in a computer system reads pixel information from a frame buffer to generate a video output signal. In addition, a full-motion video may also be displayed. Reading from both the frame buffer and the full-motion video buffer when displaying the full-motion video window wastes valuable memory bandwidth. Thus, the disclosed system provides a system and methods for identifying where the video output system must read from the frame buffer and where it must read from the full-motion video buffer while minimizing the amount of area it reads from both the frame buffer and the full-motion video buffer.Type: GrantFiled: November 16, 2010Date of Patent: November 25, 2014Assignee: nComputing Inc.Inventors: Anita Chowdhry, Subir Ghosh
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Patent number: 8891545Abstract: Thin-client terminal systems allow computer systems to be shared by multiple computer users. With modern technology, the cost of implementing a thin-client terminal system can be very low. To improve thin-client terminal systems, a thin-client terminal system accepts user input data in a first serial interface format and transcodes the user input data into a second serial interface format for transmission to a server.Type: GrantFiled: October 1, 2010Date of Patent: November 18, 2014Assignee: nComputing Inc.Inventors: Gabriele Sartori, Subir Ghosh, Nikolay Kovach
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Patent number: 8800017Abstract: A device and a method of authenticating an electronic device are described. The method may comprise transmitting a token value and a parameter value to the electronic device and selecting a private key within the electronic device using the parameter value. The token value may be processed with a method selected by the parameter value to generate a processed token. The processed token may be compared with an expected processed token and the electronic device may be authenticated if the processed token compares favorably with said expected processed token.Type: GrantFiled: May 29, 2009Date of Patent: August 5, 2014Assignee: nComputing, Inc.Inventors: Subir Ghosh, Gabriele Sartori
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Patent number: 8749566Abstract: A video output system in a computer system reads pixel information from a frame buffer to generate a video output signal. In addition, a full-motion video may also be displayed. Reading from both the frame buffer and the full-motion video buffer when displaying the full-motion video window wastes valuable memory bandwidth. Thus, the disclosed system provides a system and methods for identifying where the video output system must read from the frame buffer and where it must read from the full-motion video buffer while minimizing the amount of area it reads from both the frame buffer and the full-motion video buffer.Type: GrantFiled: November 21, 2011Date of Patent: June 10, 2014Assignee: nComputing Inc.Inventors: Anita Chowdhry, Subir Ghosh