Patents by Inventor Suguru Sasaki

Suguru Sasaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11635405
    Abstract: Provided is a method for measuring a component of a biological sample with a biosensor provided with: a capillary for introducing the biological sample; an electrode part including a first electrode system that includes a first working electrode and a first counter electrode in the capillary; and a reagent part disposed so as to be in contact with the electrode part, the reagent part containing an enzyme and a mediator, and the method including a step of starting voltage application for a duration longer than 0 second and up to 0.7 second to the first electrode system within 0 second to 0.5 second after detection of the introduction of the biological sample to obtain a hematocrit value based on a current value obtained thereby.
    Type: Grant
    Filed: April 1, 2021
    Date of Patent: April 25, 2023
    Assignee: PHC Holdings Corporation
    Inventors: Shouko Hironaka, Eriko Yoshioka, Daiki Mizuoka, Suguru Sasaki
  • Publication number: 20220278381
    Abstract: A structure for battery analysis of the present invention includes a pressurizing unit (30) having a pressurizing mechanism, and a pressure receiving unit (10) for receiving pressure acting on a sample battery (S), and pressurizes the sample battery (S) accommodated in a hollow portion of a battery accommodation unit (20) between the pressurizing unit (30) and the pressure receiving unit (10) to suppress expansion and contraction of the sample battery (S).
    Type: Application
    Filed: March 30, 2020
    Publication date: September 1, 2022
    Applicant: RIGAKU CORPORATION
    Inventors: Koichiro Ito, Suguru Sasaki
  • Patent number: 11176918
    Abstract: Provision of a piezoelectric element which uses a lightweight and flexible electret material and an electrode layer which is also lightweight, has high conductivity and good flexibility to easily receive electrical signals from an electret, and has good durability. Additionally, provision of a musical instrument provided with such a piezoelectric element. A piezoelectric element comprising an electrode layer (B) on at least one surface of an electret material (A) having pores inside, wherein a porosity of the electret material (A) is 20 to 80%, the electrode layer (B) contains 20 to 70 mass % of a carbon fine particle, and a thickness of the electrode layer (B) is 2 to 100 ?m.
    Type: Grant
    Filed: November 29, 2017
    Date of Patent: November 16, 2021
    Assignees: YUPO CORPORATION, YAMAHA CORPORATION
    Inventors: Hiroshi Koike, Yutaro Sugamata, Seiichiro Iida, Kunio Hiyama, Suguru Sasaki, Hidekazu Kodama
  • Publication number: 20210247346
    Abstract: Provided is a method for measuring a component of a biological sample with a biosensor provided with: a capillary for introducing the biological sample; an electrode part including a first electrode system that includes a first working electrode and a first counter electrode in the capillary; and a reagent part disposed so as to be in contact with the electrode part, the reagent part containing an enzyme and a mediator, and the method including a step of starting voltage application for a duration longer than 0 second and up to 0.7 second to the first electrode system within 0 second to 0.5 second after detection of the introduction of the biological sample to obtain a hematocrit value based on a current value obtained thereby.
    Type: Application
    Filed: April 1, 2021
    Publication date: August 12, 2021
    Inventors: Shouko HIRONAKA, Eriko YOSHIOKA, Daiki MIZUOKA, Suguru SASAKI
  • Patent number: 10996186
    Abstract: Provided is a method for measuring a component of a biological sample with a biosensor provided with: a capillary for introducing the biological sample; an electrode part including a first electrode system that includes a first working electrode and a first counter electrode in the capillary; and a reagent part disposed so as to be in contact with the electrode part, the reagent part containing an enzyme and a mediator, and the method including a step of starting voltage application for a duration longer than 0 second and up to 0.7 second to the first electrode system within 0 second to 0.5 second after detection of the introduction of the biological sample to obtain a hematocrit value based on a current value obtained thereby.
    Type: Grant
    Filed: November 22, 2017
    Date of Patent: May 4, 2021
    Assignee: PHC Holdings Corporation
    Inventors: Shouko Hironaka, Eriko Yoshioka, Daiki Mizuoka, Suguru Sasaki
  • Publication number: 20200057016
    Abstract: Provided is a method for measuring a component of a biological sample with a biosensor provided with: a capillary for introducing the biological sample; an electrode part including a first electrode system that includes a first working electrode and a first counter electrode in the capillary; and a reagent part disposed so as to be in contact with the electrode part, the reagent part containing an enzyme and a mediator, and the method including a step of starting voltage application for a duration longer than 0 second and up to 0.7 second to the first electrode system within 0 second to 0.5 second after detection of the introduction of the biological sample to obtain a hematocrit value based on a current value obtained thereby.
    Type: Application
    Filed: November 22, 2017
    Publication date: February 20, 2020
    Inventors: Shouko HIRONAKA, Eriko YOSHIOKA, Daiki MIZUOKA, Suguru SASAKI
  • Publication number: 20190311702
    Abstract: Provision of a piezoelectric element which uses a lightweight and flexible electret material and an electrode layer which is also lightweight, has high conductivity and good flexibility to easily receive electrical signals from an electret, and has good durability. Additionally, provision of a musical instrument provided with such a piezoelectric element. A piezoelectric element comprising an electrode layer (B) on at least one surface of an electret material (A) having pores inside, wherein a porosity of the electret material (A) is 20 to 80%, the electrode layer (B) contains 20 to 70 mass % of a carbon fine particle, and a thickness of the electrode layer (B) is 2 to 100 ?m.
    Type: Application
    Filed: November 29, 2017
    Publication date: October 10, 2019
    Applicants: YUPO CORPORATION, YAMAHA CORPORATION
    Inventors: Hiroshi KOIKE, Yutaro SUGAMATA, Seiichiro IIDA, Kunio HIYAMA, Suguru SASAKI, Hidekazu KODAMA
  • Patent number: 9263777
    Abstract: A semiconductor device generates battery state information including information of a capacity that can be extracted from a battery in the case of discharging from a full charge state until a discharge cutoff voltage at a predetermined discharge rate, based on measurement results of battery voltage, current, and temperature. The device calculates a first estimate value of capacity that can be extracted in the case of discharging the battery from the full charge state until the discharge cutoff voltage and calculates a second estimate value of capacity that can be extracted in the case of discharging the battery until a voltage larger than the discharge cutoff voltage. The device corrects the first estimate value based on a difference between a capacity value extracted from the battery by discharging the battery from the full charge state until the voltage larger than the discharge cutoff voltage and the second estimate value.
    Type: Grant
    Filed: December 11, 2013
    Date of Patent: February 16, 2016
    Assignee: Renesas Electronics Corporation
    Inventors: Youhei Kawahara, Kenta Kobayashi, Suguru Sasaki, Yusuke Sugawara
  • Patent number: 8890561
    Abstract: A semiconductor device includes a base film, a semiconductor chip mounted on the base film, and a plurality of leads formed on the base film, each of the leads including one end coupled to the semiconductor chip and another end being opposite to the one end. The another end of a first one of the leads and the another end of a second one of the leads are located at different positions respectively between the semiconductor chip and a cut line along which the base film is cut.
    Type: Grant
    Filed: February 3, 2012
    Date of Patent: November 18, 2014
    Assignee: Renesas Electronics Corporation
    Inventor: Suguru Sasaki
  • Publication number: 20140177145
    Abstract: A semiconductor device generates battery state information including information of a capacity that can be extracted from a battery in the case of discharging from a full charge state until a discharge cutoff voltage at a predetermined discharge rate, based on measurement results of battery voltage, current, and temperature. The device calculates a first estimate value of capacity that can be extracted in the case of discharging the battery from the full charge state until the discharge cutoff voltage and calculates a second estimate value of capacity that can be extracted in the case of discharging the battery until a voltage larger than the discharge cutoff voltage. The device corrects the first estimate value based on a difference between a capacity value extracted from the battery by discharging the battery from the full charge state until the voltage larger than the discharge cutoff voltage and the second estimate value.
    Type: Application
    Filed: December 11, 2013
    Publication date: June 26, 2014
    Applicant: Renesas Electronics Corporation
    Inventors: Youhei Kawahara, Kenta Kobayashi, Suguru Sasaki, Yusuke Sugawara
  • Patent number: 8310068
    Abstract: A TCP type semiconductor device, which is connected to a plurality of substrate-side electrodes parallel to each other and each having a linear shape, has: a base film; a semiconductor chip mounted on the base film; and a plurality of leads formed on the base film and electrically connecting between the semiconductor chip and the plurality of substrate-side electrodes, respectively. Each of the plurality of leads has an external terminal section extending in a first direction and configured to come in contact with corresponding one of the plurality of substrate-side electrodes. A part of the external terminal section is a wide section that is formed wider than the other section of the external terminal section A position of the wide section in the first direction is different between adjacent leads of the plurality of leads.
    Type: Grant
    Filed: July 7, 2010
    Date of Patent: November 13, 2012
    Assignee: Renesas Electronics Corporation
    Inventor: Suguru Sasaki
  • Publication number: 20120133035
    Abstract: A semiconductor device includes a base film, a semiconductor chip mounted on the base film, and a plurality of leads formed on the base film, each of the leads including one end coupled to the semiconductor chip and another end being opposite to the one end. The another end of a first one of the leads and the another end of a second one of the leads are located at different positions respectively between the semiconductor chip and a cut line along which the base film is cut.
    Type: Application
    Filed: February 3, 2012
    Publication date: May 31, 2012
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventor: Suguru Sasaki
  • Patent number: 8138777
    Abstract: A TCP-type semiconductor device has: a base film; a semiconductor chip mounted on the base film; and a plurality of leads formed on the base film. Each lead has: a first terminal portion including a first end that is one end of the each lead and connected to the semiconductor chip; and a second terminal portion including a second end that is the other end of the each lead and located on the opposite side of the first terminal portion. I a terminal region including the second terminal portion of the each lead, the plurality of leads are parallel to each other along a first direction, the plurality of leads include a first lead and a second lead that are adjacent to each other, and the first lead and the second lead are different in a position of the second end in the first direction.
    Type: Grant
    Filed: October 15, 2009
    Date of Patent: March 20, 2012
    Assignee: Renesas Electronics Corporation
    Inventor: Suguru Sasaki
  • Publication number: 20110049688
    Abstract: A TCP type semiconductor device, which is connected to a plurality of substrate-side electrodes parallel to each other and each having a linear shape, has: a base film; a semiconductor chip mounted on the base film; and a plurality of leads formed on the base film and electrically connecting between the semiconductor chip and the plurality of substrate-side electrodes, respectively. Each of the plurality of leads has an external terminal section extending in a first direction and configured to come in contact with corresponding one of the plurality of substrate-side electrodes. A part of the external terminal section is a wide section that is formed wider than the other section of the external terminal section A position of the wide section in the first direction is different between adjacent leads of the plurality of leads.
    Type: Application
    Filed: July 7, 2010
    Publication date: March 3, 2011
    Applicant: Renesas Electronics Corporation
    Inventor: Suguru Sasaki
  • Publication number: 20110049514
    Abstract: A TCP type semiconductor device includes a base film; a semiconductor chip mounted on the base film; and a plurality of leads formed on the base film and electrically connected with the semiconductor chip. Each of the plurality of leads has an external terminal portion exposed externally. The external terminal portion of the each lead includes: a first portion having a first thickness; and a second portion having a second thickness which is thinner than the first thickness. The first portion and the second portion are arranged to oppose to each other between adjacent two of the plurality of leads.
    Type: Application
    Filed: September 1, 2010
    Publication date: March 3, 2011
    Applicant: Renesas Electronics Corporation
    Inventors: Suguru SASAKI, Kouji Murakami
  • Publication number: 20100224874
    Abstract: A TCP-type semiconductor device has: a base film; a semiconductor chip mounted on the base film; and a plurality of leads formed on the base film and electrically connected to the semiconductor chip. Each of the plurality of leads has a test pad section at a position other than both ends of the each lead.
    Type: Application
    Filed: March 2, 2010
    Publication date: September 9, 2010
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Suguru Sasaki
  • Publication number: 20100109690
    Abstract: A TCP-type semiconductor device has: a base film; a semiconductor chip mounted on the base film; and a plurality of leads formed on the base film. Each lead has: a first terminal portion including a first end that is one end of the each lead and connected to the semiconductor chip; and a second terminal portion including a second end that is the other end of the each lead and located on the opposite side of the first terminal portion. I a terminal region including the second terminal portion of the each lead, the plurality of leads are parallel to each other along a first direction, the plurality of leads include a first lead and a second lead that are adjacent to each other, and the first lead and the second lead are different in a position of the second end in the first direction.
    Type: Application
    Filed: October 15, 2009
    Publication date: May 6, 2010
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Suguru Sasaki
  • Patent number: 7459243
    Abstract: A mask pattern correcting method is comprised of a before-correction pattern edge defining step for defining an edge of a mask pattern, a deviated position setting step for setting a close point and a isolated point based on the deviation between the pattern edges of the mask pattern and the design pattern, an edge selecting step for correcting an edge located within specified distance from the isolated point, and selecting a mask pattern edge that will have smaller variation of the close point light intensity and larger variation of isolated point light intensity by the correction, a correcting step for correcting an edge to be corrected such that the isolated point light intensity after correction satisfies a criterion for correction, an after-correction pattern edge defining step for defining a pattern edge of the corrected mask pattern, and an end determining step for ending correction when the deviation between the defined after-correction pattern edge and the edge of the design pattern is within a speci
    Type: Grant
    Filed: September 16, 2004
    Date of Patent: December 2, 2008
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Suguru Sasaki
  • Patent number: 7345498
    Abstract: A method for a burn-in test includes steps (a) and (b). In the step (a), an operation test of a first semiconductor device is executed through first probes provided on a probe card. In the step (b), a stress is applied to a second semiconductor device through second probes provided on the probe card while the operation test is executed.
    Type: Grant
    Filed: September 28, 2005
    Date of Patent: March 18, 2008
    Assignee: NEC Electronics Corporation
    Inventor: Suguru Sasaki
  • Patent number: D750783
    Type: Grant
    Filed: July 16, 2014
    Date of Patent: March 1, 2016
    Assignee: RIGAKU CORPORATION
    Inventors: Shoichi Yasukawa, Suguru Sasaki