Abstract: Provided are methods for fabricating semiconductor devices incorporating a fin-FET structure that provides body-bias control, exhibits some characteristic advantages associated with SOI structures, provides increased operating current and/or reduced contact resistance. The methods for fabricating semiconductor devices include forming insulating spacers on the sidewalls of a protruding portion of a first insulation film; forming a second trench by removing exposed regions of the semiconductor substrate using the insulating spacers as an etch mask, and thus forming fins in contact with and supported by the first insulation film. After forming the fins, a third insulation film is formed to fill the second trench and support the fins. A portion of the first insulation film is then removed to open a space between the fins in which additional structures including gate dielectrics, gate electrodes and additional contact, insulating and storage node structures may be formed.

Abstract: In a ferroelectric structure after a first lower electrode film is formed using a first metal nitride, a second lower electrode film is formed on the first lower electrode film using a first metal, a second metal oxide and/or a first alloy. After a ferroelectric layer is formed on the second lower electrode film, a first upper electrode film is formed on the ferroelectric layer using a second alloy. Related devices are also disclosed.

Abstract: A reflection device that may include a substrate and a multi-reflection layer formed on the substrate. The multi-reflection layer may be formed of a material capable of reflecting EUV rays. The multi-reflection layer may be formed by stacking a plurality of layer groups, each including a first material layer, a surface-treated layer obtained by surface-treating the first material layer, and a second material layer formed on the surface-treated layer. A method of fabricating the reflection device that may include preparing a substrate and forming a multi-reflection layer on the substrate from a material capable of reflecting EUV rays. The forming of the multi-reflection layer may be performed by repeatedly forming a layer group. The forming of the layer group may include forming a first material layer, surface-treating the first material layer, and forming a second material layer on the surface-treated first material layer.

Abstract: A non-volatile memory device with improved integration and/or improved performance by reducing an area per bit and controlling a body bias, and a method of fabricating the same. The non-volatile memory device may use surface portions of the outer side surfaces and/or the upper surfaces of at least one pair of fins protruding from a body and extending, spaced from each other along one direction, as at least one pair of channel regions. At least one control gate electrode may be formed across the channel regions, and at least one pair of storage nodes may be interposed in at least one portion between the control gate electrode and the channel regions.

Abstract: A semiconductor device may include at least one pair of fins on a semiconductor substrate. A channel region may be formed in each fin. The semiconductor device may further include a gate electrode corresponding to each pair of channel regions, a source contact plug electrically connected to each of at least one source formed on a respective fin concurrently, and a drain contact plug electrically connected to each of at least one drain formed on a respective fin concurrently.

Abstract: Provided is a method for manufacturing a material layer capable of increasing the deposition rate of a noble metal layer on a ferroelectric layer, a method for manufacturing a ferroelectric capacitor using the same, a ferroelectric capacitor manufactured by the same method, and a semiconductor memory device having the ferroelectric capacitor and a manufacturing method thereof. According to a method for manufacturing the material layer, a ferroelectric layer is formed. The ferroelectric layer may be exposed to seed plasma, and a material layer including a source material of the seed plasma may be formed on a region of the ferroelectric layer exposed to the seed plasma.

Abstract: Provided are methods of forming a more highly-oriented silicon thin layer having a larger grain size, and a substrate having the same. The methods may include forming an aluminum (Al) layer on a base substrate, forming a more highly-oriented Al layer by recrystallizing the Al layer under vacuum, forming a more highly-oriented ?-Al2O3 layer on the more highly-oriented Al layer and/or epitaxially growing a silicon layer on the more highly-oriented ?-Al2O3 layer. The method may be used to manufacture a semiconductor device having higher carrier mobility.

Abstract: An off-axis projection optical system including first and second mirrors that are off-axially arranged is provided. The tangential and sagittal radii of curvature of the first mirror may be R1t and R1s, respectively. The tangential and sagittal radii of curvature of the second mirror may be R2t and R2s, respectively. The incident angle of the beam from an object point to the first mirror 10 may be i1, and an incident angle of the beam reflected from the first mirror 10 to the second mirror 30 is i2. The values of R1t, R1s, R2t, R2s, i1 and i2 may satisfy the following Equation.

Abstract: A reflection mask for extreme ultraviolet (EUV) photolithography and a method of fabricating the same, in which the reflection mask includes a substrate, a lower reflection layer formed in a multi-layer structure on the substrate and including a material reflecting EUV light, an upper reflection layer formed in a multi-layer structure on the lower reflection layer and reflecting EUV light, and a phase reversing layer formed between the lower reflection layer and the upper reflection layer in a certain pattern and causing destructive interference between reflection light from the upper reflection layer and reflection light from the lower reflection layer. An incidence of a shadow effect can be reduced and unnecessary EUV light can be eliminated, so that a pattern on the reflection mask can be projected precisely on a silicon wafer. Since the phase reversing layer includes the same material as the reflection layer and an absorption layer, mask fabrication processes can be handled easily.

Abstract: A photomask and method thereof. In an example method, a photomask may be manufactured by forming an oxide layer on a surface, patterning the oxide layer to form an oxide pattern, the oxide pattern including a plurality of oxide pattern bodies and a plurality of oxide windows, filling the plurality of oxide windows with an absorbent to form an absorbent pattern and reducing the plurality of oxide pattern bodies. An example photomask may include an oxide pattern-based absorbent pattern including a plurality of absorbent pattern bodies and a plurality of absorbent pattern windows.

Abstract: Off-axis projection optics that includes first and second mirrors positioned off-axis and sharing a confocal point that are arranged to reduce linear astigmatism. If a distance between an object plane and the first mirror is l1, an incident angle of light coming from the object plane to the first mirror is i1, a distance between the first mirror and the confocal point is l1?, a distance between the confocal point and the second mirror is l2, an incident angle of light coming from the first mirror to the second mirror is i2, and a distance between the second mirror and an image plane is l2?, the off-axis projection optics may satisfy the following equation: l 1 ? + l 1 l 1 ? tan ? ? ? i 1 = l 2 ? + l 2 l 2 ? tan ? ? ? i 2 .

Abstract: A photomask may include a reflection layer including a material capable of reflecting electromagnetic radiation, and at least one ion region. The ion region may be formed by implanting ions of an absorbent capable of absorbing electromagnetic radiation. The reflection layer may have a stack structure including a plurality of layers. The ions of the dopant may be implanted into at least one of the plurality of layers.

Abstract: A mask for lithography and a method of manufacturing the same. The mask may include a substrate, a reflection layer formed of a material capable of reflecting electromagnetic rays on the substrate and an absorption pattern formed in a desired pattern such that absorbing regions with respect to electromagnetic rays and windows through which electromagnetic rays pass are formed, wherein the absorption pattern includes at least one side surface that is adjacent to the window and is inclined with respect to the reflection layer. The method may include forming a reflection layer which is formed of a material capable of reflecting electromagnetic rays on a substrate, forming an absorption layer which is formed of a material capable of absorbing electromagnetic rays on the refection layer, and patterning the absorption layer to form an absorption pattern with at least one side surface adjacent to a window that has an inclined side surface with respect to the reflection layer.

Abstract: A method of preparing a semiconductor film on a substrate is disclosed. The method includes arranging an insulating substrate in a deposition chamber and depositing a semiconductor film onto the insulating substrate using ion beam deposition, wherein a temperature of the insulating substrate during the depositing does not exceed 250° C. The method can produce a thin film transistor. The disclosed ion beam deposition method forms, at lower temperature and with low impurities, a film morphology with desired smoothness and grain size. Deposition of semiconductor films on low melting point substrates, such as plastic flexible substrates, is enables.

Abstract: Embodiments are provided of a duplex chemical vapor deposition (CVD) system and pulsed processing method using the same. The duplex CVD system may include first and second process chambers, one or more reactive sources, and reactive source suppliers that correspond to the reactive sources, respectively. The reactive source suppliers may include a first conduit portion connected to the respective reactive sources, a second conduit portion having one terminal connected to the first conduit portion and the other terminal connected to the first process chamber, and a third conduit portion having one terminal connected to the first conduit portion and the other terminal connected to the second process chamber.

Abstract: A ferroelectric capacitor comprises a first electrode comprising an alloy containing a first element and a second element of the periodic table of the elements, the first element being selected from the group consisting of Ir and Ru. A ferroelectric layer is disposed on the first electrode, wherein the ferroelectric layer comprises a ferroelectric material containing the second element. A second electrode is disposed on the ferroelectric layer. The ferroelectric capacitor can be provided as part of a memory cell of a ferroelectric memory.

Abstract: A ferroelectric capacitor comprises a first electrode comprising an alloy of Ir and Ru, a ferroelectric layer disposed on the first electrode, and a second electrode disposed on the ferroelectric layer. A ferroelectric memory comprises a substrate and a plurality of memory cells arranged on the substrate. Each memory cell comprises a first electrode comprising an alloy of Ir and Ru, a ferroelectric layer disposed on the first electrode, and a second electrode disposed on the ferroelectric layer.

Abstract: A capacitor of a memory device, and a method of fabricating the same, includes a lower electrode electrically coupled to a doping region of a transistor structure, the lower electrode having a metal electrode and a metal oxide electrode, a ferroelectric layer covering and extending laterally along the lower electrode, and an upper electrode formed on the ferroelectric layer.

Abstract: In a capacitor, a memory device including the capacitor, and a method of manufacturing the capacitor, the capacitor includes a lower electrode comprising a single layer of one selected from the group including a noble metal alloy and an oxide thereof, a dielectric film formed on the lower electrode, and an upper electrode formed on the dielectric film.

Abstract: Disclosed is a method for preparing heteroepitaxial thin films which are free of island structures which have a bad influence on the photoelectric properties and interfacial reactivity of the thin films. These heteroepitaxial thin films are deposited on grooved or curved surfaces of substrates. The use of grooved substrates relieves the coherent elastic strain from the thin films, thereby inhibiting the surface roughening and the island structure formation in the heteroepitaxial thin films. The method can be applied to all of the thin films that show island structures, including GaAs/Si and SiGe/Si typically used in semiconductor devices and various electronic parts, enabling the thin films to be flatly deposited at a significant thickness on various substrates without additionally processing.