Patents by Inventor Suk Suh

Suk Suh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9000139
    Abstract: A composition for preventing or treating cervical cancer comprising a human papillomavirus plasmodium and an immunity enhancer is provided. A fusion protein including a fusion polypeptide recombined to transform a 3D structure of E6 and E7, which are antigens against types 16 and 18 human papillomavirus (HPV), a signal peptide for secreting the fusion polypeptide outside the cells and an immunity enhancer peptide present in an individual is also provided. The fusion protein may be useful in treating HPV-triggered tumors by inducing an immune response specific to the antigens against the HPV types 16 and 18.
    Type: Grant
    Filed: August 13, 2010
    Date of Patent: April 7, 2015
    Assignee: Genexine, Inc.
    Inventors: Young Chul Sung, Sang Hwan Seo, You Suk Suh
  • Publication number: 20150090994
    Abstract: A compound and an organic light emitting diode device, the compound being represented by the following Chemical Formula 1:
    Type: Application
    Filed: October 1, 2014
    Publication date: April 2, 2015
    Applicant: Pusan National University Industry-University Cooperation Foundation
    Inventors: Jae Hong KIM, Myeong-Suk KIM, Soung Wook KIM, Hong Suk SUH, Jun Kuk KIM, Moon Jae LEE
  • Patent number: 8987462
    Abstract: Provided are a compound of Formula 1 and an organic light-emitting device including the compound of Formula 1: The compounds of Formula 1 are particularly useful as fluorescent dopants in the emission layer of the organic light-emitting device.
    Type: Grant
    Filed: September 25, 2013
    Date of Patent: March 24, 2015
    Assignees: Samsung Display Co., Ltd., Pusan National University Industry—University Cooperation Foundation
    Inventors: Soung-Wook Kim, Myeong-Suk Kim, Jae-Hong Kim, Jin-Soo Hwang, Hong-Suk Suh
  • Publication number: 20140367657
    Abstract: A heterocyclic compound, an organic light-emitting device, and a flat panel display apparatus, the compound being represented by Formula 1, below:
    Type: Application
    Filed: January 29, 2014
    Publication date: December 18, 2014
    Applicants: PUSAN NATIONAL UNIVERSITY INDUSTRY-UNIVERSITY COOPERATION FOUNDATION, Samsung Display Co., Ltd.
    Inventors: Jae-Hong KIM, Myeong-Suk KIM, Soung-Wook KIM, Hong-Suk SUH, Jin-Soo HWANG
  • Publication number: 20140326959
    Abstract: Provided are a compound of Formula 1 and an organic light-emitting device including the compound. Descriptions of substituents of the Formula 1 are referred to in the detailed description.
    Type: Application
    Filed: September 5, 2013
    Publication date: November 6, 2014
    Applicants: PUSAN NATIONAL UNIVERSITY INDUSTRY-UNIVERSITY COOPERATION FOUNDATION, SAMSUNG DISPLAY CO., LTD.
    Inventors: Jae-Hong Kim, Myeong-Suk Kim, Soung-Wook Kim, Hong-Suk Suh, Jun-Kuk Kim, Sam-Il Kho
  • Publication number: 20140306197
    Abstract: Provided are a compound of Formula 1 and an organic light-emitting device including the compound of Formula 1: The compounds of Formula 1 are particularly useful as fluorescent dopants in the emission layer of the organic light-emitting device.
    Type: Application
    Filed: September 25, 2013
    Publication date: October 16, 2014
    Inventors: Soung-Wook Kim, Myeong-Suk Kim, Jae-Hong Kim, Jin-Soo Hwang, Hong-Suk Suh
  • Patent number: 8847377
    Abstract: A stacked wafer level package includes a first semiconductor chip having a first bonding pad and a second semiconductor chip having a second bonding pad. Both bonding pads of the semiconductor chips face the same direction. The second semiconductor chip is disposed in parallel to the first semiconductor chip. A third semiconductor chip is disposed over the first and second semiconductor chips acting as a supporting substrate. The third semiconductor chip has a third bonding pad that is exposed between the first and the second semiconductor chips upon attachment. Finally, a redistribution structure is electrically connected to the first, second, and third bonding pads.
    Type: Grant
    Filed: August 8, 2012
    Date of Patent: September 30, 2014
    Assignee: SK Hynix Inc.
    Inventors: Jong Hoon Kim, Min Suk Suh, Seung Taek Yang, Seung Hyun Lee, Tae Min Kang
  • Publication number: 20140137782
    Abstract: A liquid cargo storage tank and a ship including the same are provided. The liquid cargo storage tank according to the present invention comprises: a body installed in a hull of a ship and having a liquid cargo receiving space by forming a space between the body and the hull; and a reinforcing plate installed in the lower part of the body in a state of being spaced apart from the underside of the body to be a floor of the liquid cargo receiving space.
    Type: Application
    Filed: May 22, 2012
    Publication date: May 22, 2014
    Inventors: Tae Min Cho, Bong Jae Kim, Dae Sung Lee, Jae Ho Jung, Yong Suk Suh
  • Patent number: 8698283
    Abstract: A semiconductor package includes a substrate including a substrate body having a first face and a second face opposing the first face. A first through electrode passes through the substrate body between the first face and the second face. An insulation member is disposed over the first face; and a connection member having a first conductive unit disposed inside of the insulation member is electrically connected to the first through electrode, and a second conductive unit electrically connected to the first conductive unit is exposed at side faces of the insulation member. A semiconductor chip having third and fourth faces is disposed over the first face of the substrate body in a vertical direction. A second through electrode passes through the substrate body between the third and fourth faces and is electrically connected to the second conductive unit.
    Type: Grant
    Filed: September 25, 2012
    Date of Patent: April 15, 2014
    Assignee: SK Hynix Inc.
    Inventor: Min Suk Suh
  • Publication number: 20140035475
    Abstract: The present invention relates to a controller of an AC-DC converter, which controls an LED lighting using electricity of AC 100V to 250V which is used in a building or home, and more particularly, to a controller of an AC-DC converter for LED lighting, which is capable of effectively controlling brightness of an LED lighting.
    Type: Application
    Filed: April 2, 2012
    Publication date: February 6, 2014
    Applicant: INDUSTRY-ACADEMIC FOUNDATION, YEUNGNAM UNIVERSITY
    Inventor: Young Suk Suh
  • Patent number: 8524530
    Abstract: A flexible semiconductor package includes a flexible substrate. A data chip is disposed over the flexible substrate. The data chip includes a data storage unit for storing data and first bonding pads that are electrically connected to the data storage unit. A control chip is disposed over the flexible substrate. The control chip includes a data processing unit for processing the data in the data chip and second bonding pads that are electrically connected to the data processing unit. Wirings are formed in order to electrically connect the first bonding pads to the second bonding pads.
    Type: Grant
    Filed: December 12, 2011
    Date of Patent: September 3, 2013
    Assignee: Hynix Semiconductor Inc.
    Inventor: Min Suk Suh
  • Publication number: 20130195905
    Abstract: A composition for preventing or treating cervical cancer comprising a human papillomavirus plasmodium and an immunity enhancer is provided. A fusion protein including a fusion polypeptide recombined to transform a 3D structure of E6 and E7, which are antigens against types 16 and 18 human papillomavirus (HPV), a signal peptide for secreting the fusion polypeptide outside the cells and an immunity enhancer peptide present in an individual is also provided. The fusion protein may be useful in treating HPV-triggered tumors by inducing an immune response specific to the antigens against the HPV types 16 and 18.
    Type: Application
    Filed: August 13, 2010
    Publication date: August 1, 2013
    Applicants: BIOD CO., LTD., GENEXINE CO., LTD.
    Inventors: Young Chul Sung, Sang Hwan Seo, You Suk Suh
  • Patent number: 8423920
    Abstract: A method of forming a photomask includes providing a layout of design patterns, setting an optical proximity correction (OPC) with respect to the layout of design patterns, and forming a layout of correction patterns with respect to the layout of design patterns by using the set OPC. The method also includes collecting verification data about the layout of correction patterns by using a layout of contour patterns based on the layout of correction patterns, and verifying whether the layout of design patterns and the layout of correction patterns are substantially identical to each other by using the verification data.
    Type: Grant
    Filed: June 24, 2011
    Date of Patent: April 16, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Eun-Mi Lee, Chun-Suk Suh, Sung-Woo Lee
  • Patent number: 8401455
    Abstract: Disclosed are a sheet buffer module and a printing system incorporating the buffer module. The buffer module has parallel first and second sheet transport paths that extend in opposite directions across a frame. Sheet buffer paths connect the first sheet transport path to the second sheet transport path. In operation, a stream of sheets is fed by the first sheet transport path from a multi-color printing module to a monochrome printing module. During this process, selected sheets are diverted from the stream into the sheet buffer paths and held. After processing by the monochrome printing module, the stream is fed by the second sheet transport path back to the multi-color printing module for further processing and/or final output. During this process, the sheet buffer paths feed the buffered sheets into the second sheet transport path such that they are inserted at the proper locations back into the stream.
    Type: Grant
    Filed: March 30, 2009
    Date of Patent: March 19, 2013
    Assignee: Xerox Corporation
    Inventor: Eun Suk Suh
  • Patent number: 8394697
    Abstract: A capacitor of a semiconductor memory device, and methods of forming the same, are disclosed. A pad interlayer insulating layer is disposed on a semiconductor substrate of an active region. Landing pads and a central landing pad are disposed in peripheral portions and a central portion of the active region, respectively, to penetrate the pad interlayer insulating layer. The upper surface of the central landing pad has a different area from the upper surfaces of the landing pads. A buried interlayer insulating layer is formed on the pad interlayer insulating layer to cover the landing pads and the central landing pad. Buried plugs are formed on the respective landing pads to penetrate the buried interlayer insulating layer. Lower electrodes are formed on the buried plugs.
    Type: Grant
    Filed: January 20, 2011
    Date of Patent: March 12, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-Seo Hong, Jeong-Sic Jeon, Chun-Suk Suh, Yoo-Sang Hwang
  • Patent number: 8395245
    Abstract: A semiconductor package module includes a circuit board including a board body having a receiving portion and conductive patterns formed on the board body; a semiconductor package received in the receiving portion and having conductive terminals electrically connected to the conductive patterns and an s semiconductor chip electrically connected to the conductive terminals; and a connection member electrically connecting the conductive patterns and the conductive terminals.
    Type: Grant
    Filed: December 11, 2007
    Date of Patent: March 12, 2013
    Assignee: Hynix Semiconductor Inc.
    Inventors: Jong Hoon Kim, Min Suk Suh, Seong Cheol Kim, Seung Taek Yang, Seung Hyun Lee
  • Patent number: 8392854
    Abstract: A method of manufacturing a semiconductor device includes dividing a design pattern layout into a repetitive pattern part and a non-repetitive pattern part, obtaining an optical proximity correction (OPC) bias from an extracted portion, the extracted portion being a partial portion of the repetitive pattern part, applying the OPC bias obtained from the extracted portion equally to the extracted portion and other portions of the repetitive pattern part so as to form a first corrected layout in which corrected layouts of the other portions are the same as that of the extracted portion, and forming a photomask in all portions of the repetitive pattern part according to the first corrected layout.
    Type: Grant
    Filed: April 11, 2011
    Date of Patent: March 5, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-wook Kim, Chun-suk Suh, Seong-woon Choi, Jung-hoon Ser, Moon-gyu Jeong, Seong-bo Shim
  • Patent number: 8361838
    Abstract: A stacked semiconductor package and a method for manufacturing the same are presented which exhibit a reduced electrical resistance and an increased junction force. The semiconductor package includes at least two semiconductor chips stacked upon each other. Each semiconductor chip has a plurality of bonding pads formed on upper surfaces and has via-holes. First wiring lines are located on the upper surfaces of the semiconductor chips, on the surfaces of the via-holes, and respectively connected onto their respective bonding pads. Second wiring lines are located on lower surfaces of the semiconductor chips and on the surfaces of the respective via-holes which connect to their respective first wiring lines. The semiconductor chips are stacked so that the first wiring lines on an upper surface of an upwardly positioned semiconductor chip are respectively joined with corresponding second wiring lines formed on a lower surface of a downwardly positioned semiconductor chip.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: January 29, 2013
    Assignee: Hynix Semiconductor Inc.
    Inventors: Seung Taek Yang, Min Suk Suh, Seung Hyun Lee, Jong Hoon Kim
  • Patent number: 8358016
    Abstract: A semiconductor package having an internal cooling system is presented which includes a semiconductor chip and a through-electrode. The semiconductor chip has a circuit section. The through-electrode passes through an upper surface and a lower surface the semiconductor chip. The through-electrode is electrically connected with the circuit section of the semiconductor chip. The through-electrode also has a through-hole for allowing cooling fluid to flow therethrough.
    Type: Grant
    Filed: March 13, 2012
    Date of Patent: January 22, 2013
    Assignee: Hynix Semiconductor Inc.
    Inventors: Min Suk Suh, Chang Jun Park
  • Publication number: 20120299169
    Abstract: A stacked wafer level package includes a first semiconductor chip having a first bonding pad and a second semiconductor chip having a second bonding pad. Both bonding pads of the semiconductor chips face the same direction. The second semiconductor chip is disposed in parallel to the first semiconductor chip. A third semiconductor chip is disposed over the first and second semiconductor chips acting as a supporting substrate. The third semiconductor chip has a third bonding pad that is exposed between the first and the second semiconductor chips upon attachment. Finally, a redistribution structure is electrically connected to the first, second, and third bonding pads.
    Type: Application
    Filed: August 8, 2012
    Publication date: November 29, 2012
    Applicant: SK HYNIX INC.
    Inventors: Jong Hoon KIM, Min Suk SUH, Seung Taek YANG, Seung Hyun LEE, Tae Min KANG