Patents by Inventor Sumanth Jannyavula Venkata
Sumanth Jannyavula Venkata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10534716Abstract: A hybrid data storage device disclosed herein includes a main data store, one or more data storage caches, and a data storage cache management sub-system. The hybrid data storage device is configured to limit write operations on the one or more data storage caches to less than an endurance value for the data storage cache. In one implementation, the data storage cache management sub-system limits or denies requests for promotion of data from the main data store to the one or more data storage caches. In another implementation, the data storage cache management sub-system limits garbage collection operations on the data storage cache.Type: GrantFiled: July 13, 2016Date of Patent: January 14, 2020Assignee: SEAGATE TECHNOLOGY LLCInventors: Sumanth Jannyavula Venkata, Mark A. Gaertner, Jonathan G. Backman
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Patent number: 10104158Abstract: A data storage system may generally have a controller connected to multiple separate data storage devices in a distributed network. Each data storage device may be configured with a user invisible diagnostic region where diagnostic information is stored in logical block addresses (LBA) beyond a storage capacity of the respective data storage devices and the diagnostic information can be accessible via read and write requests to LBA beyond the storage capacity of the respective data storage devices.Type: GrantFiled: July 17, 2013Date of Patent: October 16, 2018Assignee: Seagate Technology LLCInventors: Thomas R. Prohofsky, Sumanth Jannyavula Venkata
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Patent number: 9880926Abstract: A circuit may be configured to store data to a reserved zone of a non-volatile solid state memory (NVSSM) in a log structured manner and to use information stored in the reserved zone to restore data as needed. In some embodiments, a reserved area of a NVSSM may include die from one or more non-volatile memory modules, which can be divided into blocks and the blocks can be combined to form frames. In some examples, the frames may contain frame headers that can contain a unique identifier which can indicate which frame is to be used to restore data structures, such as during power up or for other restore events.Type: GrantFiled: August 20, 2013Date of Patent: January 30, 2018Assignee: Seagate Technology LLCInventor: Sumanth Jannyavula Venkata
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Publication number: 20180018269Abstract: A hybrid data storage device disclosed herein includes a main data store, one or more data storage caches, and a data storage cache management sub-system. The hybrid data storage device is configured to limit write operations on the one or more data storage caches to less than an endurance value for the data storage cache. In one implementation, the data storage cache management sub-system limits or denies requests for promotion of data from the main data store to the one or more data storage caches. In another implementation, the data storage cache management sub-system limits garbage collection operations on the data storage cache.Type: ApplicationFiled: July 13, 2016Publication date: January 18, 2018Inventors: Sumanth Jannyavula Venkata, Mark A. Gaertner, Jonathan G. Backman
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Patent number: 9842060Abstract: A hybrid data storage device disclosed herein includes a main data store, one or more data storage caches, and a data storage cache management sub-system. The data storage cache may be divided into an over-provisioned portion and an advertised space portion. Clusters of data on the data storage cache corresponding to the over-provisioned portion are marked as pending eviction rather than actually evicted when the data storage cache management sub-system receives a write request, thereby increasing the effective capacity and reducing write amplification of the data storage cache.Type: GrantFiled: July 13, 2016Date of Patent: December 12, 2017Assignee: SEAGATE TECHNOLOGY LLCInventors: Sumanth Jannyavula Venkata, Mark A. Gaertner, Jonathan G. Backman
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Patent number: 9785564Abstract: A hybrid memory system includes a primary memory comprising a host memory space arranged as memory sectors corresponding to host logical block addresses (host LBAs). A secondary memory is implemented as a cache for the primary host memory. A hybrid controller is configured directly map the clusters of host LBAs to clusters of secondary memory. The secondary memory clusters correspond to a memory space of the cache. Mapping of the host LBA secondary memory clusters is fully associative such that any host LBA cluster can be mapped to any secondary memory cluster.Type: GrantFiled: August 20, 2013Date of Patent: October 10, 2017Assignee: SEAGATE TECHNOLOGY LLCInventor: Sumanth Jannyavula Venkata
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Patent number: 9772948Abstract: A new segment of data is copied to a volatile, primary cache based on a host data read access request. The primary cache mirrors a first portion of a non-volatile main storage criterion is determined for movement of data from the primary cache to a non-volatile, secondary cache that mirrors a second portion of the main storage. The criterion gives higher priority to segments having addresses not yet selected for reading by the host. In response to the new segment of data being copied to the primary cache, a selected segment of data is copied from the primary cache to the secondary cache in response to the selected segment satisfying the criterion.Type: GrantFiled: July 6, 2012Date of Patent: September 26, 2017Assignee: SEAGATE TECHNOLOGY LLCInventors: James David Sawin, Luke W. Friendshuh, Sumanth Jannyavula Venkata, Ryan James Goss, Mark Allen Gaertner
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Patent number: 9594685Abstract: Host read operations affecting a first logical block address of a data storage device are tracked. The data storage device includes a main storage and a non-volatile cache that mirrors a portion of data of the main storage. One or more criteria associated with the host read operations are determined. The criteria are indicative of future read requests of second logical block address associated with the first logical block address. Data of the at least the second logical block address is copied from the main storage to the non-volatile cache if the criteria meets a threshold.Type: GrantFiled: July 6, 2012Date of Patent: March 14, 2017Assignee: SEAGATE TECHNOLOGY LLCInventors: James David Sawin, Luke W. Friendshuh, Sumanth Jannyavula Venkata, Ryan James Goss, Mark Allen Gaertner
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Patent number: 9569176Abstract: Apparatus and method for generating random numbers. In accordance with some embodiments, a first multi-bit string of entropy values is derived from a first entropy source having a first trust level and a different, second multi-bit string of entropy values is derived from a second entropy source having a different, second trust level. The first and second multi-bit strings of entropy values are combined in relation to the associated first and second trust levels to generate a multi-bit random number. The multi-bit random number is used as an input to a cryptographic function.Type: GrantFiled: October 30, 2014Date of Patent: February 14, 2017Assignee: Seagate Technology LLCInventors: Sumanth Jannyavula Venkata, Manuel A. Offenberg, William Erik Anderson
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Patent number: 9529724Abstract: Approaches for implementing a controller for a hybrid memory that includes a main memory and a cache for the main memory are discussed. The controller comprises a hierarchy of abstraction layers, wherein each abstraction layer is configured to provide at least one component of a cache management structure. Each pair of abstraction layers utilizes processors communicating through an application programming interface (API). The controller is configured to receive incoming memory access requests from a host processor and to manage outgoing memory access requests routed to the cache using the plurality of abstraction layers.Type: GrantFiled: July 6, 2012Date of Patent: December 27, 2016Assignee: SEAGATE TECHNOLOGY LLCInventors: Sumanth Jannyavula Venkata, James David Sawin, Yunaldi Yulizar, Ryan James Goss
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Patent number: 9507719Abstract: A hybrid memory system includes a primary memory and a secondary memory. A garbage collection operation is performed on the hybrid memory system. A read operation comprising reading data from a first cluster of a plurality of clusters is performed. Responsive to a determination that the read operation failed, the first cluster is unmapped without writing the data to a second cluster and the first cluster continues to be used for subsequent data storage. Responsive to a determination that the read operation did not fail, data is written to the second cluster.Type: GrantFiled: August 20, 2013Date of Patent: November 29, 2016Assignee: SEAGATE TECHNOLOGY LLCInventor: Sumanth Jannyavula Venkata
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Patent number: 9489542Abstract: Apparatus and method for data security in a multi-device data storage enclosure. In some embodiments, the storage enclosure has a housing with opposing first and second ends. A plurality of active elements are disposed within the housing including an array of data storage devices, a control board, and an interconnection arrangement which mechanically and electrically interconnects the plurality of storage devices with the control board. A control circuit encrypts user data stored on a selected data storage device using a cryptographic encryption function and an associated cryptographic key. The key is partitioned into a plurality of portions, with each portion stored in a different one of the active elements.Type: GrantFiled: November 12, 2014Date of Patent: November 8, 2016Assignee: Seagate Technology LLCInventors: Mike Miller, Manuel A. Offenberg, Sumanth Jannyavula Venkata
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Patent number: 9477591Abstract: Incoming memory access requests are routed in a set of incoming queues, the incoming memory access requests comprise a range of host logical block addresses (LBAs) that correspond to a memory space of a primary memory. The host LBA range is mapped to clusters of secondary memory LBAs, the secondary memory LBAs corresponding to a memory space of a secondary memory. Each incoming memory access request queued in the set of incoming queues is transformed into one or more outgoing memory access requests that include a range of secondary memory LBAs or one or more clusters of secondary memory LBAs. The outgoing memory access requests are routed in a set of outgoing queues. The secondary memory is accessed using the outgoing memory access requests.Type: GrantFiled: July 6, 2012Date of Patent: October 25, 2016Assignee: SEAGATE TECHNOLOGY LLCInventors: Sumanth Jannyavula Venkata, James David Sawin
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Patent number: 9390020Abstract: A hybrid memory system includes a primary memory comprising a host memory space arranged as memory sectors corresponding to host logical block addresses (host LBAs). A secondary memory is implemented as a cache for the primary host memory. A hybrid controller is configured map the clusters of host LBAs to clusters of solid state drive (SSD) LBAs. The SSD LBAs correspond to a memory space of the cache. Mapping of the host LBA clusters to the SSD LBA clusters is fully associative such that any host LBA cluster can be mapped to any SSD LBA cluster.Type: GrantFiled: July 6, 2012Date of Patent: July 12, 2016Assignee: SEAGATE TECHNOLOGY LLCInventor: Sumanth Jannyavula Venkata
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Patent number: 9367247Abstract: Incoming memory access requests are routed in a set of incoming queues, the incoming memory access requests comprise a range of host logical block addresses (LBAs) that correspond to a memory space of a primary memory. The host LBA range is directly mapped to clusters of secondary memory, the secondary memory corresponding to a memory space of a secondary memory. Each incoming memory access request queued in the set of incoming queues is transformed into one or more outgoing memory access requests that include a range of secondary memory clusters or one or more clusters of secondary memory clusters. The outgoing memory access requests are routed in a set of outgoing queues. The secondary memory is accessed using the outgoing memory access requests.Type: GrantFiled: August 20, 2013Date of Patent: June 14, 2016Assignee: SEAGATE TECHNOLOGY LLCInventor: Sumanth Jannyavula Venkata
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Publication number: 20160132699Abstract: Apparatus and method for data security in a multi-device data storage enclosure. In some embodiments, the storage enclosure has a housing with opposing first and second ends. A plurality of active elements are disposed within the housing including an array of data storage devices, a control board, and an interconnection arrangement which mechanically and electrically interconnects the plurality of storage devices with the control board. A control circuit encrypts user data stored on a selected data storage device using a cryptographic encryption function and an associated cryptographic key. The key is partitioned into a plurality of portions, with each portion stored in a different one of the active elements.Type: ApplicationFiled: November 12, 2014Publication date: May 12, 2016Inventors: Mike Miller, Manuel A. Offenberg, Sumanth Jannyavula Venkata
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Publication number: 20160124716Abstract: Apparatus and method for generating random numbers. In accordance with some embodiments, a first multi-bit string of entropy values is derived from a first entropy source having a first trust level and a different, second multi-bit string of entropy values is derived from a second entropy source having a different, second trust level. The first and second multi-bit strings of entropy values are combined in relation to the associated first and second trust levels to generate a multi-bit random number. The multi-bit random number is used as an input to a cryptographic function.Type: ApplicationFiled: October 30, 2014Publication date: May 5, 2016Inventors: Sumanth Jannyavula Venkata, Manuel A. Offenberg, Williaim Erik Anderson
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Patent number: 9229814Abstract: A storage device is described that detects a data error and then notifies a distributed file system, for example, of such error. A data recovery can then be initiated in many ways, one way by the storage device.Type: GrantFiled: March 15, 2013Date of Patent: January 5, 2016Assignee: Seagate Technology LLCInventor: Sumanth Jannyavula Venkata
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Patent number: 9116619Abstract: Displaying storage device status conditions using multi-color light emitting diodes (LEDs) involves monitoring values of a status condition of at least one persistent storage device. The values are mapped to two or more colors, and at least one multi-color LED displays the two or more colors in response to the respective values.Type: GrantFiled: May 10, 2013Date of Patent: August 25, 2015Assignee: SEAGATE TECHNOLOGY LLCInventors: Charles W. Thiesfeld, Michael H. Miller, Richard Esten Bohn, Sumanth Jannyavula Venkata
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Patent number: 9104578Abstract: A host read request affects a request address range of a main storage. A speculative address range proximate to the request address range is defined. Speculative data stored in the speculative address range is not requested via the host read request. A criterion is determined that is indicative of future read requests of associated with the speculative data. The speculative data is copied from the main storage to at least one of a non-volatile cache and a volatile cache together with data of the host read request in response to the criterion meeting a threshold. The non-volatile cache and the volatile cache mirror respective portions of the main storage.Type: GrantFiled: July 6, 2012Date of Patent: August 11, 2015Assignee: SEAGATE TECHNOLOGY LLCInventors: James David Sawin, Luke William Friendshuh, Sumanth Jannyavula Venkata, Ryan James Goss, Mark Allen Gaertner