Abstract: A first page in a memory unit is programmed with one or more pages of the secondary memory. A first time corresponding to the start of the programming of the first page is recorded. A second time corresponding to the completion of the programming of the one or more pages is recorded. A time difference between the first time and the second time is determined. It is determined if the time difference is greater than a threshold. In response to the time difference being greater than the threshold, a retention based defecting process is for the memory unit is disabled.

Abstract: Incoming memory access requests are routed in a set of incoming queues, the incoming memory access requests comprise a range of host logical block addresses (LBAs) that correspond to a memory space of a primary memory. The host LBA range is directly mapped to clusters of secondary memory, the secondary memory corresponding to a memory space of a secondary memory. Each incoming memory access request queued in the set of incoming queues is transformed into one or more outgoing memory access requests that include a range of secondary memory clusters or one or more clusters of secondary memory clusters. The outgoing memory access requests are routed in a set of outgoing queues. The secondary memory is accessed using the outgoing memory access requests.

Abstract: A hybrid memory system includes a primary memory and a secondary memory. A garbage collection operation is performed on the hybrid memory system. A read operation comprising reading data from a first cluster of a plurality of clusters is performed. Responsive to a determination that the read operation failed, the first cluster is unmapped without writing the data to a second cluster and the first cluster continues to be used for subsequent data storage. Responsive to a determination that the read operation did not fail, data is written to the second cluster.

Abstract: A first page in a memory unit is programmed with one or more pages of the secondary memory. A first time corresponding to the start of the programming of the first page is recorded. A second time corresponding to the completion of the programming of the one or more pages is recorded. A time difference between the first time and the second time is determined. It is determined if the time difference is greater than a threshold. In response to the time difference being greater than the threshold, a retention based defecting process is for the memory unit is disabled.

Abstract: A hybrid memory system includes a primary memory comprising a host memory space arranged as memory sectors corresponding to host logical block addresses (host LBAs). A secondary memory is implemented as a cache for the primary host memory. A hybrid controller is configured directly map the clusters of host LBAs to clusters of secondary memory. The secondary memory clusters correspond to a memory space of the cache. Mapping of the host LBA secondary memory clusters is fully associative such that any host LBA cluster can be mapped to any secondary memory cluster.

Abstract: A data storage system may generally have a controller connected to multiple separate data storage devices in a distributed network. Each data storage device may be configured with a user invisible diagnostic region where diagnostic information is stored in logical block addresses (LBA) beyond a storage capacity of the respective data storage devices and the diagnostic information can be accessible via read and write requests to LBA beyond the storage capacity of the respective data storage devices.

Abstract: Displaying storage device status conditions using multi-color light emitting diodes (LEDs) involves monitoring values of a status condition of at least one persistent storage device. The values are mapped to two or more colors, and at least one multi-color LED displays the two or more colors in response to the respective values.

Abstract: A storage device is described that detects a data error and then notifies a distributed file system, for example, of such error. A data recovery can then be initiated in many ways, one way by the storage device.

Abstract: Approaches for implementing a controller for a hybrid memory that includes a main memory and a cache for the main memory are discussed. The controller comprises a hierarchy of abstraction layers, wherein each abstraction layer is configured to provide at least one component of a cache management structure. Each pair of abstraction layers utilizes processors communicating through an application programming interface (API). The controller is configured to receive incoming memory access requests from a host processor and to manage outgoing memory access requests routed to the cache using the plurality of abstraction layers.

Abstract: Incoming memory access requests are routed in a set of incoming queues, the incoming memory access requests comprise a range of host logical block addresses (LBAs) that correspond to a memory space of a primary memory. The host LBA range is mapped to clusters of secondary memory LBAs, the secondary memory LBAs corresponding to a memory space of a secondary memory. Each incoming memory access request queued in the set of incoming queues is transformed into one or more outgoing memory access requests that include a range of secondary memory LBAs or one or more clusters of secondary memory LBAs. The outgoing memory access requests are routed in a set of outgoing queues. The secondary memory is accessed using the outgoing memory access requests.

Abstract: A new segment of data is copied to a volatile, primary cache based on a host data read access request. The primary cache mirrors a first portion of a non-volatile main storage criterion is determined for movement of data from the primary cache to a non-volatile, secondary cache that mirrors a second portion of the main storage. The criterion gives higher priority to segments having addresses not yet selected for reading by the host. In response to the new segment of data being copied to the primary cache, a selected segment of data is copied from the primary cache to the secondary cache in response to the selected segment satisfying the criterion.

Abstract: Host read operations affecting a first logical block address of a data storage device are tracked. The data storage device includes a main storage and a non-volatile cache that mirrors a portion of data of the main storage. One or more criteria associated with the host read operations are determined. The criteria are indicative of future read requests of second logical block address associated with the first logical block address. Data of the at least the second logical block address is copied from the main storage to the non-volatile cache if the criteria meets a threshold.

Abstract: A hybrid memory system includes a primary memory comprising a host memory space arranged as memory sectors corresponding to host logical block addresses (host LBAs). A secondary memory is implemented as a cache for the primary host memory. A hybrid controller is configured map the clusters of host LBAs to clusters of solid state drive (SSD) LBAs. The SSD LBAs correspond to a memory space of the cache. Mapping of the host LBA clusters to the SSD LBA clusters is fully associative such that any host LBA cluster can be mapped to any SSD LBA cluster.