Patents by Inventor Sumeet Kochar
Sumeet Kochar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20110066903Abstract: A method for self-contained testing within a DRAM comprises the DRAM receiving an instruction from an external processor to test a memory core on the DRAM, and the DRAM self-testing the memory core with one or more BIST pattern stored in a multipurpose register on the DRAM. Optionally, the step of self-testing may include writing the BIST pattern into all locations of the memory core, reading each location of the memory core, and comparing the content read from each location of the memory core with the BIST pattern, wherein a negative comparison indicates a failure has occurred. In a further option, the method may further comprise, after testing the DRAM, initializing the DRAM with an INIT pattern stored in the multipurpose register on the DRAM.Type: ApplicationFiled: September 15, 2009Publication date: March 17, 2011Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Jim Foster, SR., Sumeet Kochar, Suzanne M. Michelich, Jacques B. Taylor
-
Publication number: 20110035611Abstract: One embodiment provides a method of managing power in a computer system. A device of the computer system is operated at a selected power-state. The power consumption of the computer system is monitored. If the power consumption of the computer system is approaching or has exceeded a power cap selected for the computer system, then a request to reduce the power-state for the device is generated in response. The operating system is used to service the request to reduce the power-state according to the priority of the request. The reduced power state is forced out-of-band following the request to reduce the power-state if the request is not immediately serviceable by the operating system. Different approaches can be taken to force the reduced power state, using, for example, system management mode or a platform environment control interface.Type: ApplicationFiled: August 7, 2009Publication date: February 10, 2011Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Thomas M. Brey, Ajay Dholakia, Scott N. Dunham, Sumeet Kochar
-
Publication number: 20110010584Abstract: Detection of a reset failure in a multinode data processing system is provided by a diagnostic circuit in each of a plurality of the server nodes of the system. Each diagnostic circuit is coupled to a code fetch chain of its corresponding node. At reset, prior to a node processor retrieving startup code from the code fetch chain, the diagnostic circuit provides diagnostic signals to the code fetch chain. A problem in the code fetch chain is detected from a response to the diagnostic signals. When a problem is detected, a node failure status for the problem node may be signaled to the other nodes. The multinode system may be configured in response to signaled node failure status, such as by dropping failed nodes and replacing a failed primary node with a secondary node if necessary.Type: ApplicationFiled: July 7, 2009Publication date: January 13, 2011Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Sumeet Kochar, Barry A. Kritt, William B. Schwartz, Jeffrey B. Williams
-
Publication number: 20100235484Abstract: Remotely administering a server, the server including non-volatile memory upon which is disposed one or more digital images representing the server, the server also including one or more components each of which includes non-volatile memory in which is disposed one or more digital images representing the component, where the server is connected for data communications to a management module, and remotely administering the server includes: retrieving, by the management module from the server, the digital images representing the server and the digital images representing the installed components; generating, by the management module with the digital images representing the server and the digital images representing the installed components, a graphical representation of the server with the installed components; and presenting, by the management module to a user through a GUI, the graphical representation of the server with the installed components.Type: ApplicationFiled: March 12, 2009Publication date: September 16, 2010Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Joseph E. Bolan, James R. Goffena, Sumeet Kochar, Adam L. Soderlund
-
Patent number: 7792597Abstract: In one embodiment, a control system supports an unlimited number of feedback control loops all sharing control of a component. A component performance rate or “speed” is used as a common metric for negotiating control of the component. Each control loop continuously monitors a system parameter it is tasked with regulating, compares it to a setpoint for that system parameter, and “requests” a speed in relation to the deviation of the associated system parameter from the corresponding setpoint. A controller receives the requested speeds as dynamic inputs and selects one of the requested speeds according to predefined selection logic. The controller communicates the selected speed to an actuator, which causes the component to operate at the selected speed. In this manner, the control system in effect negotiates control of the component in a way that ensures that all of the system parameters are being managed within safe limits.Type: GrantFiled: June 28, 2007Date of Patent: September 7, 2010Assignee: International Business Machines CorporationInventors: Thomas M. Brey, Wesley Michael Felter, Sumeet Kochar, Charles Robert Lefurgy, Malcolm Scott Ware, Christopher Landon Wood
-
Publication number: 20100125731Abstract: Method, apparatus and computer program product are provided for operating a plurality of computer nodes while maintaining trust. A primary computer node and at least one secondary computer node are connected into a cluster, wherein each of the clustered computer nodes includes a trusted platform module (TPM) that is accessible to software and includes security status information about the respective computer node. Each clustered computer node is then merged into a single node with only the TPM of the primary computer node being accessible to software. The TPM of the primary computer node is updated to include the security status information of each TPM in the cluster. Preferably, the step of merging is controlled by power on self test (POST) basic input output system (BIOS) code associated with a boot processor in the primary node.Type: ApplicationFiled: November 14, 2008Publication date: May 20, 2010Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Shiva R. Dasari, Lee H. Wilson, Scott N. Durham, Sumeet Kochar, William B. Schwartz, Kenneth A. Goldman
-
Publication number: 20090327765Abstract: Methods and products for managing power consumption of a computer and computers for which power consumption is managed. The computer includes the computer including a computer processor and embodiments of the present invention include providing, by an in-band power manger to an out-of-band power manager, a proposed performance state (‘p-state’) for the computer processor; determining, by the out-of-band power manager, in dependence upon a power setpoint and currently-measured operating metrics of the computer processor, whether to approve the proposed p-state; and if the out-of-band power manager approves the proposed p-state, setting operating parameters of the computer processor according to the approved p-state.Type: ApplicationFiled: June 25, 2008Publication date: December 31, 2009Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Thomas M. Brey, Wesley M. Felter, Sumeet Kochar, Charles R. Lefurgy, Ryuji Orita, Freeman L. Rawson, III, Malcolm S. Ware
-
Publication number: 20090328022Abstract: Systems, methods and media for updating CRTM code in a computing machine are disclosed. In one embodiment, the CRTM code initially resides in ROM and updated CRTM is stored in a staging area of the ROM. A logical partition of L2 cache may be created to store a heap and a stack and a data store. The data store holds updated CRTM code copied to the L2 cache. When a computing system is started, it first executes CRTM code. The CRTM code checks the staging area of the ROM to determine if there is updated CRTM code. If so, then CRTM code is copied into the L2 cache to be executed from there. The CRTM code loads the updated code into the cache and verifies its signature. The CRTM code then copies the updated code into the cache where the current CRTM code is located.Type: ApplicationFiled: June 26, 2008Publication date: December 31, 2009Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Sean P. Brogan, Sumeet Kochar
-
Publication number: 20090327686Abstract: Updating a BIOS boot block security module in a plurality of compute nodes of a multinode computer including, for each compute node in the multinode computer, upon powering on the compute node: determining whether a new image of security module is available; if a new image of the security module is available, commanding the reset control module of the compute node to block an attempt by the security module to propagate a reset signal on the scalability bus to other compute nodes in the multinode computer; updating to the new image of the security module; upon completion of the update, resetting the compute node including attempting to propagate a reset signal on the scalability bus to other compute nodes in the multinode computer; and blocking the attempt to propagate the reset signal on the salability bus.Type: ApplicationFiled: May 9, 2008Publication date: December 31, 2009Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Sumeet Kochar, Jeffrey B. Williams
-
Publication number: 20090327764Abstract: Methods, computers, and products for managing power consumption of a computer, the computer including a computer processor and managing power consumption of a computer includes: dynamically during operation of the computer, setting, by an in-band power manager in dependence upon performance metrics of the computer processor, a current performance state (‘p-state’) of the computer processor; and providing, by the in-band power manager to an out-of-band power manager, the current p-state of the computer processor.Type: ApplicationFiled: June 25, 2008Publication date: December 31, 2009Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Thomas M. Brey, Wesley M. Felter, Sumeet Kochar, Charles R. Lefurgy, Ryuji Orita, Freeman L. Rawson, III, Malcolm S. Ware
-
Publication number: 20090287900Abstract: This invention generally provides a method for speeding up system boot time, by initializing a subset of memory during the system firmware test/initialization, and allowing the system to boot an operating system with this subset of installed memory. While the system is completing the operating system boot with the subset of installed memory, a remainder of the installed system memory is being initialized/tested. When the initialization the remainder of system memory is completed (and after the OS has booted), the SMI handler is invoked. The SMI handler then simulates a physical memory “Hot Add” event, and reports the event to the OS. This allows much of the memory initialization/test activity to occur in parallel with the firmware initialization/test and operating system startup processes.Type: ApplicationFiled: May 14, 2008Publication date: November 19, 2009Inventors: Joseph Allen Kirscht, Sumeet Kochar, Barry Alan Kritt, William Bradley Schwartz
-
Patent number: 7562175Abstract: A method and system for emulating a hardware Internet Small Computer System Interface (iSCSI) Host Bus Adapter (HBA) without risking an interruption of communication between a computer and a remote secondary storage device is presented. During normal operations, a (hardware emulating) software HBA drives a Network Interface Card (NIC) to afford communication between the computer and the remote secondary storage. If an operating system (OS) anomaly occurs in the computer, the NIC is normally disconnected by the OS. To maintain communication between the computer and the secondary storage device if such an event occurs, a failover network device is called up by the computer's System Management Memory (SMM) Basic Input Output System (BIOS), which allows uninterrupted communication to continue between the computer and remote secondary storage device.Type: GrantFiled: July 25, 2007Date of Patent: July 14, 2009Assignee: International Business Machines CorporationInventors: Scott Neil Dunham, Eric Richard Kern, Sumeet Kochar, John Matthew Landry, Theodore Brian Vojnovich
-
Publication number: 20090150721Abstract: Methods, apparatus, and products are disclosed for utilizing a potentially unreliable memory module for memory mirroring in a computing system, the computing system including at least two memory modules, that includes: retrieving error information from an error log stored in non-volatile memory, the error information describing an occurrence of a correctable memory error on one of the memory modules; determining whether a memory mirroring mode is enabled for the computing system, the memory mirroring mode specifying that memory contents are mirrored on the two memory modules; and utilizing, in dependence upon the error information, the memory module on which the correctable memory error occurred to mirror the memory contents if the memory mirroring mode is enabled.Type: ApplicationFiled: December 10, 2007Publication date: June 11, 2009Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Sumeet Kochar, Barry A. Kritt, William B. Schwartz
-
Publication number: 20090113197Abstract: A computer system that initializes a fraction of the computer system's memory for execution of video during booting of the computer system is provided. The computer system can include a first portion of BIOS code on a ROM device, wherein the first portion includes instructions for initializing the fraction. The computer system further can include a second portion of BIOS code that copies itself to the fraction upon completion of initialization of the fraction, wherein the second portion executes on the fraction and wherein the second portion initializes system memory and initializes a video buffer. The computer system further can include a copy of the second portion located on the ROM device, wherein the copy of the second portion executes until video buffer initialization is completed but before all of the system memory is initialized. Further, the video buffer displays video before all of the computer system's memory is initialized.Type: ApplicationFiled: October 31, 2007Publication date: April 30, 2009Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Sumeet Kochar, William B. Schwartz
-
Patent number: 7509449Abstract: A method and system for emulating a hardware Internet Small Computer System Interface (iSCSI) Host Bus Adapter (HBA) without risking an interruption of communication between a computer and a remote secondary storage device is presented. During normal operations, a (hardware emulating) software iSCSI HBA drives a Network Interface Card (NIC) to afford communication between the computer and the remote secondary storage. If an operating system (OS) anomaly occurs in the computer, the NIC is normally disconnected by the OS. To maintain communication between the computer and the secondary storage device if such an event occurs, a failover network device is called up by the computer's System Management Memory (SMM) Basic Input Output System (BIOS), which allows uninterrupted communication to continue between the computer and remote secondary storage device.Type: GrantFiled: December 7, 2007Date of Patent: March 24, 2009Assignee: International Business Machines CorporationInventors: Scott Neil Dunham, Eric Richard Kern, Sumeet Kochar, John Matthew Landry, Theodore Brian Vojnovich
-
Publication number: 20090006901Abstract: In one embodiment, a control system supports an unlimited number of feedback control loops all sharing control of a component. A component performance rate or “speed” is used as a common metric for negotiating control of the component. Each control loop continuously monitors a system parameter it is tasked with regulating, compares it to a setpoint for that system parameter, and “requests” a speed in relation to the deviation of the associated system parameter from the corresponding setpoint. A controller receives the requested speeds as dynamic inputs and selects one of the requested speeds according to predefined selection logic. The controller communicates the selected speed to an actuator, which causes the component to operate at the selected speed. In this manner, the control system in effect negotiates control of the component in a way that ensures that all of the system parameters are being managed within safe limits.Type: ApplicationFiled: June 28, 2007Publication date: January 1, 2009Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Thomas M. Brey, Wesley Michael Felter, Sumeet Kochar, Charles Robert Lefurgy, Malcolm Scott Ware, Christopher Landon Wood
-
Patent number: 7457976Abstract: A method and system are disclosed to enable and control over-subscription in a blade/chassis system and to provide the capability to recover in the event of the loss of a redundant power supply. An over-subscription policy is determined by a system administrator and is set in the chassis management module. Information regarding the maximum power allocation needed for each blade being powered by the power supply system is identified by the blade and stored in its VPD or otherwise made available to the chassis management module. The management module of the chassis in which the blades and power supplies are located uses this information to manage the subscription of blades and the over-subscription of blades when appropriate. If throttling is required, the system also allows a predetermined blade priority to be used to identify which blades will be reduced in power.Type: GrantFiled: November 22, 2005Date of Patent: November 25, 2008Assignee: International Business Machines CorporationInventors: Joesph E. Bolan, Thomas Brey, Dhruv M. Desai, Nickolas J. Gruendler, James E. Hughes, Edward J. Klodnicki, Sumeet Kochar, Gary R. Shippy
-
Patent number: 7430629Abstract: A method and system for emulating a hardware Internet Small Computer System Interface (iSCSI) Host Bus Adapter (HBA) without risking an interruption of communication between a computer and a remote secondary storage device is presented. During normal operations, a (hardware emulating) software iSCSI HBA drives a Network Interface Card (NIC) to afford communication between the computer and the remote secondary storage. If an operating system (OS) anomaly occurs in the computer, the NIC is normally disconnected by the OS. To maintain communication between the computer and the secondary storage device if such an event occurs, a failover network device is called up by the computer's System Management Memory (SMM) Basic Input Output System (BIOS), which allows uninterrupted communication to continue between the computer and remote secondary storage device.Type: GrantFiled: May 12, 2005Date of Patent: September 30, 2008Assignee: International Business Machines CorporationInventors: Scott Neil Dunham, Eric Richard Kern, Sumeet Kochar, John Matthew Landry, Theodore Brian Vojnovich
-
Publication number: 20080082314Abstract: A method and system for emulating a hardware Internet Small Computer System Interface (iSCSI) Host Bus Adapter (HBA) without risking an interruption of communication between a computer and a remote secondary storage device is presented. During normal operations, a (hardware emulating) software iSCSI HBA drives a Network Interface Card (NIC) to afford communication between the computer and the remote secondary storage. If an operating system (OS) anomaly occurs in the computer, the NIC is normally disconnected by the OS. To maintain communication between the computer and the secondary storage device if such an event occurs, a failover network device is called up by the computer's System Management Memory (SMM) Basic Input Output System (BIOS), which allows uninterrupted communication to continue between the computer and remote secondary storage device.Type: ApplicationFiled: December 7, 2007Publication date: April 3, 2008Inventors: Sumeet Kochar, Scott Dunham, Eric Kern, John Landry, Theodore Vojnovich
-
Publication number: 20080082313Abstract: A method and system for emulating a hardware Internet Small Computer System Interface (iSCSI) Host Bus Adapter (HBA) without risking an interruption of communication between a computer and a remote secondary storage device is presented. During normal operations, a (hardware emulating) software iSCSI HBA drives a Network Interface Card (NIC) to afford communication between the computer and the remote secondary storage. If an operating system (OS) anomaly occurs in the computer, the NIC is normally disconnected by the OS. To maintain communication between the computer and the secondary storage device if such an event occurs, a failover network device is called up by the computer's System Management Memory (SMM) Basic Input Output System (BIOS), which allows uninterrupted communication to continue between the computer and remote secondary storage device.Type: ApplicationFiled: December 7, 2007Publication date: April 3, 2008Inventors: SCOTT DUNHAM, ERIC KERN, SUMEET KOCHAR, JOHN LANDRY, THEODORE VOJNOVICH