Abstract: A process chamber used in the manufacture of a semiconductor device for etching a material layer on a semiconductor wafer includes an electrostatic chuck for holding the semiconductor wafer, and an annular edge ring which surrounds the side of the semiconductor wafer on the electrostatic chuck to prevent the semiconductor wafer from departing from its original position. The annular edge ring has a first side which faces the side of the semiconductor wafer and contacts firmly with the side of the semiconductor wafer.

Abstract: A process chamber used in the manufacture of a semiconductor device for etching a material layer on a semiconductor wafer includes an electrostatic chuck for holding the semiconductor wafer, and an annular edge ring which surrounds the side of the semiconductor wafer on the electrostatic chuck to prevent the semiconductor wafer from departing from its original position. The annular edge ring has a first side which faces the side of the semiconductor wafer and contacts firmly with the side of the semiconductor wafer.

Abstract: A process chamber used in the manufacture of a semiconductor device for etching a material layer on a semiconductor wafer includes an electrostatic chuck for holding the semiconductor wafer, and an annular edge ring which surrounds the side of the semiconductor wafer on the electrostatic chuck to prevent the semiconductor wafer from departing from its original position. The annular edge ring has a first side which faces the side of the semiconductor wafer and contacts firmly with the side of the semiconductor wafer.

Abstract: A process chamber used in the manufacture of a semiconductor device for etching a material layer on a semiconductor wafer includes an electrostatic chuck for holding the semiconductor wafer, and an annular edge ring which surrounds the side of the semiconductor wafer on the electrostatic chuck to prevent the semiconductor wafer from departing from its original position. The annular edge ring has a first side which faces the side of the semiconductor wafer and contacts firmly with the side of the semiconductor wafer.

Abstract: A novel fuse structure for a semiconductor integrated circuit device and the method of manufacturing the semiconductor integrated circuit device is disclosed. The fuse structure is comprised of a first interconnection metal layer formed on a semiconductor substrate; an inter-metal dielectric layer formed on the first interconnection metal layer having a via exposing the first interconnection metal layer; a via plug filling up the via; a metal layer for a fuse and a second interconnection metal layer consecutively deposited on the via plug and the inter-metal dielectric layer; and an opening area exposing the metal layer for a fuse is positioned more than twice the thickness of the second interconnection metal layer from the via. With the present invention, a contact failure which can result from a damage to via plug in a subsequent stripping step can be prevented.

Abstract: A method of fabricating a semiconductor device employing a multi-layer metal interconnect structure that has a copper (Cu) interconnection layer. Low-temperature plasma processing is first performed on the surface of the Cu interconnection layer, an insulation layer is deposited on the plasma-processed Cu interconnection layer, and the resultant structure is thermally treated.

Abstract: A semiconductor device fabricating method and apparatus for filling gaps between patterns by use of high density plasma oxide films, wherein, a first high density plasma oxide film is deposited on a semiconductor substrate that has patterns with a gap formed thereon and then etched to a predetermined depth using fluorine ions. A second high density plasma oxide film is deposited on the resultant structure, thereby filling the gap between the patterns.

Abstract: A method for manufacturing a collimator comprising the steps of patterning a plurality of thin metal strips into a plurality of basic plates, and forming grooves or ridges on front and back surfaces of each basic plates. Thereafter, the thin strips are folded, mated, and welded together to form pillar cells within the collimator.