Abstract: A virtual reality apparatus, a feedback apparatus, and a system and method for providing a realistic service. The virtual reality apparatus for providing a realistic service in association with at least one feedback apparatus includes: a video analyzer configured to analyze a video being played; a video feedback information generator configured to generate realistic feedback information based on the analyzing by the video analyzer; and a feedback information transmitter configured to transmit the generated realistic feedback information to the at least one feedback apparatus.

Abstract: Provided are a custom relationship management (CRM)-based data migration system and method. The CRM-based data migration system includes a data source determination unit configured to determine a data source to be migrated from a source database (DB), an entity selection unit configured to select an entity of a CRM DB to which the data source is to be linked, an attribute field mapping unit configured to map a first attribute field of the data source determined by the data source determination unit and a second attribute field of the entity selected by the entity selection unit to each other, and a migration performing unit configured to perform data migration from the data source to the entity, based on a mapped attribute field between the first attribute field and the second attribute field by the attribute field mapping unit. The CRM-based data migration system performs data migration as a server plug-in that executes a CRM platform event generated from a CRM software package.

Abstract: A method of generating an image by using ultrasound waves. The method includes acquiring a first bio-signal of an object, generating at least one first ultrasound frame by using at least one echo signal obtained from at least one first ultrasound wave transmitted to a preset region of interest (ROI) of the object, generating a second ultrasound frame by using an echo signal obtained from a second ultrasound wave transmitted to the preset ROI, and acquiring a second bio-signal of the object at a time when the second ultrasound wave is transmitted to be used for generating the second ultrasound frame, and determining a reference frame from among the generated at least one first ultrasound frame based on the generated second ultrasound frame and the acquired second bio-signal.

Abstract: Provided are methods of switching guest-host dual frequency liquid crystals by using a back flow. In the case of a shutter having a dual frequency liquid crystal layer between two transparent substrates, such a method includes: applying a first voltage having a first frequency to the dual frequency liquid crystal layer; and applying a second voltage having a second frequency to the dual frequency liquid crystal, the second frequency being higher than the first frequency, wherein the second voltage is higher than a threshold voltage that generates a back flow around liquid crystals of the dual frequency liquid crystal layer, and the first voltage is lower than the threshold voltage.

Abstract: An ultrasonic imaging method includes emitting ultrasonic pulses in different directions and acquiring ultrasonic echo signals from an object, calculating an attenuation rate of the ultrasonic echo signals, correcting the acquired ultrasonic echo signals based on the attenuation rate, and outputting the corrected ultrasonic echo signals as an ultrasonic image.

Abstract: Provided are a three-dimensional (3D) image acquisition apparatus, and a method of generating a depth image in the 3D image acquisition apparatus. The method may include sequentially projecting a light transmission signal, which is generated from a light source, to a subject, modulating reflected light, which is reflected by the subject, using a light modulation signal, calculating a phase delay using a combination of a first plurality of images of two groups, from among a second plurality of images of all groups obtained by capturing the modulated reflected light, and generating a depth image based on the phase delay.

Abstract: An apparatus and method for out-focusing a color image based on a depth image, the method including receiving an input of a depth region of interest (ROI) desired to be in focus for performing out-focusing in the depth image, and applying different blur models to pixels corresponding to the depth ROI, and pixels corresponding to a region, other than the depth ROI, in the color image, thereby performing out-focusing on the depth ROI.

Abstract: A method of tracking motion of an organ, includes receiving organ shape data that includes a shape of an organ of an examinee at a moment of motion of the examinee, and loading first to Nth interpolation curves that represent spatiotemporal motion of respective organs of other examinees, the organs of the other examinees being the same type as the organ of the examinee. The method further includes estimating an interpolation curve that represents a spatiotemporal motion of the organ of the examinee based on the first to Nth interpolation curves and the organ shape data.

Abstract: An image processing apparatus and method using a depth image are provided. The image processing apparatus may include a region determination unit to determine a foreground region and a background region in a color image using a depth image, and a color compensation unit to compensate a color with respect to the foreground region and the background region.

Abstract: An apparatus and method for generating a depth image using transition of light sources may include a surface information determination unit to determine surface information related to a surface of an object, using a plurality of intensity images generated according to position of light sources; and an output depth image generation unit to generate an output depth image, using an original depth image and the surface information.

Abstract: A memory system includes a memory and a memory controller operating to control the memory. The memory includes a random accessible memory including a memory cell array operable in a random access mode, a NAND flash memory, and a selection circuit making the memory controller operate either one of the random accessible memory or the NAND flash memory.

Abstract: A semiconductor integrated circuit including a detector and a secure checker. The detector generates a detection signal upon sensing an abnormal state in an operating environment of the semiconductor integrated circuit. The secure checker generates a check signal to find an operating condition of the detector and receives the detection signal. The detector activates the detection signal in response to the check signal.

Abstract: A memory system includes a memory and a memory controller operating to control the memory. The memory includes a random accessible memory including a memory cell array operable in a random access mode, a NAND flash memory, and a selection circuit making the memory controller operate either one of the random accessible memory or the NAND flash memory.

Abstract: A memory system includes a memory and a memory controller operating to control the memory. The memory includes a random accessible memory including a memory cell array operable in a random access mode, a NAND flash memory, and a selection circuit making the memory controller operate either one of the random accessible memory or the NAND flash memory.

Abstract: Example embodiments provide a method and apparatus of correcting error data due to charge loss within a non-volatile memory device including a plurality of memory cells. The method of correcting error data within the non-volatile memory devices may include detecting error data in a second data group by comparing a first data group read from memory cells in response to a first voltage with the second data group read from memory cells in response to a second voltage. The second voltage is higher than the first voltage. Error data in the first data group is detected by error-correcting code (ECC). Re-writing data in the memory cells is performed by correcting error data in the first data group and error data in the second data group. A central processing unit (CPU) may detect error in the second data group. The second data group may be read through a page buffer and compared with the first data group stored in a SRAM. The detected error may be updated to the page buffer.

Abstract: A buffer memory includes a memory cell array, a flag cell array, and a error correction block. The memory cell array has a plurality of word lines. Each of the plurality of word lines are electrically connected to a plurality of memory cells storing data. The flag cell array has a plurality of flag cells. Each of the plurality of flag cells is connected to each of the word lines and stores information that indicates whether error correction of the data has been performed. The error correction block performs error correction on the data output from the memory cell array in response to a command received through a host interface and flag data output from the flag cell array.

Abstract: An integrated circuit card includes a central processing unit, a memory and an abnormal condition detector. The memory stores data to be processed by the central processing unit. The abnormal condition detector detects whether at least one operating condition of the integrated circuit card is within one of a suspend region or a reset region. The abnormal condition detector controls an operation of the central processing unit in accordance with the detection.

Abstract: A memory card includes: a first memory chip responding to all commands input externally; and a second memory chip responding to commands, among the commands input externally, relevant to reading, programming, and erasing operations with data. Card identification information stored in the first memory chip includes capacity information corresponding to a sum of sizes of the first and second memory chips. The plurality of memory chips of the memory card are useful in designing the memory card with storage capacity in various forms.

Abstract: A memory card includes: a first memory chip responding to all commands input externally; and a second memory chip responding to commands, among the commands input externally, relevant to reading, programming, and erasing operations with data. Card identification information stored in the first memory chip includes capacity information corresponding to a sum of sizes of the first and second memory chips. The plurality of memory chips of the memory card are useful in designing the memory card with storage capacity in various forms.

Abstract: A memory system includes a memory and a memory controller operating to control the memory. The memory includes a random accessible memory including a memory cell array operable in a random access mode, a NAND flash memory, and a selection circuit making the memory controller operate either one of the random accessible memory or the NAND flash memory.