Abstract: An optical device having a current blocking layer of a buried ridge structure and a fabrication method thereof are disclosed. This invention reduces a leakage current between active layer and ion implant layer in buried ridge structure. To minimize leakage current, a P-N-P current blocking layer and an ion implanting current blocking layer are combined. An optical device of the present invention includes: active layers of a mesa structure in a predetermined region on a substrate; a first current blocking layer of a P-N-P structure, which is placed to cover the mesa structure; and a second current blocking layer of a buried ridge structure, which is placed to surround the environs of the first current blocking layer.

Abstract: Disclosed is a method for the fabrication of a spot-size converter with a lateral-tapered waveguide (or an active layer), which utilizes a mask during a lithographic process wherein the mask has a pad that can absorb strain to be occurred during forming a lateral-tapered waveguide pattern at its distal end and the lateral-tapered waveguide is fabricated by forming the distal end on the order of about 0.6 &mgr;m in width followed by forming the lateral-tapered waveguide on the order of 0.1 &mgr;m using an wet etching. Thus, it is possible to reduce a fabrication cost because it is free from a high-resolution electron beam lithography and a stepper, and hence enhance a reproducibility of the lateral-tapered waveguide because it is free from an excessive wet etching during the use of a contact exposure equipment.

Abstract: A semiconductor optical device with a differential grating formed by a holography method and a method for manufacturing the same are provided. The provided semiconductor optical device includes an n-type InP substrate, a stack structure on the InP substrate having a waveguide and active layers, a first grating formed under the stack structure and on the InP substrate, and a second grating formed on the stack structure. The provided method for manufacturing the semiconductor optical device forms a first grating on the n-type InP substrate and under the active layer, and forms a second grating on the active layer. The first and second gratings are formed by the holography method.

Abstract: The present invention relates to a method for fabricating an optical device integrated with a spot size converter to reduce defect and low reflectivity in a butt-joint portion, the method including the steps of: a) depositing a first clad layer, an active layer and a second clad layer sequentially on the (100) plane of a semiconductor substrate; b) forming on the second clad layer a double dielectric mask of which the lower layer has a relatively wider width than that of the upper layer, exposing one side of the second clad layer; c) wet-etching the first clad layer, the active layer and the second clad layer in a buried ridge structure by using the double dielectric mask, and exposing the (111)A plane of the active layer tilted towards the (100) plane by a predetermined angle; d) growing a spot size conversion region on the (111)A plane of the active layer; and e) removing the double dielectric mask.

Abstract: The present invention relates to a method of manufacturing a semiconductor optical device. The present invention discloses a method of manufacturing an optical device of a planar buried heterostructure (PBH) type by which an active layer region of a taper shape at both ends is patterned, an undoped InP layer is selectively grown in order to reduce the propagation loss and two waveguides are simultaneously formed by means of a self-aligned method, thus simplifying the process to increase repeatability and yield.

Abstract: The present invention relates to a method for fabricating an optical device integrated with a spot size converter to reduce defect and low reflectivity in a butt-joint portion, the method including the steps of: a) depositing a first clad layer, an active layer and a second clad layer sequentially on the (100) plane of a semiconductor substrate; b) forming on the second clad layer a double dielectric mask of which the lower layer has a relatively wider width than that of the upper layer, exposing one side of the second clad layer; c) wet-etching the first clad layer, the active layer and the second clad layer in a buried ridge structure by using the double dielectric mask, and exposing the (111)A plane of the active layer tilted towards the (100) plane by a predetermined angle; d) growing a spot size conversion region on the (111)A plane of the active layer; and e) removing the double dielectric mask.

Abstract: An optical device having a current blocking layer of a buried ridge structure and a fabrication method thereof are disclosed. This invention reduces a leakage current between active layer and ion implant layer in buried ridge structure. To minimize leakage current, a P-N-P current blocking layer and an ion implanting current blocking layer are combined. An optical device of the present invention includes: active layers of a mesa structure in a predetermined region on a substrate; a first current blocking layer of a P-N-P structure, which is placed to cover the mesa structure; and a second current blocking layer of a buried ridge structure, which is placed to surround the environs of the first current blocking layer.

Abstract: Disclosed is a method for the fabrication of a spot-size converter with a lateral-tapered waveguide (or an active layer), which utilizes a mask during a lithographic process wherein the mask has a pad that can absorb strain to be occurred during forming a lateral-tapered waveguide pattern at its distal end and the lateral-tapered waveguide is fabricated by forming the distal end on the order of about 0.6 &mgr;m in width followed by forming the lateral-tapered waveguide on the order of 0.1 &mgr;m using an wet etching. Thus, it is possible to reduce a fabrication cost because it is free from a high-resolution electron beam lithography and a stepper, and hence enhance a reproducibility of the lateral-tapered waveguide because it is free from an excessive wet etching during the use of a contact exposure equipment.

Abstract: A method for manufacturing quantum wires is provided in which a stacked structure having AlAs layers and GaAs layers alternatively is formed, V-grooves are formed beside the GaAs layers and the quantum wires are formed using the V-grooves.

Abstract: A method for fabricating a compound semiconductor substrate having a quantum dot array structure includes the steps of forming a plurality of dielectric thin layer patterns on a substrate, thereby forming an exposed area of the substrate, sequentially forming buffer layers and barrier layers in a pyramid shape on the exposed area of the substrate, forming Ga droplets on the barrier layers, transforming the Ga droplets into GaAs quantum dots, performing a thermal process to the substrate, and growing the buffer layers and the barrier layers to thereby form a passivation layer capping the GaAs quantum dots.

Abstract: A method of fabricating quantum wire structures and devices, and quantum dot structures and devices comprise steps of: depositing an insulating layer on a semiconductor substrate, forming a line patterns and a square patterns in an insulating layer, forming a V-grooved patterned structures and a reverse quadrilateral pyramid patterned structures by thermal etching to evaporate portions of the quantum well layer that are not protected by line-shaped mask regions and square-shaped mask regions of the masking layer, forming a quantum wires and a quantum dots by alternatively growing a barrier layer and an active layer on a V-grooved patterned substrate and a reverse quadrilateral pyramid patterned substrate.

Abstract: The formation of self-assembled GaAs quantum dots on (100) GaAs via chemical beam epitaxy (CBE) technique using triethylgallium (TEGa) and arsine (AsH.sub.3) is disclosed. GaAs quantum dots are easy to grow from Ga-droplets which are successively supplied with arsine with neither pattern definition nor pre-treatment steps prior to the growth. The density and the size of Ga-droplets are found to be sensitive to the growth conditions, such as the growth temperature, the beam equivalent pressure of TEGa, and the amount of TEGa supplied. This invention suggests that, unlike Stranski-Krastanow growth, the Ga-droplet-induced CBE technique can be a useful method for the fabrication of quantum dot structure by simple change of gas supply mode, even in lattice-matched system.

Abstract: A linear motion apparatus for moving an object in a vacuum chamber comprising an antenna or a telescoping shaft such as a fishing rod to effectively utilize space, and to avoid the need of a rear projection thereby achieving stability.

Abstract: A method for forming a highly dense quantum wire, the method comprising the steps of: depositing a dielectric mask having dielectric patterns on the top surface of a semiconductor (100) substrate; forming the dielectric patterns in parallel to a (011) orientation on the semiconductor substrate; exposing a (111)B side and a(111)B side by chemical etching a selected region between the patterns so that the semiconductor substrate has a dove-tail shape; forming a buffer layer on the dove-tail semiconductor substrate; forming the first barrier layer on the buffer layer; forming a well layer on the first barrier layer; and forming the second barrier layer on the well layer.

Abstract: Disclosed is a fabricating method of a GaAs substrate having a V-shaped groove in a higher density, that is a double density, the method comprising the steps of forming a Si.sub.3 N.sub.4 layer on a main surface of the GaAs substrate; patterning the Si.sub.3 N.sub.4 layer using a photo-lithography to form a patterned Si.sub.3 N.sub.4 layer having a minimum width; wet-etching the GaAs substrate using the patterned Si.sub.3 N.sub.4 layer as a mask, so as to form (111) and (100) surfaces of the GaAs substrate beneath the patterned Si.sub.3 N.sub.4 ; selectively growing a GaAs film on the GaAs substrate etched thus using the patterned Si.sub.3 N.sub.4 layer as a mask so as to form the GaAs film with two (111) facets only on a (100) surface of the GaAs substrate; and removing the Si.sub.3 N.sub.4 layer. The V-shaped grooves can be formed on a GaAs substrate utilizing a difference of growth rate caused by surface orientation of the substrate, and therefore the grooves can be formed in double density.

Abstract: A crystal growth method for a compound semiconductor is capable of forming a plurality of quantum wells (formed of a barrier layer having a large energy band gap and an active layer having a small energy band gap) on the compound semiconductor substrate. After etching a V-shaped groove having a (111) surface with a predetermined angle .theta.1 with respect to the (100) surface on the GaAs semiconductor substrate, the substrate is further etched by a hydrochloric solution and a solution of H.sub.2 SO.sub.4 :H.sub.2 O.sub.2 :H.sub.2 O=20:1 to cause the V-shaped groove walls to become a non-(111) surface having a lower predetermined slope angle .theta.2. The quantum wells then grown in the bottom of the V-shaped groove will be effectively disconnected from simultaneous growths on the side walls of the groove thus giving rise to closely controlled multi-dimensional quantum well structures.