Abstract: A method of controlling an EOP of a powertrain may include determining, by a controller electrically connected to the EOP, whether an oil sloshing phenomenon in which it is difficult for oil to return to a space where an oil intake port of the EOP is positioned may occur while a vehicle is running; and reducing, by the controller, the revolutions per minute (RPM) of the EOP by a predetermined reduced RPM when it is determined that the oil sloshing phenomenon may occur.

Abstract: Provided is a heat dissipating substrate including a diamond substrate, wherein an upper portion of the diamond substrate has a concave-convex structure including recessed regions that are spaced apart from each other, and insulation patterns that fill the recessed regions. The insulation patterns include at least one of silicon carbide, silicon nitride, silicon oxide, aluminum nitride, and aluminum oxide.

Abstract: Provided are a semiconductor device and a method of fabricating the same. The semiconductor device includes a substrate having a first region and a second region, a buffer layer disposed on the substrate, a semiconductor layer disposed on the buffer layer, a barrier layer disposed on the semiconductor layer, a first source electrode, a first drain electrode, and a first gate electrode disposed therebetween, which are disposed on the barrier layer in the first region, a second source electrode, a second drain electrode, and a second gate electrode disposed therebetween, which are disposed on the barrier layer in the second region, and a ferroelectric pattern interposed between the first gate electrode and the barrier layer.

Abstract: Provided are a semiconductor device and a method of fabricating the same. The semiconductor device includes a substrate having a first region and a second region, a buffer layer disposed on the substrate, a semiconductor layer disposed on the buffer layer, a barrier layer disposed on the semiconductor layer, a first source electrode, a first drain electrode, and a first gate electrode disposed therebetween, which are disposed on the barrier layer in the first region, a second source electrode, a second drain electrode, and a second gate electrode disposed therebetween, which are disposed on the barrier layer in the second region, and a ferroelectric pattern interposed between the first gate electrode and the barrier layer.

Abstract: A method for fabricating a semiconductor device includes sequentially laminating a separation layer and a first substrate layer on a sacrificial substrate, and forming a heat dissipation plate comprising a first region and a second region on the first substrate layer. The method further includes removing the sacrificial substrate and the separation layer, and patterning the first substrate layer to form a first substrate exposing the heat dissipation plate in the second region and contacting the heat dissipation plate in the first region, and forming a first element on the first substrate. The method still further includes forming a plurality of conductive pads disposed on the heat dissipation plate in the second region and a first line connecting at least one of the plurality of conductive pads to the first element, and forming a second element on the conductive pads in the second region.

Abstract: Provided are a semiconductor device and a method for fabricating the same. The semiconductor device includes a heat dissipation plate including a first region and a second region, a first element disposed on the heat dissipation plate in the first region, and a second element disposed on the heat dissipation plate in the second region.

Abstract: Provided are a semiconductor device and a method for fabricating the same. The semiconductor device includes a heat dissipation plate including a first region and a second region, a first element disposed on the heat dissipation plate in the first region, and a second element disposed on the heat dissipation plate in the second region. The first element includes a first substrate, the second element includes a second substrate, the first substrate includes a material different from a material of the second substrate, the first substrate contacts the heat dissipation plate, and the second element is bonded to the heat dissipation plate in a flip-chip bonding manner.

Abstract: A semiconductor device includes a first semiconductor layer. A second semiconductor layer is disposed on the first semiconductor layer. A structure layer is disposed on the second semiconductor layer. A metal film covers a side surface of the first semiconductor layer, a side surface of the second semiconductor layer, and an upper surface of the structure layer. A flexible substrate covers the metal film.

Abstract: Provided are a semiconductor device and a method for fabricating the same. The semiconductor device includes a heat dissipation plate including a first region and a second region, a first element disposed on the heat dissipation plate in the first region, and a second element disposed on the heat dissipation plate in the second region. The first element includes a first substrate, the second element includes a second substrate, the first substrate includes a material different from a material of the second substrate, the first substrate contacts the heat dissipation plate, and the second element is bonded to the heat dissipation plate in a flip-chip bonding manner.

Abstract: A semiconductor device includes a first semiconductor layer. A second semiconductor layer is disposed on the first semiconductor layer. A structure layer is disposed on the second semiconductor layer. A metal film covers a side surface of the first semiconductor layer, a side surface of the second semiconductor layer, and an upper surface of the structure layer. A flexible substrate covers the metal film.

Abstract: Provided are a semiconductor device and a method of fabricating the same. The semiconductor device includes: an active region provided on a substrate; an inlet channel formed as a single cavity buried in one side of the substrate; an outlet channel formed as a single cavity buried in the other side of the substrate; a micro channel array comprising a plurality of micro channels, wherein the plurality of micro channels are formed as a plurality of cavities buried in the substrate, and one end of the micro channel array is connected to a side of the inlet channel and the other end of the micro channel array is connected to a side of the outlet channel; and a micro heat sink array separating the micro channels from one another.

Abstract: A method for manufacturing a semiconductor device includes sequentially stacking a first epitaxial layer, a sacrificial layer, a second epitaxial layer, and a third epitaxial layer on a first substrate, forming a trench which penetrates the third epitaxial layer, the second epitaxial layer, and the sacrificial layer, forming a structure layer on an upper surface of the third epitaxial layer, forming a metal film which covers an inner surface of the trench and the structure layer, forming a second substrate which fills the trench and covers the metal film, and separating the second epitaxial layer, the third epitaxial layer, and the structure layer from the first epitaxial layer.

Abstract: A method for manufacturing a semiconductor device includes sequentially stacking a first epitaxial layer, a sacrificial layer, a second epitaxial layer, and a third epitaxial layer on a first substrate, forming a trench which penetrates the third epitaxial layer, the second epitaxial layer, and the sacrificial layer, forming a structure layer on an upper surface of the third epitaxial layer, forming a metal film which covers an inner surface of the trench and the structure layer, forming a second substrate which fills the trench and covers the metal film, and separating the second epitaxial layer, the third epitaxial layer, and the structure layer from the first epitaxial layer.

Abstract: A first nitride semiconductor layer of a semiconductor device is provided on a substrate, a second nitride semiconductor layer is provided on the first nitride semiconductor layer, a first ohmic metal and a second ohmic metal are provided on the second nitride semiconductor layer, a recess region is provided in the second nitride semiconductor layer between the first ohmic metal and the second ohmic metal, a passivation layer covers side of the first ohmic metal and a bottom surface and sides of the recess region, and a Schottky electrode is provided on the first ohmic metal and extends into the recess region.

Abstract: Provided are a semiconductor device and a method of fabricating the same. The semiconductor device includes: an active region provided on a substrate; an inlet channel formed as a single cavity buried in one side of the substrate; an outlet channel formed as a single cavity buried in the other side of the substrate; a micro channel array comprising a plurality of micro channels, wherein the plurality of micro channels are formed as a plurality of cavities buried in the substrate, and one end of the micro channel array is connected to a side of the inlet channel and the other end of the micro channel array is connected to a side of the outlet channel; and a micro heat sink array separating the micro channels from one another.

Abstract: Provided are a semiconductor device and a method of fabricating the same. The semiconductor device includes: an active region provided on a substrate; an inlet channel formed as a single cavity buried in one side of the substrate; an outlet channel formed as a single cavity buried in the other side of the substrate; a micro channel array comprising a plurality of micro channels, wherein the plurality of micro channels are formed as a plurality of cavities buried in the substrate, and one end of the micro channel array is connected to a side of the inlet channel and the other end of the micro channel array is connected to a side of the outlet channel; and a micro heat sink array separating the micro channels from one another.

Abstract: Disclosed is a manufacturing method of a high electron mobility transistor. The method includes: forming a source electrode and a drain electrode on a substrate; forming a first insulating film having a first opening on an entire surface of the substrate, the first opening exposing a part of the substrate; forming a second insulating film having a second opening within the first opening, the second opening exposing a part of the substrate; forming a third insulating film having a third opening within the second opening, the third opening exposing a part of the substrate; etching a part of the first insulating film, the second insulating film and the third insulating film so as to expose the source electrode and the drain electrode; and forming a T-gate electrode on a support structure including the first insulating film, the second insulating film and the third insulating film.

Abstract: Provided is a method of manufacturing a nitride semiconductor device. The method includes forming a plurality of electrodes on a growth substrate on which first and second nitride semiconductor layers are sequentially stacked, forming upper metal layers on the plurality of electrodes respectively, removing the growth substrate to expose a lower surface of the first nitride semiconductor layer, and forming a third nitride semiconductor layer and a lower metal layer sequentially on the exposed lower surface of the first nitride semiconductor layer.

Abstract: Provided is a nitride semiconductor device including: a substrate having through via holes; first and second nitride semiconductor layers sequentially stacked on the substrate; drain electrodes and source electrodes provided on the second nitride semiconductor layer; and an insulating pattern provided on the second nitride semiconductor layer, the insulating pattern having upper via holes provided on the drain electrodes, wherein the through via holes are extended into the first and second nitride semiconductor layers and expose a bottom of each of the source electrodes.

Abstract: A method of manufacturing a microarray type nitride light emitting device includes forming a light emitting semiconductor layer by sequentially laminating a buffer layer, an n-type nitride contact layer, an active layer, and a p-type nitride contact layer on a substrate, forming a first transparent contact layer on the formed light emitting semiconductor layer, dividing a microarray type light emitting region through heat treatment of the first transparent contact layer through formation of a pattern, and connecting the divided light emitting regions by a second transparent contact layer.