Abstract: A trench structure and method for semiconductor device isolation are disclosed, including first and second regions of a substrate having first and second trenches, respectively, the first trench having an aspect ratio larger than that of the second trench, a first insulation material on a bottom and sidewalls of the first trench forming a first sub-trench in the first trench, a second insulation material completely filling the first sub-trench, a third insulation material formed on a bottom and sidewalls of the second trench forming a second sub-trench in the second trench, a fourth insulation material formed on a bottom and sidewalls of the second sub-trench, and a fifth insulation material completely filling a third sub-trench formed in the second sub-trench by the fourth insulation material. Trench structures may be formed in high and low aspect ratio trenches in a substrate without the generation of voids therein.

Abstract: Methods of forming gate oxide films in integrated circuit devices using wet or dry oxidization processes with a reduced amount of chloride are disclosed. A gate oxide film is formed on a substrate on an active region adjacent to a trench isolation region in a first gas atmosphere with a first amount of chloride. The gate oxide film is annealed in a second gas atmosphere including a second amount of chloride that is greater than the first amount.

Abstract: A method for forming a thin film on a gate electrode reduces oxidation of the gate electrode during a re-oxidation process to fix the damage to the gate oxide film caused during the formation of the gate electrode pattern. The gate electrode pattern formed in this manner will have reduced defects after re-oxidation. After a gate oxide film is formed on a substrate, a gate electrode pattern is formed on the gate oxide film through an etching process. A thin film that includes nitride is then continuously formed on the gate oxide film and on the gate electrode by utilizing a deposition rate difference between the thin film on the gate oxide film and on the thin film forming the gate electrode. Because of the thin film formed on the gate electrode, oxidation of the gate electrode is reduced during the re-oxidation of the gate oxide film.

Abstract: Methods of forming trench isolation regions include the steps of forming a semiconductor substrate having a trench therein and a masking layer thereon extending adjacent the trench. The masking layer may comprise silicon nitride. A recess-inhibiting layer is then formed on a sidewall of the trench and on a sidewall of the masking layer. Next, a stress-relief layer is formed on the recess-inhibiting layer. This stress-relief layer extends opposite the sidewall of the trench and opposite the sidewall of the masking layer and may comprise silicon nitride. The trench is then filled with a trench isolation layer. A sequence of planarization or etch-back steps are then performed to remove the masking layer and also align an upper surface of the trench isolation layer with a surface of the substrate. At least a portion of the masking layer is removed using a first etchant (e.g.

Abstract: Methods of forming trench isolation regions include the steps of forming a semiconductor substrate having a trench therein and a masking layer thereon extending adjacent the trench. The masking layer may comprise silicon nitride. A recess-inhibiting layer is then formed on a sidewall of the trench and on a sidewall of the masking layer. Next, a stress-relief layer is formed on the recess-inhibiting layer. This stress-relief layer extends opposite the sidewall of the trench and opposite the sidewall of the masking layer and may comprise silicon nitride. The trench is then filled with a trench isolation layer. A sequence of planarization or etch-back steps are then performed to remove the masking layer and also align an upper surface of the trench isolation layer with a surface of the substrate. At least a portion of the masking layer is removed using a first etchant (e.g.

Abstract: A method for forming a thermal oxide layer on the surface of a semiconductor substrate exposed during a semiconductor fabricating process. The thermal oxide layer is to be thin to minimize silicon substrate defects caused by volume expansion. A chemical vapor deposition (CVD) layer is then formed on the thin thermal oxide layer, creating a required thickness. The thin thermal oxide layer and the CVD material layer are formed in the same CVD apparatus. As a result, a process can be simplified and a particle-leading pollution can be prevented.

Abstract: An isolation method in the fabrication process of a semiconductor device is provided. The method forms an oxide layer as a buffer layer for reducing stress through chemical vapor deposition (CVD). By the method, a first pad oxide layer and a silicon nitride layer are formed on a semiconductor substrate, and then an silicon nitride layer pattern is formed by patterning, and undercuts are formed in the first pad oxide layer pattern. Subsequently, a second pad oxide layer is formed on the entire surface of the semiconductor substrate through CVD, and then spacers are formed on the sidewalls of both the patterned first pad oxide layer and silicon nitride layer and a field oxide layer is formed through thermal oxidation. Alternatively, a silicon layer is deposited without the spacers to form the field oxide layer. The second pad oxide layer is a buffer layer for buffering stress during formation of the field oxide layer.

Abstract: An integrated circuit device is isolated by forming a pad oxide layer on an integrated circuit substrate. A mask pattern is formed on the pad layer. The mask pattern includes sidewalls which selectively expose the pad oxide layer between the sidewalls. A silicon spacer is formed on the sidewalls. An oxidation barrier film is formed on the silicon spacer and on the exposed pad oxide layer. The integrated circuit substrate is then oxidized through the oxidation barrier film to form a device isolating layer. The oxidation barrier film on the exposed pad oxide layer is thinner than the oxidation barrier film on the sidewalls. Thus, oxidation of the silicon spacer is delayed relative to the substrate.

Abstract: An isolation region is formed on a substrate by forming spaced apart mesas on the substrate. A first insulation region is then formed on the substrate and second insulation regions are formed on the mesas, the first insulation region being disposed between and spaced apart from a respective one of the mesas, a respective one of the second insulation regions capping a respective one of the mesas. Preferably, the first and second insulation regions are formed by forming sidewall spacers adjacent sidewall portions of the mesas and oxidizing portions of the mesas opposite the substrate and a portion of the substrate disposed between the sidewall spacers. Spaced apart trenches are formed in the substrate on opposite sides of the first insulation region, a respective one of the trenches being disposed between the first insulation region and a respective one of the mesas, preferably by removing the sidewall spacers and underlying portions of the substrate.