Abstract: The present inventive concept provides, for an optical modulation unit of which the manufacturing is simplified and the performance is improved and a stereoscopic display having the same, an optical modulation unit and a stereoscopic display device comprising the same, the optical modulation unit comprising: a liquid crystal cell having different phase delay amounts of penetrated light in the on and off states; and a phase delay film part arranged on at least one among an optical path of light having passed through the liquid crystal cell and an optical path of light entering into the liquid crystal cell, and comprising a phase delay film having a fixed phase delay amount, wherein when a wavelength of light, which has passed through both the liquid crystal cell and the phase delay film part, is ?, a phase delay amount of the light having passed through both the liquid crystal cell and the phase delay film part is ?/4 when the liquid crystal cell is in the on state and ??/4 when the liquid crystal cell is in t

Abstract: Disclosed is a protection device for a blind string. The protection device includes a bellows tube provided in a tubular structure, allowing the blind string to pass through an inner part thereof, and having a length increased or reduced in a longitudinal direction of the blind string, a first module coupled with a lower end portion of the bellows tube and having an inner part to which an end portion of the blind string is locked, and a second module decoupled from the first module at an upper portion of the first module while the bellows tube is interposed between the first module and the second module, such that the bellows tube is folded. The bellows tube has a difference in the thickness of the skin thereof such that the bellows tube is automatically spread due to elasticity thereof when the second module is moved up from the first module.

Abstract: A semiconductor device includes a substrate with an active pattern, the active pattern having a first extension portion extending in a first direction substantially parallel to a top surface of the substrate, a second extension portion extending from a first end of the first extension portion in a third direction oriented obliquely to the first direction, a third extension portion extending from a second end of the first extension portion in a direction opposed to the third direction, a first projection portion protruding from the second extension portion in a direction opposed to the first direction, the first projection portion being spaced apart from the first extension portion, and a second projection portion protruding from the third extension portion in the first direction, the second projection portion being spaced apart from the first extension portion.

Abstract: A mobile terminal includes a front housing made of a light-transmitting material and provided with edge parts, at least one of which is rounded or bent to be inclined which causes optical illusions so as to provide visual mystique. A display unit is provided under the front housing. A circuit substrate is provided under the display unit. A rear housing is provided to accommodate the display unit and the circuit substrate together with the front housing. A middle housing is provided between the front housing and the rear housing. The middle housing includes a receipt part to accommodate the display unit, and boundary parts connecting the receipt part and edge parts of the middle housing and disposed under the edge parts of the front housing. The edge part of the middle housing is protruded from the boundary part of the middle housing in a horizontal direction.

Abstract: Provided is a semiconductor device in which a short margin between a storage contact plug and a bit line contact plug may be increased. The device includes a substrate including isolation regions and active regions defined by the isolation regions, gates disposed in the substrate and configured to intersect the active regions and define source regions and drain regions in the active regions, an interlayer insulating layer disposed on the substrate, bit line contact plugs configured to penetrate the interlayer insulating layer and contact the drain regions, and first bit line structures and second bit line structures disposed on the interlayer insulating layer. The first bit line structures include first bit line conductive patterns and first bit line spacers covering sidewalls of the first bit line conductive patterns.

Abstract: Provided is a semiconductor device in which a short margin between a storage contact plug and a bit line contact plug may be increased. The device includes a substrate including isolation regions and active regions defined by the isolation regions, gates disposed in the substrate and configured to intersect the active regions and define source regions and drain regions in the active regions, an interlayer insulating layer disposed on the substrate, bit line contact plugs configured to penetrate the interlayer insulating layer and contact the drain regions, and first bit line structures and second bit line structures disposed on the interlayer insulating layer. The first bit line structures include first bit line conductive patterns and first bit line spacers covering sidewalls of the first bit line conductive patterns.

Abstract: Provided are a method of fabricating a recess channel transistor and a related semiconductor device. The method may include forming a first gate trench on a substrate, forming a dielectric spacer on a sidewall of the first gate trench, forming a second gate trench on the substrate under the first gate trench, and forming a gate electrode to fill the trenches. The dielectric spacer may remain between the gate electrode and the substrate.

Abstract: Disclosed herein is a mobile terminal which causes optical illusions at edge parts of a front housing so as to provide visual mystique.

Abstract: Semiconductor devices including an isolation layer on a semiconductor substrate are provided. The isolation layer defines an active region of the semiconductor substrate. The device further includes an upper gate electrode crossing over the active region and extending to the isolation layer and lower active gate electrode. The lower active gate electrode includes a first active gate electrode extending from the upper gate electrode to the active region and a second active gate electrode below the first active gate electrode and having a greater width than a width of the first active gate electrode. The device further includes a lower field gate electrode that extends from the upper gate electrode to the isolation layer and has a bottom surface that is at a lower level than a bottom surface of the active gate electrode such that the sidewalls of the active region are covered below the lower active gate electrode. Related methods of fabricating semiconductor devices are also provided herein.

Abstract: Semiconductor devices including an isolation layer on a semiconductor substrate are provided. The isolation layer defines an active region of the semiconductor substrate. The device further includes an upper gate electrode crossing over the active region and extending to the isolation layer and lower active gate electrode. The lower active gate electrode includes a first active gate electrode extending from the upper gate electrode to the active region and a second active gate electrode below the first active gate electrode and having a greater width than a width of the first active gate electrode. The device further includes a lower field gate electrode that extends from the upper gate electrode to the isolation layer and has a bottom surface that is at a lower level than a bottom surface of the active gate electrode such that the sidewalls of the active region are covered below the lower active gate electrode. Related methods of fabricating semiconductor devices are also provided herein.

Abstract: Provided are a method of fabricating a recess channel transistor and a related semiconductor device. The method may include forming a first gate trench on a substrate, forming a dielectric spacer on a sidewall of the first gate trench, forming a second gate trench on the substrate under the first gate trench, and forming a gate electrode to fill the trenches. The dielectric spacer may remain between the gate electrode and the substrate.

Abstract: Some embodiments of the present invention provide semiconductor devices including a gate trench in an active region of a semiconductor substrate and a gate electrode in the gate trench. A low-concentration impurity region is provided in the active region adjacent to a sidewall of the gate trench. A high-concentration impurity region is provided between the low-concentration impurity region and the sidewall of the gate trench and along the sidewall of the gate trench. Related methods of fabricating semiconductor devices are also provided herein.

Abstract: A transistor having a gate pattern suitable for self-alignment with a channel impurity diffusion region in an active region includes an active region and an isolation layer disposed in a semiconductor substrate. The isolation layer is formed to define the active region. An insulating layer covering the active region and the isolation layer is disposed. The insulating layer has a channel-induced hole on the active region. A channel impurity diffusion region and a gate trench are formed in the active region to be aligned with the channel-induced hole. The insulating layer is removed from the semiconductor substrate. A gate pattern is disposed in the gate trench to overlap the channel impurity diffusion region.