Abstract: A semiconductor device includes a stacked structure including conductive layers and gaps respectively interposed between the conductive layers, a channel layer passing through the stacked structure, a ferroelectric layer surrounding a sidewall of the channel layer, and first dielectric patterns interposed between the ferroelectric layer and the conductive layers, respectively. The gaps extending between the first dielectric patterns.

Abstract: A method of manufacturing an image sensing apparatus includes: forming a first substrate structure including a first region of a pixel region, the first substrate structure having a first surface and a second surface; forming a second substrate structure including a circuit region for driving the pixel region, the second substrate structure having a third surface and a fourth surface; bonding the first substrate structure to the second substrate structure, such that the first surface is connected to the third surface; forming a second region of the pixel region on the second surface; forming a first connection via, the first connection via extending from the second surface to pass through the first substrate structure; mounting semiconductor chips on the fourth surface, using a conductive bump; and separating a stack structure of the first substrate structure, the second substrate structure, and the semiconductor chips into unit image sensing apparatuses.

Abstract: A semiconductor device includes a stacked structure including conductive layers and insulating layers stacked alternately with each other, a channel layer passing through the stacked structure, a ferroelectric layer surrounding a sidewall of the channel layer, a first dielectric layer surrounding a sidewall of the ferroelectric layer, and sacrificial patterns interposed between the first dielectric layer and the insulating layers and including a material with a higher dielectric constant than the first dielectric layer.

Abstract: A semiconductor device includes a stacked structure including conductive layers and insulating layers stacked alternately with each other, a channel layer passing through the stacked structure, a ferroelectric layer surrounding a sidewall of the channel layer, a first dielectric layer surrounding a sidewall of the ferroelectric layer, and sacrificial patterns interposed between the first dielectric layer and the insulating layers and including a material with a higher dielectric constant than the first dielectric layer.

Abstract: An image reading apparatus includes an image sensor, a document feeder, and a processor. The document feeder includes a first driving device, a second driving device, a third driving device, a first sensor, and a second sensor. The first driving device includes a pick-up member to move documents from a tray to a document conveying path using a driving force through a first clutch. The second driving device is to move the tray with the documents to a side of the pick-up member using a driving force through a second clutch. The third driving device to move the documents along the document conveying path onto the image sensor using the driving force of the motor The first and second sensors detect the documents on the document conveying path. The processor controls an operation of the first clutch based on the signals of the first and second sensors.

Abstract: An image reading apparatus includes an image sensor, a document feeder, and a processor. The document feeder includes a first driving device, a second driving device, a third driving device, a first sensor, and a second sensor. The first driving device includes a pick-up member to move documents from a tray to a document conveying path using a driving force through a first clutch. The second driving device is to move the tray with the documents to a side of the pick-up member using a driving force through a second clutch. The third driving device to move the documents along the document conveying path onto the image sensor using the driving force of the motor The first and second sensors detect the documents on the document conveying path. The processor controls an operation of the first clutch based on the signals of the first and second sensors.

Abstract: A semiconductor device includes a stacked structure including conductive layers and gaps respectively interposed between the conductive layers, a channel layer passing through the stacked structure, a ferroelectric layer surrounding a sidewall of the channel layer, and first dielectric patterns interposed between the ferroelectric layer and the conductive layers, respectively. The gaps extending between the first dielectric patterns.

Abstract: A semiconductor device includes a stacked structure including conductive layers and insulating layers stacked alternately with each other, a channel layer passing through the stacked structure, a ferroelectric layer surrounding a sidewall of the channel layer, a first dielectric layer surrounding a sidewall of the ferroelectric layer, and sacrificial patterns interposed between the first dielectric layer and the insulating layers and including a material with a higher dielectric constant than the first dielectric layer.

Abstract: A semiconductor device includes a stack structure including conductive patterns spaced apart from each other, a channel structure penetrating the stack structure, and a slit insulating layer penetrating the stack structure. Air gaps are defined between the conductive patterns. The slit insulating layer includes a first interposition part covering a sidewall of one of the conductive patterns and a second interposition part covering one of the air gaps from the side. A smallest width of the second interposition part is smaller than a smallest width of the first interposition part.

Abstract: An image sensing apparatus includes a first substrate structure, a second substrate structure, and a memory chip. The first substrate structure includes a pixel region having a photoelectric conversion element. The second substrate structure includes a first surface connected to the first substrate structure and a second surface opposite the first surface, and also includes a circuit region to drive the pixel region. The memory chip is mounted on the second surface of the second substrate structure. The first substrate structure and the second substrate structure are electrically connected by first connection vias passing through the first substrate structure. The second substrate structure and the memory chip are electrically connected by second connection vias passing through a portion of the second substrate structure. The first connection vias and the second connection vias are at different positions on a plane.

Abstract: An image reading apparatus includes an image sensor, a document feeder, and a processor. The document feeder includes a first driving device, a second driving device, a third driving device, a first sensor, and a second sensor. The first driving device includes a pick-up member to move documents from a tray to a document conveying path using a driving force through a first clutch. The second driving device is to move the tray with the documents to a side of the pick-up member using a driving force through a second clutch. The third driving device to move the documents along the document conveying path onto the image sensor using the driving force of the motor The first and second sensors detect the documents on the document conveying path. The processor controls an operation of the first clutch based on the signals of the first and second sensors.

Abstract: A method of manufacturing an image sensing apparatus includes: forming a first substrate structure including a first region of a pixel region, the first substrate structure having a first surface and a second surface; forming a second substrate structure including a circuit region for driving the pixel region, the second substrate structure having a third surface and a fourth surface; bonding the first substrate structure to the second substrate structure, such that the first surface is connected to the third surface; forming a second region of the pixel region on the second surface; forming a first connection via, the first connection via extending from the second surface to pass through the first substrate structure; mounting semiconductor chips on the fourth surface, using a conductive bump; and separating a stack structure of the first substrate structure, the second substrate structure, and the semiconductor chips into unit image sensing apparatuses.

Abstract: A method of manufacturing an image sensing apparatus includes: forming a first substrate structure including a first region of a pixel region, the first substrate structure having a first surface and a second surface; forming a second substrate structure including a circuit region for driving the pixel region, the second substrate structure having a third surface and a fourth surface; bonding the first substrate structure to the second substrate structure, such that the first surface is connected to the third surface; forming a second region of the pixel region on the second surface; forming a first connection via, the first connection via extending from the second surface to pass through the first substrate structure; mounting semiconductor chips on the fourth surface, using a conductive bump; and separating a stack structure of the first substrate structure, the second substrate structure, and the semiconductor chips into unit image sensing apparatuses.

Abstract: A semiconductor device including a via plug formed on a substrate and a metal layer for interconnection formed at an end of the via plug, wherein an insulating structure is under the metal layer for interconnection and the insulating structure has a different layered structure according to a positional relationship with the metal layer for interconnection is disclosed.

Abstract: Disclosed herein are an apparatus and method for object networking. The apparatus includes one or more processors and executable memory for storing at least one program executed by the one or more processors. The at least one program registers a real object included in the scene recognized by the virtualization display device of a user as an object of interest, generates a local network using local information pertaining to the object of interest, and generates a global network of multiple objects of interest from the local networks of the multiple objects of interest using global information pertaining to the object of interest.

Abstract: An image sensing apparatus includes a first substrate structure, a second substrate structure, and a memory chip. The first substrate structure includes a pixel region having a photoelectric conversion element. The second substrate structure includes a first surface connected to the first substrate structure and a second surface opposite the first surface, and also includes a circuit region to drive the pixel region. The memory chip is mounted on the second surface of the second substrate structure. The first substrate structure and the second substrate structure are electrically connected by first connection vias passing through the first substrate structure. The second substrate structure and the memory chip are electrically connected by second connection vias passing through a portion of the second substrate structure. The first connection vias and the second connection vias are at different positions on a plane.

Abstract: An image sensing apparatus includes a first substrate structure, a second substrate structure, and a memory chip. The first substrate structure includes a pixel region having a photoelectric conversion element. The second substrate structure includes a first surface connected to the first substrate structure and a second surface opposite the first surface, and also includes a circuit region to drive the pixel region. The memory chip is mounted on the second surface of the second substrate structure. The first substrate structure and the second substrate structure are electrically connected by first connection vias passing through the first substrate structure. The second substrate structure and the memory chip are electrically connected by second connection vias passing through a portion of the second substrate structure. The first connection vias and the second connection vias are at different positions on a plane.

Abstract: An apparatus for testing and developing products of network computing based on an open-source virtualized cloud includes a physical space, a network function virtualization (NFV) infrastructure domain space that provides a virtualization function in an independent environment of each user; an NFV engine space that provides a processing based environment for virtual appliances which are units of a virtual network device that is individually operable, a framework space that provides support to allow the virtual appliances to be developed and registered, and a virtual network service space that provides a user interface interoperating with the framework space so that a user configures a virtual network through the user interface and a test function of the configured virtual network is supported.

Abstract: A semiconductor device including a via plug formed on a substrate and a metal layer for interconnection formed at an end of the via plug, wherein an insulating structure is under the metal layer for interconnection and the insulating structure has a different layered structure according to a positional relationship with the metal layer for interconnection is disclosed.

Abstract: An image sensing apparatus includes a first substrate structure, a second substrate structure, and a memory chip. The first substrate structure includes a pixel region having a photoelectric conversion element. The second substrate structure includes a first surface connected to the first substrate structure and a second surface opposite the first surface, and also includes a circuit region to drive the pixel region. The memory chip is mounted on the second surface of the second substrate structure. The first substrate structure and the second substrate structure are electrically connected by first connection vias passing through the first substrate structure. The second substrate structure and the memory chip are electrically connected by second connection vias passing through a portion of the second substrate structure. The first connection vias and the second connection vias are at different positions on a plane.