Patents by Inventor Sung-IL Cho

Sung-IL Cho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11937502
    Abstract: A condensed cyclic compound and an organic light-emitting device including the condensed cyclic compound are provided. The condensed cyclic compound is represented by Formula 1. The A3 ring of Formula 1 is a group represented by Formula 2A or a group represented by Formula 2B. The organic light-emitting device includes: a first electrode; a second electrode; and an organic layer between the first electrode and the second electrode and including an emission layer, the organic layer including at least one of the condensed cyclic compound represented by Formula 1.
    Type: Grant
    Filed: April 13, 2016
    Date of Patent: March 19, 2024
    Assignees: Samsung Display Co., Ltd., Research & Business Foundation Sungkyunkwan University
    Inventors: Sung-Wook Kim, Myeong-Suk Kim, Hwan-Hee Cho, Sam-Il Kho, Seung-Soo Yoon, Changwoong Chu
  • Publication number: 20220392781
    Abstract: There is provided a semiconductor device capable of improving the performance and reliability of a device. The semiconductor wafer processing device comprising a chamber, and, a showerhead configured to supply a gas into the chamber, wherein the showerhead includes, a plate, a plurality of first spray hole groups in a first row from a center of the plate, and a second spray hole group in a second row outside the first row, wherein each of the first spray hole groups includes a plurality of first spray holes, and when L is an average value of distances from the center of the plate to each spray hole of each of the first spray hole groups, the number of first spray holes where a distance from the center of the plate is smaller than L is more than the number of first spray holes where the distance from the center of the plate is greater than L.
    Type: Application
    Filed: May 16, 2022
    Publication date: December 8, 2022
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Min Joon KIM, Jin Seok LEE, Bong Ju LEE, Tae Jong YU, Tae Sun SHIN, Sung Il CHO
  • Publication number: 20220017710
    Abstract: The present invention provides a polyimide film comprising inorganic fillers, the inorganic fillers comprising: a first filler group having a particle diameter (D50) falling within the range of 2-2.7 ?m; and a second filler group having an average particle diameter (D50) falling within the range of 1-1.7 ?m, wherein each of the first and second filler groups satisfies relational expression 1, 0.7?(D90?D10)/(D50)?1.2, with respect to the particle diameter.
    Type: Application
    Filed: March 26, 2019
    Publication date: January 20, 2022
    Applicant: PI Advanced Materials Co., Ltd.
    Inventors: Dong Young WON, Dong Young KIM, Sung Il CHO, Jeong Yeul CHOI
  • Patent number: 11035040
    Abstract: A showerhead according to an embodiment of the present inventive concept includes an upper plate including a plurality of gas supply passages, a lower plate including a plurality of supply holes and a plurality of exhaust slots formed in a lower surface, and a plurality of partition walls between the upper plate and the lower plate, connected to a plurality of exhaust slots and defining exhaust passages that are open at a side portion of the showerhead.
    Type: Grant
    Filed: November 1, 2018
    Date of Patent: June 15, 2021
    Inventors: Edward Sung, Jin Young Bang, Hyuk Kim, Sung Il Cho
  • Patent number: 10950419
    Abstract: Shrouds and substrate treating systems including the same are provided. Substrate treating systems may include a process chamber, a supporter, and a plasma source that is spaced apart from the supporter in a vertical direction. The substrate treating systems may also include a shroud configured to contain the plasma therein. The shroud may include a sidewall portion and a first flange portion extending horizontally from the sidewall portion and including a plurality of first slits that extend through a thickness of the first flange portion. The first flange portion may define a first opening, and a portion of the supporter may extend through the first opening. The sidewall portion may include a plurality of second slits, and each of the plurality of second slits may extend through a thickness of the sidewall portion and may extend from one of the plurality of first slits toward the plasma source.
    Type: Grant
    Filed: April 4, 2018
    Date of Patent: March 16, 2021
    Inventors: Edward Sung, Hyuk Kim, Daehyun Jang, Sung Il Cho
  • Patent number: 10870580
    Abstract: The present disclosure provides a polyimide film prepared from a precursor composition containing a polyamic acid and an organic solvent and having a value of (first FWHM?second FWHM)/(first FWHM+second FWHM) which is less than 0.4, a graphite sheet prepared from the polyimide film, and a method for preparing a graphite sheet.
    Type: Grant
    Filed: May 31, 2019
    Date of Patent: December 22, 2020
    Assignee: PI Advanced Materials Co., Ltd.
    Inventors: Dong Young Won, Kyung Su Kim, Sung Il Cho, Jeong Yeul Choi
  • Patent number: 10815338
    Abstract: The present invention relates to a polyimide film and a preparation method thereof. According to the present invention, a polyamic acid solution having a high weight-average molecular weight may be obtained by adjusting viscosity and solid content of the polyamic acid solution, and thus, a desired polyimide film may be prepared therefrom. Furthermore, since a length of carbon chains rearranged during graphitization is increased, a graphite sheet having excellent thermal conductivity can be prepared from the polyimide film of the present invention. Also, since the polyimide film has improved windability by further including inorganic particles as a filler, it may facilitate the wind operation.
    Type: Grant
    Filed: October 7, 2016
    Date of Patent: October 27, 2020
    Assignee: PI ADVANCED MATERIALS CO., LTD.
    Inventors: Sung-il Cho, Dong Young Won, Sung Won Kim
  • Patent number: 10790168
    Abstract: Provided are a plasma treatment apparatus and a method of fabricating semiconductor device using the same. The plasma treatment apparatus includes a chamber which provides a plasma treatment space, a bottom electrode disposed in the chamber and supports a wafer, a top electrode disposed in the chamber facing the bottom electrode, a source power source which supplies a source power output of a first frequency to the bottom electrode, a bias power source which supplies a bias power output of a second frequency different from the first frequency to the bottom electrode, and a pulse power source which applies a pulse voltage to the bottom electrode, wherein the bias power output is a bias voltage which is pulse-modulated to a first voltage level in a first time section and pulse-modulated to a second voltage level in a second time section and is applied to the bottom electrode.
    Type: Grant
    Filed: May 7, 2018
    Date of Patent: September 29, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seung Bo Shim, Hyuk Kim, Sun Taek Lim, Jae Myung Choe, Jeon Il Lee, Sung-Il Cho
  • Patent number: 10784244
    Abstract: A semiconductor package includes a package substrate, at least one first semiconductor chip on the package substrate and having a first height as measured from the package substrate, at least one second semiconductor chip on the package substrate spaced apart from the first semiconductor chip and having a second height less than the first height as measured from the package substrate, at least one third semiconductor chip stacked on the first and second semiconductor chips, and at least one support structure between the at least one second semiconductor chip and the at least one third semiconductor chip configured to support the at least one third semiconductor chip.
    Type: Grant
    Filed: November 1, 2018
    Date of Patent: September 22, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Won-Gil Han, Seung-Lo Lee, Yong-Je Lee, Sung-Il Cho
  • Patent number: 10741448
    Abstract: A method of fabricating a semiconductor package includes providing a substrate on a stage, the substrate including semiconductor dies and a modified layer along a partition lane and sequentially having an adhesive film and a base film on a surface thereof so that bottom surfaces of the adhesive film and the base film face the stage and top surfaces of the adhesive film and the base film face away from the stage and the bottom surface of the adhesive film faces the top surface of the base film; separating the semiconductor dies from each other by applying a force to the substrate in a lateral direction; applying a gas pressure to a top surface of each of the semiconductor dies; and irradiating ultraviolet rays toward the adhesive film after applying the gas pressure on the top surface of each of the semiconductor dies.
    Type: Grant
    Filed: March 11, 2019
    Date of Patent: August 11, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Byong-gook Jeong, Byung-ho Kim, Youn-jo Mun, Jeong-cheol An, Sung-il Cho, Dae-sang Chun, Man-hee Han
  • Publication number: 20190284054
    Abstract: The present disclosure provides a polyimide film prepared from a precursor composition containing a polyamic acid and an organic solvent and having a value of (first FWHM?second FWHM)/(first FWHM+second FWHM) which is less than 0.4, a graphite sheet prepared from the polyimide film, and a method for preparing a graphite sheet.
    Type: Application
    Filed: May 31, 2019
    Publication date: September 19, 2019
    Inventors: Dong Young WON, Kyung Su KIM, Sung Il CHO, Jeong Yeul CHOI
  • Publication number: 20190279904
    Abstract: A method of fabricating a semiconductor package includes providing a substrate on a stage, the substrate including semiconductor dies and a modified layer along a partition lane and sequentially having an adhesive film and a base film on a surface thereof so that bottom surfaces of the adhesive film and the base film face the stage and top surfaces of the adhesive film and the base film face away from the stage and the bottom surface of the adhesive film faces the top surface of the base film; separating the semiconductor dies from each other by applying a force to the substrate in a lateral direction; applying a gas pressure to a top surface of each of the semiconductor dies; and irradiating ultraviolet rays toward the adhesive film after applying the gas pressure on the top surface of each of the semiconductor dies.
    Type: Application
    Filed: March 11, 2019
    Publication date: September 12, 2019
    Inventors: Byong-gook Jeong, Byung-ho Kim, Youn-jo Mun, Jeong-cheol An, Sung-il Cho, Dae-sang Chun, Man-hee Han
  • Patent number: 10410990
    Abstract: A jig for bonding a semiconductor chip may include a pressurizing portion and at least one opening. The pressuring portion may be configured to pressurize an upper surface of the semiconductor chip bonded to a package substrate via a bump and a flux using a laser. The opening may be surrounded by the pressurizing portion. The laser irradiated to the bump and the flux may be transmitted through the opening. A vapor generated from the flux by the laser may be discharged through the opening. Thus, the contamination of the jig caused by the vapor may be prevented so that a transmissivity of the laser through the jig may be maintained.
    Type: Grant
    Filed: March 28, 2018
    Date of Patent: September 10, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Man-Hee Han, Dae-Sang Chan, Sung-Il Cho, Jung-Lae Jung
  • Publication number: 20190259742
    Abstract: A semiconductor package includes a package substrate, at least one first semiconductor chip on the package substrate and having a first height as measured from the package substrate, at least one second semiconductor chip on the package substrate spaced apart from the first semiconductor chip and having a second height less than the first height as measured from the package substrate, at least one third semiconductor chip stacked on the first and second semiconductor chips, and at least one support structure between the at least one second semiconductor chip and the at least one third semiconductor chip configured to support the at least one third semiconductor chip.
    Type: Application
    Filed: November 1, 2018
    Publication date: August 22, 2019
    Inventors: Won-Gil Han, Seung-Lo Lee, Yong-je Lee, Sung-Il Cho
  • Publication number: 20190233293
    Abstract: The present disclosure provides a polyimide film prepared from a precursor composition containing a polyamic acid and an organic solvent and having a value of (first FWHM?second FWHM)/(first FWHM+second FWHM) which is less than 0.4, a graphite sheet prepared from the polyimide film, and a method for preparing a graphite sheet.
    Type: Application
    Filed: May 7, 2018
    Publication date: August 1, 2019
    Inventors: Dong Young WON, Kyung Su KIM, Sung Il CHO, Jeong Yeul CHOI
  • Patent number: 10351432
    Abstract: The present disclosure provides a polyimide film prepared from a precursor composition containing a polyamic acid and an organic solvent and having a value of (first FWHM?second FWHM)/(first FWHM+second FWHM) which is less than 0.4, a graphite sheet prepared from the polyimide film, and a method for preparing a graphite sheet.
    Type: Grant
    Filed: May 7, 2018
    Date of Patent: July 16, 2019
    Assignee: SKCKOLONPI INC.
    Inventors: Dong Young Won, Kyung Su Kim, Sung Il Cho, Jeong Yeul Choi
  • Patent number: 10319864
    Abstract: A vertical memory device and a method of manufacturing such device are provided. The vertical memory device may include a plurality of gate electrode layers stacked in a cell region of a semiconductor substrate; a plurality of upper isolation insulating layers dividing an uppermost gate electrode layer among the plurality of gate electrode layers, extending in a first direction; a plurality of vertical holes arranged to have any two adjacent vertical holes to have a uniform distance from each other throughout the cell region and including a plurality of channel holes penetrating through the plurality of gate electrode layers disposed between the plurality of upper isolation insulating layers and a plurality of first support holes penetrating through the plurality of upper insulating layers; a plurality of channel structures disposed in the plurality of channel holes; and a plurality of first support structures disposed in the plurality of first support holes.
    Type: Grant
    Filed: December 20, 2017
    Date of Patent: June 11, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hyuk Kim, Dae Hyun Jang, Seung Pil Chung, Sung Il Cho
  • Publication number: 20190122903
    Abstract: Provided are a plasma treatment apparatus and a method of fabricating semiconductor device using the same. The plasma treatment apparatus includes a chamber which provides a plasma treatment space, a bottom electrode disposed in the chamber and supports a wafer, a top electrode disposed in the chamber facing the bottom electrode, a source power source which supplies a source power output of a first frequency to the bottom electrode, a bias power source which supplies a bias power output of a second frequency different from the first frequency to the bottom electrode, and a pulse power source which applies a pulse voltage to the bottom electrode, wherein the bias power output is a bias voltage which is pulse-modulated to a first voltage level in a first time section and pulse-modulated to a second voltage level in a second time section and is applied to the bottom electrode.
    Type: Application
    Filed: May 7, 2018
    Publication date: April 25, 2019
    Inventors: SEUNG BO SHIM, HYUK KIM, SUN TAEK LIM, JAE MYUNG CHOE, JEON IL LEE, SUNG-IL CHO
  • Publication number: 20190103376
    Abstract: A jig for bonding a semiconductor chip may include a pressurizing portion and at least one opening. The pressuring portion may be configured to pressurize an upper surface of the semiconductor chip bonded to a package substrate via a bump and a flux using a laser. The opening may be surrounded by the pressurizing portion. The laser irradiated to the bump and the flux may be transmitted through the opening. A vapor generated from the flux by the laser may be discharged through the opening. Thus, the contamination of the jig caused by the vapor may be prevented so that a transmissivity of the laser through the jig may be maintained.
    Type: Application
    Filed: March 28, 2018
    Publication date: April 4, 2019
    Inventors: Man-Hee Han, Dae-Sang Chan, Sung-il Cho, Jung-Lae Jung
  • Publication number: 20180374961
    Abstract: A vertical memory device and a method of manufacturing such device are provided. The vertical memory device may include a plurality of gate electrode layers stacked in a cell region of a semiconductor substrate; a plurality of upper isolation insulating layers dividing an uppermost gate electrode layer among the plurality of gate electrode layers, extending in a first direction; a plurality of vertical holes arranged to have any two adjacent vertical holes to have a uniform distance from each other throughout the cell region and including a plurality of channel holes penetrating through the plurality of gate electrode layers disposed between the plurality of upper isolation insulating layers and a plurality of first support holes penetrating through the plurality of upper insulating layers; a plurality of channel structures disposed in the plurality of channel holes; and a plurality of first support structures disposed in the plurality of first support holes.
    Type: Application
    Filed: December 20, 2017
    Publication date: December 27, 2018
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hyuk KIM, Dae Hyun JANG, Seung Pil CHUNG, Sung Il CHO