Patents by Inventor Sung-Joo Park

Sung-Joo Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8036011
    Abstract: A memory module includes a plurality of buses and a plurality of memory chips arranged close to each other along each of the plurality of buses. An N-th memory chip, where N is an integer, of the plurality of memory chips is connected to any one of the plurality of buses, and each of the other memory chips of the plurality of memory chips, except for the N-th memory chip, is connected to the other one of the plurality of buses.
    Type: Grant
    Filed: November 18, 2009
    Date of Patent: October 11, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyoung Sun Kim, Do Hyung Kim, Sung Joo Park, Baek Kyu Choi
  • Patent number: 8036051
    Abstract: A semiconductor memory device and a semiconductor memory system. The semiconductor memory device includes channels configured to transmit signals from a transmitter to a receiver, and a crosstalk compensator. The crosstalk compensator may be connected between the channels to compensate for crosstalk. The crosstalk compensator may comprise a capacitor connected in parallel between the channels, and a switching unit connected between the capacitor and one of the channels. The switching unit may control connections or disconnections between the capacitor and the channel. Therefore, the semiconductor memory device and the semiconductor memory system compensate for crosstalk occurring between transmitted signals that are out of phase with each other.
    Type: Grant
    Filed: January 16, 2009
    Date of Patent: October 11, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-Joo Park, Jae-Jun Lee
  • Publication number: 20110163418
    Abstract: A structure of an integrated circuit module includes a wiring board, a plurality of integrated circuits and at least one terminating resistance circuit. The wiring board has a mounting region on at least one surface thereof. The plurality of integrated circuits are mounted in the mounting region of the wiring board and spaced from one another in a first direction. The at least one terminating resistance circuit is arranged between at least two adjacent integrated circuits, and coupled to an output of a last of the plurality of integrated circuits.
    Type: Application
    Filed: March 4, 2011
    Publication date: July 7, 2011
    Inventors: Sung-Joo Park, Ki-Hyun Ko, Young Yun, Soo-Kyung Kim
  • Publication number: 20110165736
    Abstract: A structure of an integrated circuit module includes a wiring board, a plurality of integrated circuits and at least one terminating resistance circuit. The wiring board has a mounting region on at least one surface thereof. The plurality of integrated circuits are mounted in the mounting region of the wiring board and spaced from one another in a first direction. The at least one terminating resistance circuit is arranged between at least two adjacent integrated circuits, and coupled to an output of a last of the plurality of integrated circuits.
    Type: Application
    Filed: March 4, 2011
    Publication date: July 7, 2011
    Inventors: Sung-Joo Park, Ki-Hyun Ko, Young Yun, Soo-Kyung Kim
  • Patent number: 7919841
    Abstract: A structure of an integrated circuit module includes a wiring board, a plurality of integrated circuits and at least one terminating resistance circuit. The wiring board has a mounting region on at least one surface thereof. The plurality of integrated circuits are mounted in the mounting region of the wiring board and spaced from one another in a first direction. The at least one terminating resistance circuit is arranged between at least two adjacent integrated circuits, and coupled to an output of a last of the plurality of integrated circuits.
    Type: Grant
    Filed: January 22, 2008
    Date of Patent: April 5, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-Joo Park, Ki-Hyun Ko, Young Yun, Soo-Kyung Kim
  • Patent number: 7859879
    Abstract: A memory module, includes a memory module board and a plurality of memory devices on the memory module board. The memory module board includes one or more first input terminals configured to receive first signals to individually control the memory devices, and one or more second input terminals configured to receive second signals to commonly control the memory devices. Each of the memory devices includes a plurality of first signal input units configured to receive the first signals through one or more first input pins, a plurality of second signal input units configured to receive the second signals through one or more second input pins, and a plurality of dummy units, the dummy units being respectively connected to the first signal input units in parallel, and being configured to receive the first signals through one or more third input pins and to compensate for a signal line load.
    Type: Grant
    Filed: November 24, 2008
    Date of Patent: December 28, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-Joo Park, Kyoung-Sun Kim, Young-Ho Lee, Jea-Eun Lee
  • Patent number: 7799605
    Abstract: A method of forming an integrated circuit module may include interposing an auxiliary PCB between at least one semiconductor chip and a main PCB, the auxiliary PCB having at least one circuit pattern for electrical connection to one of the semiconductor chip and at least one circuit pattern formed on the main PCB.
    Type: Grant
    Filed: July 26, 2007
    Date of Patent: September 21, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-Joo Park, Kyoung-Sun Kim, Jung-Joon Lee, Jea-Eun Lee
  • Publication number: 20100177492
    Abstract: A memory system includes; a main board having memory bus with a wiring line communicating a signal from a memory controller mounted on the main board, first and second module sockets mounted on the main board and connecting the wiring line to first and second memory modules respectively inserted into the first and second module sockets, where the first memory module includes a first electrode connected to the wiring line and the second memory module includes a second electrode connected to the wiring line, and first and second stub resistors disposed on the main board and arranged as primary dual-branching stub resistors forming a T-branch connection structure between the first and second electrodes and a branching node connected to the wiring line.
    Type: Application
    Filed: December 8, 2009
    Publication date: July 15, 2010
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sung-Joo PARK, Ki-Hyun KO, Myung-Hee SUNG, Soo-Kyung KIM
  • Publication number: 20100125693
    Abstract: A memory module includes a plurality of buses and a plurality of memory chips arranged close to each other along each of the plurality of buses. An N-th memory chip, where N is an integer, of the plurality of memory chips is connected to any one of the plurality of buses, and each of the other memory chips of the plurality of memory chips, except for the N-th memory chip, is connected to the other one of the plurality of buses.
    Type: Application
    Filed: November 18, 2009
    Publication date: May 20, 2010
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Kyoung Sun Kim, Do Hyung Kim, Sung Joo Park, Baek Kyu Choi
  • Patent number: 7652949
    Abstract: A memory module includes a first memory group including a plurality of memory devices, a second memory group including a less number of memory devices with respect to the memory devices in the first memory group, a register configured to provide a command/address signal to the first memory group and a delayed command/address signal to the second memory group, a first signal line configured to transfer the command/address signal to the first memory group, and a second signal line configured to transfer the delayed command/address signal to the second memory group.
    Type: Grant
    Filed: December 4, 2006
    Date of Patent: January 26, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chil-Nam Yoon, Young-Man Ahn, Young-Jun Park, Sung-Joo Park
  • Publication number: 20090209134
    Abstract: A memory module socket disposed on a principal surface of a mainboard, and adapted to mechanically receive and electrically connect a memory module with a mainboard, the memory module socket including a first unit socket having a plurality of first socket pins adapted to electrically connect a first connector disposed on an edge of the memory module, and a second unit socket having a plurality of second socket pins adapted to electrically connect to a second connector disposed on the memory module orthogonal to the first connector, wherein the memory module as installed in the memory module socket is parallel to the principal surface of the mainboard.
    Type: Application
    Filed: April 23, 2009
    Publication date: August 20, 2009
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sung-Joo PARK, Kyoung-Sun KIM, Jung-Joon LEE, Jea-Eun LEE
  • Publication number: 20090190421
    Abstract: A semiconductor memory device and a semiconductor memory system. The semiconductor memory device includes channels configured to transmit signals from a transmitter to a receiver, and a crosstalk compensator. The crosstalk compensator may be connected between the channels to compensate for crosstalk. The crosstalk compensator may comprise a capacitor connected in parallel between the channels, and a switching unit connected between the capacitor and one of the channels. The switching unit may control connections or disconnections between the capacitor and the channel. Therefore, the semiconductor memory device and the semiconductor memory system compensate for crosstalk occurring between transmitted signals that are out of phase with each other.
    Type: Application
    Filed: January 16, 2009
    Publication date: July 30, 2009
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Sung-Joo PARK, Jae-Jun LEE
  • Publication number: 20090154212
    Abstract: A memory module, includes a memory module board and a plurality of memory devices on the memory module board. The memory module board includes one or more first input terminals configured to receive first signals to individually control the memory devices, and one or more second input terminals configured to receive second signals to commonly control the memory devices. Each of the memory devices includes a plurality of first signal input units configured to receive the first signals through one or more first input pins, a plurality of second signal input units configured to receive the second signals through one or more second input pins, and a plurality of dummy units, the dummy units being respectively connected to the first signal input units in parallel, and being configured to receive the first signals through one or more third input pins and to compensate for a signal line load.
    Type: Application
    Filed: November 24, 2008
    Publication date: June 18, 2009
    Inventors: Sung-Joo Park, Kyoung-Sun Kim, Young-Ho Lee, Jea-Eun Lee
  • Patent number: 7540743
    Abstract: A memory module socket disposed on a principal surface of a mainboard, and adapted to mechanically receive and electrically connect a memory module with a mainboard, the memory module socket including a first unit socket having a plurality of first socket pins adapted to electrically connect a first connector disposed on an edge of the memory module, and a second unit socket having a plurality of second socket pins adapted to electrically connect to a second connector disposed on the memory module orthogonal to the first connector, wherein the memory module as installed in the memory module socket is parallel to the principal surface of the mainboard.
    Type: Grant
    Filed: August 9, 2007
    Date of Patent: June 2, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-Joo Park, Kyoung-Sun Kim, Jung-Joon Lee, Jea-Eun Lee
  • Publication number: 20090034327
    Abstract: The invention provides a thermal-emitting memory module, a thermal-emitting module socket, and a computer system comprising the thermal-emitting memory module and the thermal-emitting module socket. An embodiment of the thermal-emitting module includes: a module substrate having electrically-conductive traces; and a semiconductor device disposed on the module substrate and coupled to the electrically-conductive traces, the module substrate including a thermal-emitting component disposed in proximity of the semiconductor device without directly contacting the semiconductor device.
    Type: Application
    Filed: July 29, 2008
    Publication date: February 5, 2009
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Young YUN, Soo-Kyung KIM, Kwang-Seop KIM, Ki-Hyun KO, Sung-Joo PARK
  • Publication number: 20080179649
    Abstract: A structure of an integrated circuit module includes a wiring board, a plurality of integrated circuits and at least one terminating resistance circuit. The wiring board has a mounting region on at least one surface thereof. The plurality of integrated circuits are mounted in the mounting region of the wiring board and spaced from one another in a first direction. The at least one terminating resistance circuit is arranged between at least two adjacent integrated circuits, and coupled to an output of a last of the plurality of integrated circuits.
    Type: Application
    Filed: January 22, 2008
    Publication date: July 31, 2008
    Inventors: Sung-Joo Park, Ki-Hyun Ko, Young Yun, Soo-Kyung Kim
  • Patent number: 7394977
    Abstract: The present invention relates to a apparatus and method for generating 3-dimensional image, which comprises a image photographing part composed of a camera part, a turn table part, a photographing angle adjustment part, a X-axis adjustment part, and a Y-axis adjustment part; a image photographing control part that creates movement control signals, transmits to said image photographing part, and receives plural digital images photographed by said camera part; a 3-dimensional image generating part that creates 3 dimensional images by using said plural digital images; and a storage part that stores said plural digital images and said 3-dimensional images. The present invention thus provides 3-dimensional images to consumers to see a certain product with its actual view by rotating at a wanted angle.
    Type: Grant
    Filed: October 6, 2004
    Date of Patent: July 1, 2008
    Assignee: Openvr Co., Ltd.
    Inventors: Sung-Joo Park, Se-Yern Oh
  • Publication number: 20080038961
    Abstract: A memory module socket disposed on a principal surface of a mainboard, and adapted to mechanically receive and electrically connect a memory module with a mainboard, the memory module socket including a first unit socket having a plurality of first socket pins adapted to electrically connect a first connector disposed on an edge of the memory module, and a second unit socket having a plurality of second socket pins adapted to electrically connect to a second connector disposed on the memory module orthogonal to the first connector, wherein the memory module as installed in the memory module socket is parallel to the principal surface of the mainboard.
    Type: Application
    Filed: August 9, 2007
    Publication date: February 14, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sung-Joo PARK, Kyoung-Sun KIM, Jung-Joon LEE, Jea-Eun LEE
  • Publication number: 20080030943
    Abstract: Embodiments of the invention provide memory module having an improved arrangement of discrete devices. In one embodiment, the invention provides a memory module comprising a board; a plurality of tabs disposed adjacent to a first edge of the board and disposed on a first surface of the board; and a memory pad region disposed on the first surface and comprising memory chip pads, wherein each memory chip pad is electrically connected to at least one of the tabs. The memory module further comprises discrete devices corresponding to the memory pad region, wherein the discrete devices corresponding to the memory pad region are disposed on only one side of the memory pad region. In the memory module, each of the discrete devices is electrically connected to at least one of the tabs and at least one of the memory chip pads.
    Type: Application
    Filed: February 21, 2007
    Publication date: February 7, 2008
    Inventors: Kyoung-sun Kim, Sung-joo Park, Jung-joon Lee, Jea-eun Lee
  • Publication number: 20080023702
    Abstract: A method of forming an integrated circuit module may include interposing an auxiliary PCB between at least one semiconductor chip and a main PCB, the auxiliary PCB having at least one circuit pattern for electrical connection to one of the semiconductor chip and at least one circuit pattern formed on the main PCB.
    Type: Application
    Filed: July 26, 2007
    Publication date: January 31, 2008
    Inventors: Sung-Joo Park, Kyoung-Sun Kim, Jung-Joon Lee, Jea-Eun Lee