Patents by Inventor Sung-keun Park
Sung-keun Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20190131139Abstract: A method of generating a layout and manufacturing a semiconductor device, including receiving a design layout of a semiconductor device including active fins; extracting a design rule of the active fins from the design layout; forming fin lines overlapping the active fins such that the fin lines have a length that is greater than a length of the active fins, wherein the fin lines continuously extend from a position adjacent to one edge of a layout region of the semiconductor device toward another edge, and are formed in an entirety of the layout region of the semiconductor device; forming a mandrel pattern layout in an entirety of the layout region of the semiconductor device, using the fin lines; and forming a cut pattern layout in the entirety of the layout region of the semiconductor device, using the active fins.Type: ApplicationFiled: May 21, 2018Publication date: May 2, 2019Inventors: In Wook OH, Dong Hyun KIM, Byung Sung KIM, Sung Keun PARK, Ho Jun CHOI
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Patent number: 10216082Abstract: According to example embodiments of inventive concepts, a layout design system includes a processor, a storage unit configured to store a layout design, and a stitch module. The layout design includes a first pattern group and a second pattern group disposed in accordance with a design. The first pattern group including a first pattern for patterning at a first time. The second pattern group including a second pattern for patterning at a second time that is different than the first time. The stitch module is configured to detect an iso-pattern of the second pattern using the processor. The stitch module is configured to repetitively designate at least one of the first pattern, which is spaced apart from the iso-pattern by a pitch or more, to the second pattern group using the processor.Type: GrantFiled: January 20, 2016Date of Patent: February 26, 2019Assignee: Samsung Electronics Co., Ltd.Inventors: Dae-kwon Kang, Ji-Young Jung, Dong-Gyun Kim, Jae-Seok Yang, Sung-Keun Park, Young-Gook Park
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Publication number: 20190051600Abstract: A semiconductor device includes a plurality of main contact plugs and a plurality of dummy contact plugs which pass through an insulating layer on a substrate. A plurality of upper interconnections is on the insulating layer. The plurality of dummy contact plugs include a first dummy contact plug. The plurality of upper interconnections include a first upper interconnection overlapping the first dummy contact plug. A vertical central axis of the first dummy contact plug is located outside the first upper interconnection.Type: ApplicationFiled: January 17, 2018Publication date: February 14, 2019Applicant: Samsung Electronics Co., Ltd.Inventors: In Wook OH, Dong Hyun KIM, Doo Hwan PARK, Sung Keun PARK, Chul Hong PARK, Sung Wook HWANG
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Publication number: 20170355812Abstract: This invention relates to a thermoplastic elastomer resin composition for a moisture-permeable waterproof film, including a thermoplastic elastomer resin composed of a hard segment containing polybutylene terephthalate and a soft segment containing polyethylene glycol and polytetramethylene glycol, wherein the polyethylene glycol is contained in an amount of 30 to 70 wt % and the polytetramethylene glycol is contained in an amount of 1 to 10 wt %, based on the total weight of the thermoplastic elastomer resin. A moisture-permeable waterproof film formed of the elastomer composition and a moisture-permeable waterproof fabric configured such that the moisture-permeable waterproof film is stacked on at least one surface of a substrate fiber are also disclosed.Type: ApplicationFiled: December 31, 2015Publication date: December 14, 2017Inventors: Yu In JUNG, Yu Hyun KIM, Ji Yong PARK, Sung Keun PARK, Gun Min LEE, Sang Hyun MOON
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Publication number: 20160306914Abstract: According to example embodiments of inventive concepts, a layout design system includes a processor, a storage unit configured to store a layout design, and a stitch module. The layout design includes a first pattern group and a second pattern group disposed in accordance with a design. The first pattern group including a first pattern for patterning at a first time. The second pattern group including a second pattern for patterning at a second time that is different than the first time. The stitch module is configured to detect an iso-pattern of the second pattern using the processor. The stitch module is configured to repetitively designate at least one of the first pattern, which is spaced apart from the iso-pattern by a pitch or more, to the second pattern group using the processor.Type: ApplicationFiled: January 20, 2016Publication date: October 20, 2016Inventors: Dae-kwon KANG, Ji-Young JUNG, Dong-Gyun KIM, Jae-Seok YANG, Sung-Keun PARK, Young-Gook PARK
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Patent number: 9422644Abstract: The present invention relates to a poly-ether-ester elastomer resin composition and elastic monofilaments prepared therefrom, and more specifically to a thermoplastic poly-ether-ester elastomer resin composition and elastic monofilaments prepared therefrom, wherein the thermoplastic poly-ether-ester elastomer resin composition is prepared from a poly-ether-ester block copolymer, a heat stabilizer, a UV absorber, a hindered amine light stabilizer, and porous silica, thereby ensuring excellent perceived quality, spinnability and weavability.Type: GrantFiled: August 18, 2011Date of Patent: August 23, 2016Assignee: KOLON PLASTICS, INC.Inventors: Sung Keun Park, Eun Ha Park, Nam Ku Moon, Tae Hwan Son
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Patent number: 9107313Abstract: Disclosed herein are a hybrid heat-radiating substrate including a metal core layer; an oxide insulating core layer that is formed in a thickness direction of the metal core layer to have a shape where the oxide insulating core layer is integrally formed with the metal core layer, an oxide insulating layer that is formed on one surface or both surfaces of the metal core layer, and a circuit layer that is configured to include first circuit patterns formed on the oxide insulating core layer and second circuit patterns formed on the oxide insulating layer, and a method of manufacturing the same.Type: GrantFiled: December 18, 2013Date of Patent: August 11, 2015Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Chang Hyun Lim, Jung Eun Kang, Heung Soo Park, Seog Moon Choi, Kwang Soo Kim, Joon Seok Chae, Sung Keun Park
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Publication number: 20150187726Abstract: There are provided a semiconductor package and a method for manufacturing the same. The semiconductor package according to an exemplary embodiment of the present disclosure includes: a board on which an insulating layer and a plurality of circuit patterns are formed; first bonding parts formed on portions of an upper portion of the circuit pattern; second bonding parts formed on portions of the upper portion of the circuit pattern; a first semiconductor device mounted on the board; a first connecting member of electrically connecting the first bonding part and the first semiconductor device to each other; a second connecting member having one surface bonded to the second bonding part and the other end exposed to the outside; and an oxide film formed on the remaining portions except for the first bonding part and the second bonding part.Type: ApplicationFiled: December 24, 2014Publication date: July 2, 2015Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Sung Keun PARK, Jun Woo Myung, Sung Min Song
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Patent number: 8941220Abstract: Disclosed herein is a power module package, including: a first substrate having first semiconductor chips mounted thereon; and a second substrate having second semiconductor chips mounted thereon, the second substrate being coupled with the first substrate such that a side surface in a thickness direction thereof is disposed on an upper surface of the first substrate.Type: GrantFiled: May 30, 2012Date of Patent: January 27, 2015Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Kwang Soo Kim, Young Ki Lee, Seog Moon Choi, Sung Keun Park
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Patent number: 8792239Abstract: Disclosed herein are a power module package and a method for manufacturing the same. The power module package includes: a base substrate made of a metal material; cooling channels formed to allow a cooling material to flow in an inner portion of the base substrate; an anodized layer formed on an outer surface of the base substrate; a metal layer formed on a first surface of the base substrate having the anodized layer and including circuits and connection pads; and semiconductor devices mounted on the metal layer.Type: GrantFiled: October 25, 2011Date of Patent: July 29, 2014Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Jin Suk Son, Kwang Soo Kim, Young Ki Lee, Sun Woo Yun, Sung Keun Park
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Publication number: 20140174940Abstract: Embodiments of the invention provide a heat-dissipating substrate and a fabricating method of the heat-dissipating substrate. According to various embodiments, the heat-dissipating substrate includes a plating layer divided by a first insulator formed in a division area. A metal plate is formed on an upper surface of the plating layer and filled with a second insulator at a position corresponding to the division area, with an anodized layer formed on a surface of the metal plate. A circuit layer is formed on the anodized layer which is formed on an upper surface of the metal plate. The heat-dissipating substrate and fabricating method thereof achieves thermal isolation by a first insulator formed in a division area and a second insulator.Type: ApplicationFiled: February 12, 2014Publication date: June 26, 2014Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Chang Hyun LIM, Seog Moon CHOI, Sang Hyun SHIN, Young Ki LEE, Sung Keun PARK
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Publication number: 20140096380Abstract: Disclosed herein are a hybrid heat-radiating substrate including a metal core layer; an oxide insulating core layer that is formed in a thickness direction of the metal core layer to have a shape where the oxide insulating core layer is integrally formed with the metal core layer, an oxide insulating layer that is formed on one surface or both surfaces of the metal core layer, and a circuit layer that is configured to include first circuit patterns formed on the oxide insulating core layer and second circuit patterns formed on the oxide insulating layer, and a method of manufacturing the same.Type: ApplicationFiled: December 18, 2013Publication date: April 10, 2014Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Chang Hyun LIM, Jung Eun KANG, Heung Soo PARK, Seog Moon CHOI, Kwang Soo KIM, Joon Seok CHAE, Sung Keun PARK
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Patent number: 8686295Abstract: Disclosed herein are a heat-dissipating substrate and a fabricating method thereof. The heat-dissipating substrate includes a plating layer divided by a first insulator formed in a division area. A metal plate is formed on an upper surface of the plating layer and filled with a second insulator at a position corresponding to the division area, with an anodized layer formed on a surface of the metal plate. A circuit layer is formed on the anodized layer which is formed on an upper surface of the metal plate. The heat-dissipating substrate and fabricating method thereof achieves thermal isolation by a first insulator formed in a division area and a second insulator.Type: GrantFiled: November 7, 2009Date of Patent: April 1, 2014Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Chang Hyun Lim, Seog Moon Choi, Sang Hyun Shin, Young Ki Lee, Sung Keun Park
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Publication number: 20140027049Abstract: There is provided a chip ejector including a fixing unit; and at least one or more conveying units disposed outwardly of the fixing unit, wherein the conveying units fall with a tape having one surface attached to upper portions of the conveying units, and separate a chip attached to the other surface of the tape therefrom.Type: ApplicationFiled: September 14, 2012Publication date: January 30, 2014Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Yong Hui JOO, Sung Keun PARK, Kyung Sun JWA, Jung Mi OH, Bum Sik JANG
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Publication number: 20140017481Abstract: The present invention relates to a poly-ether-ester elastomer resin composition and elastic monofilaments prepared therefrom, and more specifically to a thermoplastic poly-ether-ester elastomer resin composition and elastic monofilaments prepared therefrom, wherein the thermoplastic poly-ether-ester elastomer resin composition is prepared from a poly-ether-ester block copolymer, a heat stabilizer, a UV absorber, a hindered amine light stabilizer, and porous silica, thereby ensuring excellent perceived quality, spinnability and weavability.Type: ApplicationFiled: August 18, 2011Publication date: January 16, 2014Applicant: KOLON PLASTICS, INC.Inventors: Sung Keun Park, Eun Ha Park, Nam Ku Moon, Tae Hwan Son
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Patent number: 8603842Abstract: Disclosed is a package substrate for an optical element, which includes a base substrate, a first circuit layer formed on the base substrate and including a mounting portion, an optical element mounted on the mounting portion, one or more trenches formed into a predetermined pattern around the mounting portion by removing portions of the first circuit layer so that the first circuit layer and the optical element are electrically connected to each other, and a fluorescent resin material applied on an area defined by the trenches so as to cover the optical element, and in which such trenches are formed on the first circuit layer so that the optical element and the first circuit layer are electrically connected to each other, thus maintaining the shape of the fluorescent resin material and obviating the need to form a via under the optical element. A method of manufacturing the package substrate for an optical element is also provided.Type: GrantFiled: March 12, 2012Date of Patent: December 10, 2013Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Chang Hyun Lim, Seog Moon Choi, Sang Hyun Shin, Sung Keun Park, Young Ki Lee
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Patent number: 8558359Abstract: Disclosed herein is a semiconductor package, including: a substrate having a first surface and a second surface; at least one semiconductor device formed on the first surface of the substrate; first lead frames respectively formed at both sides of the first surface of the substrate; and second lead frames respectively formed at both sides of the second surface of the substrate, wherein the first lead frame and the second lead frame are spaced apart from each other by an isolation distance base.Type: GrantFiled: January 17, 2012Date of Patent: October 15, 2013Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Chang Hyun Lim, Chang Jae Heo, Young Ki Lee, Sung Keun Park
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Patent number: 8502374Abstract: Disclosed herein are a power module package and a method for manufacturing the same. The power module package includes: a base substrate having grooves formed between a plurality of semiconductor device mounting areas; semiconductor devices mounted on the semiconductor device mounting areas of the base substrate; and a molding formed on the base substrate and in inner portions of the grooves.Type: GrantFiled: October 25, 2011Date of Patent: August 6, 2013Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Kwang Soo Kim, Young Ki Lee, Sung Keun Park, Seog Moon Choi, Chang Hyun Lim
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Publication number: 20130105954Abstract: Disclosed herein is a semiconductor package, including: a substrate having a first surface and a second surface; at least one semiconductor device formed on the first surface of the substrate; first lead frames respectively formed at both sides of the first surface of the substrate; and second lead frames respectively formed at both sides of the second surface of the substrate, wherein the first lead frame and the second lead frame are spaced apart from each other by an isolation distance base.Type: ApplicationFiled: January 17, 2012Publication date: May 2, 2013Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Chang Hyun Lim, Chang Jae Heo, Young Ki Lee, Sung Keun Park
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Patent number: D726650Type: GrantFiled: August 30, 2013Date of Patent: April 14, 2015Assignee: Kahram Design Consulting Co., Ltd.Inventors: Sung Keun Park, Ho Gon Kim