Patents by Inventor Sung Kyu Kim

Sung Kyu Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12255126
    Abstract: There are provided a semiconductor and a method of fabricating the same. The semiconductor device may include a second semiconductor substrate directly bonded to a first semiconductor substrate. The first semiconductor substrate may include a first through via with an end portion protruding through a first top surface, the first top surface being a top surface of a first semiconductor substrate body, a liner extending to partially expose a side surface of the end portion of the first through via, and a first diffusion barrier layer. The liner may include a third top surface that is positioned at a lower height than a second top surface, the second top surface being a top surface of the end portion of the first through via and substantially equal to the first top surface. Alternatively, the liner may include a third surface positioned at a height that is lower than the second top surface and higher than the first top surface.
    Type: Grant
    Filed: March 8, 2022
    Date of Patent: March 18, 2025
    Assignee: SK hynix Inc.
    Inventors: Mi Seon Lee, Sung Kyu Kim, Jong Hoon Kim
  • Publication number: 20250084517
    Abstract: The present invention relates to a steel sheet for use in automobiles, etc., and to a steel sheet that has high strength and high formability and is superb in terms of spot weldability, and a manufacturing method therefor.
    Type: Application
    Filed: December 19, 2022
    Publication date: March 13, 2025
    Applicant: POSCO CO., LTD
    Inventors: Sung-Kyu Kim, Tae-Kyo Han, Jun-Ho Park, Kyoung-Rae Cho, Sang-Ho Han
  • Patent number: 12230661
    Abstract: Various aspects of the present disclosure provide a semiconductor device, for example comprising a finger print sensor, and a method for manufacturing thereof. Various aspects of the present disclosure may, for example, provide an ultra-slim finger print sensor having a thickness of 500 ?m or less that does not include a separate printed circuit board (PCB), and a method for manufacturing thereof.
    Type: Grant
    Filed: April 12, 2024
    Date of Patent: February 18, 2025
    Assignee: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Jin Young Kim, No Sun Park, Yoon Joo Kim, Seung Jae Lee, Se Woong Cha, Sung Kyu Kim, Ju Hoon Yoon
  • Patent number: 12221680
    Abstract: The cryogenic austenitic high-manganese steel having excellent corrosion resistance, according to one aspect of the present invention, comprises 0.2-0.5 wt % of C, 23-28 wt % of Mn, 0.05-0.5 wt % of Si, 0.03 wt % or less of P, 0.005 wt % or less of S, 0.5 wt % or less of Al, and 3-4 wt % of Cr, with the remainder being Fe and other unavoidable impurities, also comprises at least 95 area % of austenite as a microstructure, and has Cr concentration sections continuously formed within an area of 50 ?m in the thickness direction from the surface, wherein the Cr concentration sections comprise a high Cr concentration section having a relatively high concentration of Cr, and a low Cr concentration section having a relatively low concentration of Cr, and the high Cr concentration section may be distributed at 30 area % or less (but not 0%) relative to the whole surface area of the Cr sections.
    Type: Grant
    Filed: October 25, 2019
    Date of Patent: February 11, 2025
    Assignee: POSCO CO., LTD
    Inventors: Un-Hae Lee, Dong-Ho Lee, Sang-Deok Kang, Sung-Kyu Kim
  • Publication number: 20250022869
    Abstract: A method of manufacturing a semiconductor die stack structure includes: preparing a base die including a base die substrate and a base die inter-layer dielectric layer; forming a base die front-side bonding pad structure; preparing a bottom die having a bottom die substrate and bottom die through-electrode; forming a bottom die front-side bonding pad structure in the bottom die substrate; forming a base-bottom die stack structure where the bottom die front-side bonding pad structure is directly in contact with the base die front-side; forming a base die through-electrode vertically passing through the base die substrate and electrically connected to the base die front-side bonding pad structure; forming a base die back-side bump structure electrically connected to the base die through-electrode; stacking middle dies and a top die in the base-bottom die stack structure; and forming a bottom die back-side bump structure electrically connected to the bottom die through-electrode.
    Type: Application
    Filed: December 7, 2023
    Publication date: January 16, 2025
    Applicant: SK hynix Inc.
    Inventors: Sung Kyu KIM, Jong Yeon KIM, Ki Ill MOON, Sang Yong LEE, Gyu Jei LEE
  • Publication number: 20240401164
    Abstract: The present invention relates to steel suitable as a material for an automotive structural member and particularly, to a high-strength and thick steel sheet having a low yield ratio and high strength, excellent formability and collision resistance due to excellent hole expandability through improved ductility, and a method thereof.
    Type: Application
    Filed: September 21, 2022
    Publication date: December 5, 2024
    Applicant: POSCO CO., LTD
    Inventors: Kyoung-Rae Cho, Sung-Kyu Kim, Jun-Ho Park, Sang-Ho Han, Jeong-Hun Kim
  • Publication number: 20240395746
    Abstract: In an embodiment, a semiconductor die includes a substrate, an interlayer insulating layer under a front-side surface the substrate, a horizontal metal interconnection in the interlayer insulating layer, a front-side pad under a lower surface of the interlayer insulating layer, a front-side bump structure under a lower surface of the front-side pad, a through-electrode vertically passing through the substrate, a back-side insulating layer over the back-side surface of the substrate, a first back-side metal plate layer over the back-side insulating layer, a back-side passivation layer over the back-side insulating layer and covering the first back-side metal plate layer, and a back-side bump structure over the through-electrode and the back-side passivation layer.
    Type: Application
    Filed: October 30, 2023
    Publication date: November 28, 2024
    Applicant: SK hynix Inc.
    Inventors: Jae Jun LEE, Sung Kyu KIM, Jong Yeon KIM, Ki Ill MOON, Mi Seon LEE
  • Publication number: 20240347575
    Abstract: Various aspects of the present disclosure provide a semiconductor device, for example comprising a finger print sensor, and a method for manufacturing thereof. Various aspects of the present disclosure may, for example, provide an ultra-slim finger print sensor having a thickness of 500 ?m or less that does not include a separate printed circuit board (PCB), and a method for manufacturing thereof.
    Type: Application
    Filed: April 12, 2024
    Publication date: October 17, 2024
    Inventors: Jin Young Kim, No Sun Park, Yoon Joo Kim, Seung Jae Lee, Se Woong Cha, Sung Kyu Kim, Ju Hoon Yoon
  • Publication number: 20240287639
    Abstract: Provided is a steel suitable as a material for automobiles and, specifically, to a high-strength steel sheet having excellent hole expandability and ductility, and a manufacturing method therefor. The high-strength steel sheet of the present invention has a microstructure comprising a hard phase and a soft phase, wherein a martensite phase, which is the hard phase, is evenly distributed in a recrystallized ferrite matrix through optimized cold-rolling and annealing processes, and a nonequilibrium (quasi-equilibrium) ferrite phase is introduced at the interface between the hard phase and the soft phase so as to increase the crack resistance during processing.
    Type: Application
    Filed: June 22, 2022
    Publication date: August 29, 2024
    Inventors: Kyoung-Rae CHO, Sung-Kyu KIM, Jun-Ho PARK, Sang-Ho HAN
  • Publication number: 20240243084
    Abstract: A wafer level fan out semiconductor device and a manufacturing method thereof are provided. A first sealing part is formed on lateral surfaces of a semiconductor die. A plurality of redistribution layers are formed on surfaces of the semiconductor die and the first sealing part, and solder balls are attached to the redistribution layers. The solder balls are arrayed on the semiconductor die and the first sealing part. In addition, a second sealing part is formed on the semiconductor die, the first sealing part and lower portions of the solder balls. The solder balls are exposed to the outside through the second sealing part. Since the first sealing part and the second sealing part are formed of materials having thermal expansion coefficients which are the same as or similar to each other, warpage occurring to the wafer level fan out semiconductor device can be suppressed.
    Type: Application
    Filed: December 21, 2023
    Publication date: July 18, 2024
    Inventors: Boo Yang Jung, Jong Sik Paek, Choon Heung Lee, In Bae Park, Sang Won Kim, Sung Kyu Kim, Sang Gyu Lee
  • Patent number: 12040308
    Abstract: A method of manufacturing a semiconductor device includes forming a first through via surrounded by a liner in a first semiconductor substrate, first-recessing the semiconductor substrate to expose a first portion of the liner covering an end portion of the first through via, and forming a first diffusion barrier layer covering the first-recessed first semiconductor substrate and exposing a second portion of the liner. The method also includes removing the second portion of the liner and second-recessing the first diffusion barrier layer. The method further includes forming a second diffusion barrier layer that covers the second-recessed first diffusion barrier layer and a top portion of the liner from which the second portion is removed and exposes a top surface of the end portion of the first through via.
    Type: Grant
    Filed: March 29, 2022
    Date of Patent: July 16, 2024
    Assignee: SK hynix Inc.
    Inventors: Jin Woong Kim, Sung Kyu Kim
  • Publication number: 20240234255
    Abstract: A semiconductor chip may include: a body portion with a front surface and a rear surface; a pair of through electrodes penetrating the body portion; an insulating layer disposed over the rear surface of the body portion and the pair of through electrodes; and a rear connection electrode disposed over the insulating layer and connected simultaneously with the pair of through electrodes, wherein a distance between the pair of through electrodes is greater than twice a thickness of the insulating layer.
    Type: Application
    Filed: March 25, 2024
    Publication date: July 11, 2024
    Applicant: SK hynix Inc.
    Inventors: Ho Young SON, Sung Kyu KIM, Mi Seon LEE
  • Publication number: 20240186291
    Abstract: A semiconductor die stack structure includes a base die, a plurality of semiconductor die stack units, and bumps. Each of the plurality of semiconductor die stack units includes a lower semiconductor die and an upper semiconductor die. Each of the lower semiconductor die and the upper semiconductor die includes a body and a front-side pad structure. The front-side pad structure includes a front-side pad seed layer and a front-side pad pattern. The front-side pad pattern includes a first front-side pad portion, a second front-side pad portion, and a third front-side pad portion. The first front-side pad portion and the second front-side pad portion forms a staircase. The first front-side pad portion and the third front-side pad form a reverse staircase. The first front-side pad portion, the second front-side pad portion, and the third front-side pad include a same metal.
    Type: Application
    Filed: July 3, 2023
    Publication date: June 6, 2024
    Applicant: SK hynix Inc.
    Inventors: Sung Kyu KIM, Jong Yeon KIM, Song NA, Sang Hyuk LIM, Jong Oh KWON, Jin Woo PARK
  • Patent number: 11961867
    Abstract: Various aspects of the present disclosure provide a semiconductor device, for example comprising a finger print sensor, and a method for manufacturing thereof. Various aspects of the present disclosure may, for example, provide an ultra-slim finger print sensor having a thickness of 500 ?m or less that does not include a separate printed circuit board (PCB), and a method for manufacturing thereof.
    Type: Grant
    Filed: June 10, 2022
    Date of Patent: April 16, 2024
    Assignee: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Jin Young Kim, No Sun Park, Yoon Joo Kim, Seung Jae Lee, Se Woong Cha, Sung Kyu Kim, Ju Hoon Yoon
  • Patent number: 11946742
    Abstract: In an example, a display device includes a rollable display including a display side and an opposite non-display side. The rollable display includes a conductive material with a pattern disposed on the non-display side. The device includes a housing configured to house the rollable display and configured to roll in and roll out the rollable display along a first direction, and a capacitive sensor including a transmitter and a receiver electrode disposed within the housing and configured to sense the pattern.
    Type: Grant
    Filed: July 13, 2021
    Date of Patent: April 2, 2024
    Assignee: STMicroelectronics Asia Pacific Pte Ltd.
    Inventors: Tae-gil Kang, Sung Kyu Kim, Sa Hyang Hong, Chang Woo Lee
  • Publication number: 20240105652
    Abstract: A method of manufacturing a semiconductor device includes forming a first photoresist layer on a substrate and forming a second photoresist layer on the first photoresist layer. The method also includes forming a first dissolvable region having a first width in the first photoresist layer and a second dissolvable region having a second width different from the first width in the second photoresist layer by radiating exposure light to some parts of the second and first photoresist layer. The method further includes forming a second opening in the second photoresist layer and a first opening in the first photoresist layer by developing the second dissolvable region and the first dissolvable region. The method additionally includes forming a conductive bump that fills the first and second openings.
    Type: Application
    Filed: January 17, 2023
    Publication date: March 28, 2024
    Applicant: SK hynix Inc.
    Inventors: Dae Won KIM, Sung Kyu KIM
  • Publication number: 20240071874
    Abstract: A semiconductor chip may include: a body portion with a front surface and a rear surface; a pair of through electrodes penetrating the body portion; an insulating layer disposed over the rear surface of the body portion and the pair of through electrodes; and a rear connection electrode disposed over the insulating layer and connected simultaneously with the pair of through electrodes, wherein a distance between the pair of through electrodes is greater than twice a thickness of the insulating layer.
    Type: Application
    Filed: October 18, 2023
    Publication date: February 29, 2024
    Applicant: SK hynix Inc.
    Inventors: Ho Young SON, Sung Kyu KIM, Mi Seon LEE
  • Publication number: 20240026485
    Abstract: Provided are a high-strength steel sheet having excellent bendability and formability, and a method for manufacturing same. The steel sheet includes: 0.05 to 0.12% of carbon (C), 2.0 to 3.0% of manganese (Mn), 0.5% or less (excluding 0%) of silicon (Si), 1.0% or less (excluding 0%) of chromium (Cr), 0.1% or less (excluding 0%) of niobium (Nb), 0.1% or less (excluding 0%) of titanium (Ti), 0.0025% or less (excluding 0%) of boron (B), 0.02 to 0.05% of aluminum (sol.Al), 0.05% or less (excluding 0%) of phosphorus (P), 0.01% or less (excluding 0%) of sulfur (S), 0.01% or less (excluding 0%) of nitrogen (N), with a balance of Fe and inevitable impurities, and 35 to 50% of ferrite and 35 to 45% of bainite, and a balance of martensite, the ferrite comprising, by area fraction: 8 to 15% of non-recrystallized ferrite and 27 to 35% of recrystallized ferrite, as a microstructure.
    Type: Application
    Filed: November 22, 2021
    Publication date: January 25, 2024
    Inventors: Kyoung-Rae CHO, Hee-Su PARK, Hyun-Gyu HWANG, Sung-Kyu KIM, Chang-Hyo SEO
  • Patent number: 11873546
    Abstract: Provided according to one embodiment of the present invention are a non-magnetic steel material and a method for manufacturing the same. The steel material comprises 15-27 wt % of manganese, 0.1-1.1 wt % of carbon, 0.05-0.50 wt % of silicon, 0.03 wt % or less (0% exclusive) of phosphorus, 0.01 wt % or less (0% exclusive) of sulfur, 0.050 wt % or less (0% exclusive) of aluminum, 5 wt % or less (0% inclusive) of chromium, 0.01 wt % or less (0% inclusive) of boron, 0.1 wt % or less (0% exclusive) of nitrogen, and a balance amount of Fe and inevitable impurities, has an index of sensitivity of 3.4 or less, the index of sensitivity being represented by the following relational expression (1): [Relational expression 1]?0.451+34.131*P+111.152*Al?799.483*B+0.526*Cr?3.4 (wherein [P], [Al], [B] and [Cr] each mean a wt % of corresponding elements), and contains a microstructure with austenite at an area fraction of 95% or greater therein.
    Type: Grant
    Filed: March 9, 2021
    Date of Patent: January 16, 2024
    Assignee: POSCO CO., LTD
    Inventors: Un-Hae Lee, Sung-Kyu Kim, Soon-Gi Lee, Yong-Jin Kim, Hong-Yeol Oh
  • Patent number: 11855023
    Abstract: A wafer level fan out semiconductor device and a manufacturing method thereof are provided. A first sealing part is formed on lateral surfaces of a semiconductor die. A plurality of redistribution layers are formed on surfaces of the semiconductor die and the first sealing part, and solder balls are attached to the redistribution layers. The solder balls are arrayed on the semiconductor die and the first sealing part. In addition, a second sealing part is formed on the semiconductor die, the first sealing part and lower portions of the solder balls. The solder balls are exposed to the outside through the second sealing part. Since the first sealing part and the second sealing part are formed of materials having thermal expansion coefficients which are the same as or similar to each other, warpage occurring to the wafer level fan out semiconductor device can be suppressed.
    Type: Grant
    Filed: January 25, 2021
    Date of Patent: December 26, 2023
    Assignee: AMKOR TECHNOLOGY SINGAPORE HOLDING PTE. LTD.
    Inventors: Boo Yang Jung, Jong Sik Paek, Choon Heung Lee, In Bae Park, Sang Won Kim, Sung Kyu Kim, Sang Gyu Lee