Abstract: A liquid crystal display device includes a pixel electrode that includes a first central portion and a first stem portion and sequentially disposed on one side of a reference line extending in a first direction, and a second central portion and a second stem portion sequentially disposed on the other side, where the first stem portion extends at a first oblique angle in which a center line of a line width has a positive sign with respect to the first direction, the first central portion extends from one end of the first stem portion and has a shape in which a center line of the line width is inclined at a second oblique angle having a positive sign with respect to the first direction, and a line width of the first central portion is smaller than the line width of the first stem portion.

Abstract: A liquid crystal display includes a substrate, a plurality of signal lines, a gate driver, and a sealant. The substrate includes a display area and a peripheral area outside the display area. The signal lines are integrated with the substrate and include a clock signal line. The gate driver includes a stage located between the clock signal line and the display area. The stage is integrated with the substrate and is configured to apply a gate voltage to the display area. The sealant is distributed over part of the peripheral area. A seal region where the sealant is distributed includes a seal line, and the clock signal line is located within the seal line. The clock signal line is located further away from the stage than the other signal lines.

Abstract: A thin film transistor array panel includes: a data line which extends in a column direction and transfers a data voltage; a first pixel electrode and a second pixel electrode connected to the data line and adjacent in a row direction; a first thin film transistor connected to the first pixel electrode and the data line, and including a first source electrode and a first drain electrode; and a second thin film transistor connected to the second pixel electrode and the data line, and including a second source electrode and a second drain electrode. The first pixel electrode is at the right of the data line, the second pixel electrode is at the left of the data line, and relative positions of the first source electrode and the first drain electrode are the same as relative positions of the second source electrode and the second drain electrode.

Abstract: A gate driver includes multiple stages. Each stage has a circuit portion and a wiring portion. The wiring portion delivers first and second clock signals to the circuit portion. Further, the wiring portion includes first and second clock wirings receiving the first and second clock signal, respectively, first connecting wirings electrically connecting the first clock wiring with a first every other stage, and second connecting wirings electrically connecting the second clock wiring with the odd-numbered stages. Further, the wiring portion includes third connecting wirings electrically connecting the first connecting wiring with a second every other stage and fourth connecting wirings electrically connecting the second connecting wiring with the even-numbered stages. This configuration may prevent the gate driver from operating erroneously and reduce power consumed by the gate driver.

Abstract: A display device may include a pixel electrode, a transistor, a first gate line, a second gate line, and a third gate line. The transistor may be electrically connected to the pixel electrode. The first gate line may be electrically connected to the transistor. The second gate line may extend not parallel to the first gate line. The third gate line may overlap the pixel electrode and may extend not parallel to the first gate line. The second gate line or the third gate line may be electrically connected to the first gate line. The pixel electrode may be partially positioned between the second gate line and the third gate line in a plan view of the display device.

Abstract: Provided is a gate driver including a plurality of stages respectively transferring gate-on voltages to a plurality of gate lines. The stage includes a pull-up driver including a first transistor, the first transistor having a control terminal connected to a first node, an output terminal connected to a output terminal of a present stage and an input terminal connected to a first clock terminal, a first node pull-down portion including a second transistor, the second transistor having an input terminal connected to a buffer node, an output terminal connected to the first node and a control terminal connected to a second node, and a buffer node stabilizer including a third transistor, the third transistor having an input terminal and a control terminal connected to the first node, and an output terminal connected to the buffer node.

Abstract: Exemplary embodiments of the present disclosure provide a thin film transistor array panel including a first insulating substrate; a gate line and a data line disposed on the first insulating substrate, intersecting with each other, and being insulated from each other; a first passivation layer disposed on the gate line and the data line and comprising a plurality of first openings; a first electrode disposed on the first passivation layer; and a second electrode disposed in the first opening, thereby simplifying a manufacturing process of the thin film transistor array panel.

Abstract: A liquid crystal display includes a plurality of pixel electrodes and common electrodes disposed on a first substrate that overlap each other with a passivation layer interposed therebetween, and a connection portion disposed between a common voltage applying unit and the common electrode. The common electrode has a plurality of first cutouts, the passivation layer has a plurality of second cutouts, and the first cutout and the second cutout have substantially the same planar shape. The connection portion includes a lower connection portion formed from a same layer as the common electrode, and an upper connection portion disposed on the lower connection portion that includes a low resistance metal.

Abstract: A thin film transistor array panel includes a first insulation substrate, a gate line and a data line which are positioned on the first insulation substrate, are insulated from each other, and cross each other, a thin film transistor connected to the gate line and the data line, an organic film positioned on the thin film transistor, a second passivation layer which is positioned on the organic film and defines a plurality of second openings therein, a common electrode positioned on the second passivation layer, and a pixel electrode positioned in the plurality of second openings, where a thickness of the common electrode is larger than a thickness of the pixel electrode.

Abstract: A display device includes a pixel matrix having pixel rows and pixel columns and including pixels having switching elements positioned alternately at a corner near an upper and a lower side of each pixel row and positioned alternately at a corner near an upper and a lower side of and alternately at a corner near a left and a right side of each pixel column; multiple pairs of gate lines transmitting a gate-on voltage; and multiple data lines transmitting data voltages, wherein each pair of gate lines are disposed at the upper and lower sides of each pixel row with the pixels in each row connected to the gate line positioned nearest the respective switching element, and each data line is disposed between adjacent pairs of pixel columns and connected to pairs of pixels where one pixel of the pair has a switching element positioned nearest the respective data line.

Abstract: A liquid crystal display includes: a first substrate, on which pixel regions are defined; a second substrate opposite to the first substrate; a liquid crystal layer between the first and second substrates; gate and data lines on the first substrate and intersecting each other; pixel electrodes on the first substrate in the pixel regions, respectively; and green, blue and red color filters on the second substrate, where the pixel electrodes include first, second and third pixel electrodes, which correspond to the green, blue and red color filters, respectively, each of the first, second and third pixel electrodes includes a stem portion, which is near one of the data lines and extends in an extending direction of the data lines, and branch portions, which are branched off from the stem portion, and the stem portion of the first pixel electrode is near a side of the second pixel electrode.

Abstract: A display apparatus includes: a plurality of pixel blocks, each pixel block of the plurality of pixel blocks including a first pixel electrode connected to a first switching element and a second pixel electrode connected to a second switching element; gate lines which extend along a first direction and include a first gate line connected to the first switching element and a second gate line connected to the second switching element; and data lines which extend along a second direction intersecting the first direction. A gate voltage is applied to the first gate line before the second gate line, and the first pixel electrode of each of the pixel blocks displays a same color.

Abstract: A display device includes a pixel matrix having pixel rows and pixel columns and including pixels having switching elements positioned alternately at a corner near an upper and a lower side of each pixel row and positioned alternately at a corner near an upper and a lower side of and alternately at a corner near a left and a right side of each pixel column; multiple pairs of gate lines transmitting a gate-on voltage; and multiple data lines transmitting data voltages, wherein each pair of gate lines are disposed at the upper and lower sides of each pixel row with the pixels in each row connected to the gate line positioned nearest the respective switching element, and each data line is disposed between adjacent pairs of pixel columns and connected to pairs of pixels where one pixel of the pair has a switching element positioned nearest the respective data line.

Abstract: A display, includes: a substrate; first signal lines (FSLs) disposed on the substrate and extending in substantially a first direction; a gate insulating layer (GIL) disposed on the FSLs; a first electrode disposed on the GIL; a thin film transistor (TFT) connected to a FSL of the FSLs and including the GIL and the first electrode; a pixel electrode (PE) extending in substantially the first direction, connected to the TFT, and configured to receive a data voltage from the TFT; a common electrode (CE) overlapping with at least a portion of the PE; and a first insulating layer disposed between the PE and CE. One of the PE and the CE has a planar shape and the other includes branch electrodes overlapping with the planar shape and extending substantially parallel to the FSL. At least a portion of the CE overlaps with at least a portion of the FSL.

Abstract: A display device may include an insulating layer. The display device may further include a first field-generating electrode that overlaps the insulating layer. The display device may further include a second field-generating electrode that overlaps the first field-generating electrode and has a cutout. An exposed portion of the insulating layer may be exposed through the cutout and may be exposed between an edge (or boundary) of the first field-generating electrode and an end portion of the second field-generating electrode in a layout view of the display device.

Abstract: A display apparatus includes: a plurality of pixel blocks, each pixel block of the plurality of pixel blocks including a first pixel electrode connected to a first switching element and a second pixel electrode connected to a second switching element; gate lines which extend along a first direction and include a first gate line connected to the first switching element and a second gate line connected to the second switching element; and data lines which extend along a second direction intersecting the first direction. A gate voltage is applied to the first gate line before the second gate line, and the first pixel electrode of each of the pixel blocks displays a same color.

Abstract: A liquid crystal display (“LCD”) device includes a display panel, a data driving part, and at least one first light-blocking part and at least one second light-blocking part. The display panel includes a plurality of pixels and a plurality of data lines. The pixels are arranged in a column direction and a row direction. At least one of the data lines extends in a zigzag shape along the column direction to be discontinuously disposed between two adjacent columns of the pixels. The at least one data line is electrically connected to two of the pixels that are adjacent in the row direction. The second light-blocking part is thinner than the first light-blocking part. The first light-blocking part and the second light-blocking are repeatedly disposed on an area between two adjacent columns of the pixels. The data driving part applies a data signal to the data lines.

Abstract: A liquid crystal display includes: a first insulation substrate; a first gate conductor disposed on the first insulation substrate and in a same layer as a gate line and a second gate conductor disposed on the first insulation substrate and in the same layer as the gate line; a gate insulating layer disposed on the first gate conductor and the second gate conductor; a data conductor disposed on the gate insulating layer and in a same layer as a data line; a thin film transistor disposed on the first insulation substrate; a first spacer disposed on the first insulation substrate; and a second spacer disposed on the first insulation substrate, where heights or widths of the first and second spacers are different from each other and having different heights or widths, and the second spacer overlaps the first gate conductor and the second gate conductor.

Abstract: A display, includes: a substrate; first signal lines (FSLs) disposed on the substrate and extending in substantially a first direction; a gate insulating layer (GIL) disposed on the FSLs; a first electrode disposed on the GIL; a thin film transistor (TFT) connected to a FSL of the FSLs and including the GIL and the first electrode; a pixel electrode (PE) extending in substantially the first direction, connected to the TFT, and configured to receive a data voltage from the TFT; a common electrode (CE) overlapping with at least a portion of the PE; and a first insulating layer disposed between the PE and CE. One of the PE and the CE has a planar shape and the other includes branch electrodes overlapping with the planar shape and extending substantially parallel to the FSL. At least a portion of the CE overlaps with at least a portion of the FSL.

Abstract: A liquid crystal display device includes a first substrate, a first electrode on the first substrate, and a second electrode on the first substrate, spaced apart from the first electrode and overlapping at least a part of the first electrode. the second electrode includes a plurality of branch electrodes, and a coupling portion which couples the plurality of branch electrodes to each other. The coupling portion includes a longitudinal coupling portion extended in a length direction of the branch electrode and a transverse coupling portion extended in a width direction of the branch electrode. An edge portion of the first electrode is disposed between at least one of the plurality of branch electrodes and the longitudinal coupling portion, in a plan view.