Patents by Inventor Sung Min AN

Sung Min AN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080057322
    Abstract: A non-linear silicon compound is provided. The non-linear silicon compound may be a non-linear aromatic compound used as a linker for manufacturing an oligomer probe array. The non-linear silicon compound may reduce self-aggregation so as to form a stable and uniform monolayer. As a result, upon hybridization analysis, the fluorescent intensity may be increased.
    Type: Application
    Filed: August 8, 2007
    Publication date: March 6, 2008
    Inventors: Sung-min Chi, Jung-hwan Hah, Kyoung-seon Kim, Won-sun Kim, Sang-jun Choi, Mah-hyoung Ryoo
  • Publication number: 20080057412
    Abstract: In a reflecting mask, an apparatus for fixing the reflecting mask and a method of fixing the reflecting mask, voltages are applied to elements of a conductive pattern spaced apart from each other on a rear face of the reflecting mask to fix the reflecting mask by using electrostatic forces. A flatness of the fixed reflecting mask is measured, and the electrostatic forces provided to portions of the reflecting mask are selectively adjusted in accordance with a measured result obtained from the measuring part, such that the reflecting mask is horizontally fixed and is substantially flat.
    Type: Application
    Filed: July 24, 2007
    Publication date: March 6, 2008
    Inventors: Sung-Min Huh, Suk-Ho Lee
  • Publication number: 20080057489
    Abstract: Provided is a substrate for an oligomer probe array to which a photolabile material having an acetylene derivative is directly attached or attached via a linker.
    Type: Application
    Filed: March 15, 2007
    Publication date: March 6, 2008
    Inventors: Sung-Min Chi, Jung-hwan Hah, Kyoung-seon Kim, Won-sun Kim, Sang-jun Choi, Man-hyoung Ryoo
  • Publication number: 20080052482
    Abstract: In an embodiment, a semiconductor memory device includes a clock latency that can be controlled responsive to whether or not an output order of burst data is reordered. The semiconductor memory device may comprise a control unit and a latency control unit. The control unit may generate a latency control signal having a logic level that varies depending on whether or not an output order of burst data is reordered. The latency control unit may control a latency value in response to the latency control signal. The semiconductor memory device and the method of controlling the latency value responsive to a reordering of the burst data allow for an optimally fast memory access time.
    Type: Application
    Filed: July 10, 2007
    Publication date: February 28, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Joo-Sun CHOI, Won-Chang JUNG, Hi-Choon LEE, Sung-Min YIM, Chul-Woo PARK, Won-Il BAE
  • Publication number: 20080051298
    Abstract: According to some embodiments of the invention, provided herein is a microarray comprising a substrate; a plurality of probe cells formed in the substrate, wherein at least one probe cell includes a linker; and a probe cell separation area. In addition, in some embodiments, the microarray may include a molecular probe coupled to the linker. Related methods are also described herein.
    Type: Application
    Filed: August 13, 2007
    Publication date: February 28, 2008
    Inventors: Won-sun Kim, Sung-min Chi, Jung-hwan Hah, Kyoung-seon Kim, Sang-jun Choi, Man-hyoung Ryoo
  • Publication number: 20080043328
    Abstract: The present invention relates to a phase retardation plate including a thin organic film with a phase retardation function due to birefringence and a fixed substrate bonded to at least one surface of the thin organic film using an adhesive, and to an optical pickup device having the phase retardation plate. In the phase retardation plate and the optical pickup device using the same, a liner thermal expansion coefficient (L1) of the thin organic film, a liner thermal expansion coefficient (L2) of the adhesive and a liner thermal expansion coefficient (L3) of the fixed substrate satisfy a relationship of L1>L2>L3; and the thin organic film retards the phase of incident light with a wavelength in a range of 400 to 800 nm by ?/2 or ?, the thin organic film having a phase retardation value between 0 and ?.
    Type: Application
    Filed: November 16, 2004
    Publication date: February 21, 2008
    Inventors: Yong-Shig Shim, Sung-Min Cho, Jae-Wan Jeong
  • Publication number: 20080044742
    Abstract: Provided are a method of correcting a critical dimension (CD) in a photomask and a photomask having a corrected CD using the method. The method may include providing a substrate that is transparent with respect to an incident light, forming shielding patterns on the substrate to form a photomask, detecting a CD error region of the shielding patterns, and forming a correction film to vary an intensity of the incident light in the CD error region to correct critical dimensions (CDs) of circuit patterns formed by the shielding patterns.
    Type: Application
    Filed: June 12, 2007
    Publication date: February 21, 2008
    Inventors: Jin-sik Jung, Hee-bom Kim, Hoon Kim, Sung-min Huh
  • Patent number: 7334053
    Abstract: A method and system for detecting a state of a disc drive. A cable select signal is input from a host and is gated to determine the state of the disc drive when a jumper is set to indicate that the disc drive is in a cable select state or when the jumper is missing. The cable select signal is prevented from determining the state of the disc drive when the jumper is present and is set to indicate that the disc drive is in the master state or the slave state. Additionally, the cable select signal dictates the state of the disc drive when the jumper is present and is set to indicate that the disc drive is in the cable select state.
    Type: Grant
    Filed: May 6, 2004
    Date of Patent: February 19, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Sung-Min Hong
  • Patent number: 7333651
    Abstract: A stereo disparity between a reference image and a search image for a reference pixel in the reference image is determined by (a) calculating a similarity measure between a reference window including a set of pixels centering on the reference pixel and each of a group of search windows in the search image which is of a same shape with the reference window and displaced from the reference window within a predetermined search range, wherein a matching pixel count, which is the number of pixels in the reference window which are similar in intensity to corresponding pixels in a search window, is used as the similarity measure between the reference window and the search window; and (b) determining a displacement between the reference window and a search window which yields a largest similarity measure as the stereo disparity for the reference pixel.
    Type: Grant
    Filed: April 13, 1999
    Date of Patent: February 19, 2008
    Assignee: Korea Institute of Science and Technology
    Inventors: Hyoung Gon Kim, Sung Min Chu, Sang Chul Ahn, Nam Kyu Kim
  • Publication number: 20080038712
    Abstract: An oligomer probe array with improved signal-to-noise ratio and desired detection sensitivity ever when a reduced design rule is employed includes a substrate, a plurality of probe cell active regions formed on or in the substrate, each of the plurality of probe cell active regions having a three-dimensional surface and being coupled, with at least one oligomer probe with its own sequence, and a probe cell isolation region defining the probe cell active regions and having no functional groups for coupling with the oligomer probes on a surface.
    Type: Application
    Filed: March 15, 2007
    Publication date: February 14, 2008
    Inventors: Jung-hwan Hah, Sung-min Chi, Kyoung-seon Kim, Won-sun Kim
  • Publication number: 20080038732
    Abstract: An oligomer probe array having improved reaction yield is provided. The oligomer probe array includes a substrate, an immobilization layer on the substrate, a plurality of nano particles coupled with a surface of the immobilization layer, and a plurality of oligomer probes coupled with surfaces of the nano particles.
    Type: Application
    Filed: March 15, 2007
    Publication date: February 14, 2008
    Inventors: Jung-Hwan Hah, Sung-min Chi, Kyoung-seon Kim, Won-sun Kim, Han-ku Cho, Sang-jun Choi, Man-hyoung Ryoo
  • Publication number: 20080036081
    Abstract: An interconnection structure includes an integrated circuit (IC) chip having internal circuitry and a terminal to electrically connect the internal circuitry to an external circuit, a passivation layer disposed on a top surface of the IC chip, the passivation layer configured to protect the internal circuitry and to expose the terminal, an input/output (I/O) pad, where the I/O pad includes a first portion in contact with the terminal and a second portion that extends over the passivation layer, and an electroless plating layer disposed on the I/O pad.
    Type: Application
    Filed: October 19, 2007
    Publication date: February 14, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Se-Young JEONG, Sung-Min SIM, Soon-Bum KIM, In-Young LEE, Young-Hee SONG
  • Publication number: 20080036001
    Abstract: A semiconductor device having a field effect transistor and a method of fabricating the same. In-situ doped epitaxial patterns are respectively formed at both sidewalls of a protruded channel pattern from a substrate by performing an in-situ doped epitaxial growth process. The in-situ doped epitaxial pattern has a conformal impurity concentration throughout. Accordingly, source/drain regions with a conformal impurity concentration are connected throughout a channel width of a channel region including both sidewalls of a protruded channel pattern. As a result, it is possible to maximize a driving current of the filed effect transistor, and an on-off characteristic can be highly stabilized.
    Type: Application
    Filed: August 1, 2007
    Publication date: February 14, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Eun-Jung YUN, Hye-Jin CHO, Dong-Won KIM, Sung-Min KIM
  • Publication number: 20080031060
    Abstract: A driver circuit for an integrated circuit device includes a transistor that has a gate terminal, a source terminal, and a bulk substrate terminal. The source terminal is connected to the bulk substrate terminal. A pull-up circuit is connected between a power supply node and the source terminal. The pull up circuit is configured to increase a voltage at the source terminal and the bulk substrate terminal of the transistor responsive to a control signal.
    Type: Application
    Filed: February 9, 2007
    Publication date: February 7, 2008
    Inventors: Jong-Hyun Choi, Kyu-Chan Lee, Sung-Min Yim, Dong-Hak Shin
  • Publication number: 20080029811
    Abstract: A transistor includes first and second pairs of vertically overlaid source/drain regions on a substrate. Respective first and second vertical channel regions extend between the overlaid source/drain regions of respective ones of the first and second pairs of overlaid source/drain regions. Respective first and second insulation regions are disposed between the overlaid source/drain regions of the respective first and second pairs of overlaid source/drain regions and adjacent respective ones of the first and second vertical channel regions. Respective first and second gate insulators are disposed on respective ones of the first and second vertical channel regions. A gate electrode is disposed between the first and second gate insulators. The first and second vertical channel regions may be disposed near adjacent edges of the overlaid source/drain regions.
    Type: Application
    Filed: March 16, 2007
    Publication date: February 7, 2008
    Inventors: Eun-Jung Yun, Sung-Young Lee, Min-Sang Kim, Sung-Min Kim, Hye-Jin Cho
  • Publication number: 20080031010
    Abstract: According to an embodiment of the present invention, a backlight unit may include a light guide plate having a groove with a first shape formed in at least one side thereof, at least one light emitting diode (LED) having a projected lens, the LED being arranged in correspondence to the grove of the light guide plate, a first reflection plate arranged over the LED, and a second reflection plate arranged below the LED.
    Type: Application
    Filed: August 3, 2007
    Publication date: February 7, 2008
    Inventors: Jeung Soo Kim, Young Bee Chu, Ik Soo Lee, Kyu Seok Kim, Tae Joon Kim, Jeong Seok Oh, Sung Min Kim, Young Hee Park
  • Publication number: 20080026570
    Abstract: A method of forming a metal line of a semiconductor memory device is disclosed. An interlayer insulating layer, an etch-stop layer, a trench oxide layer, a hard mask layer and a photoresist layer are laminated over a semiconductor substrate in which a contact is formed. An exposure process is performed to form a photoresist pattern. The hard mask layer is partially etched by an etch process that employs the photoresist pattern. An etch process using the hard mask layer as an etch mask is performed to partially etch the trench oxide layer, the etch-stop layer and the interlayer insulating layer, thereby forming damascene trenches. Metal material is formed on the entire surface including the trenches. A chemical mechanical polishing process is then performed to expose the etch-stop layer, thereby forming a metal line.
    Type: Application
    Filed: June 29, 2007
    Publication date: January 31, 2008
    Applicant: Hynix Semiconductor Inc.
    Inventors: Young Mo Kim, Sung Min Hwang
  • Publication number: 20080020813
    Abstract: A mobile phone having a body including a ground portion, a cover of a metallic material coupled to the body, the cover forming an exterior surface of the mobile phone, and a grounding unit electrically connecting the ground portion of the body to the cover, the grounding unit being disposed on one of facing surfaces of the body and the cover. Since the body and the metallic cover are electrically and stably connected with each other, a wireless communication characteristic of the mobile phone is prevented from being lowered.
    Type: Application
    Filed: June 1, 2007
    Publication date: January 24, 2008
    Inventors: Byung-Sung Choi, Sang-Ki Hong, Sung-Min Kim
  • Publication number: 20080020150
    Abstract: A display device includes a display panel comprising a first substrate including a thin film transistor and a pixel electrode, a second substrate including a common electrode, and a liquid crystal provided between a first surface of the first substrate and a first surface of the second substrate, a first polarizing plate provided on a second surface of the second substrate of the display panel, a second polarizing plate provided on a second surface of the first substrate of the display panel, and a first impact absorbing sheet provided between the second surface of the second substrate and the first polarizing plate.
    Type: Application
    Filed: January 31, 2007
    Publication date: January 24, 2008
    Inventors: Wal Hee Kim, Sung Min Kim, Young Bee Chu, Jeong Seok Oh, Jeung Soo Kim
  • Publication number: 20080019083
    Abstract: A portable electronic device having a front cover, a rear cover, and wherein one of the front cover and the rear cover is metallic and has a pattern portion with a predetermined pattern. In addition, a portable electronic device having a front cover, a rear cover, and a metallic pattern layer provided on at least one of the covers, the metallic pattern layer having a predetermined pattern.
    Type: Application
    Filed: March 22, 2007
    Publication date: January 24, 2008
    Inventors: Seung-Geun Lim, Won-Seok Joo, Sung-Min Kim