Abstract: A method and a device for direct communication in a communication system supporting multiple links are disclosed. A method of an AP MLD comprises the steps of: transmitting a trigger frame in multiple links including a first link and a second link; receiving a response frame for the trigger frame from a first STA associated with an STA MLD in the first link; receiving a first data frame from a third STA in the second link; and when a subject to receive the first data frame is a second STA associated with the STA MLD, transmitting a second data frame generated on the basis of the first data frame, to the first STA in the first link.

Abstract: A semiconductor device and electronic system, the device including a cell structure stacked on a peripheral circuit structure, wherein the cell structure includes a first interlayer dielectric layer and first metal pads exposed at the first interlayer dielectric layer and connected to gate electrode layers and channel regions, the peripheral circuit structure includes a second interlayer dielectric layer and second metal pads exposed at the second interlayer dielectric layer and connected to a transistor, the first metal pads include adjacent first and second sub-pads, the second metal pads include adjacent third and fourth sub-pads, the first and third sub-pads are coupled, and a width of the first sub-pad is greater than that of the third sub-pad, and the second sub-pad and the fourth sub-pad are coupled, and a width of the fourth sub-pad is greater than that of the second sub-pad.

Abstract: A nonvolatile memory device including a substrate extending in a first direction, a ground selection line extending in the first direction on the substrate, a plurality of word lines stacked sequentially on the ground selection line and extending in the first direction, a landing pad spaced apart from the ground selection line and the plurality of word lines in the first direction, a rear contact plug connected to a lower face of the landing pad and extending in a second direction intersecting the first direction, a front contact plug connected to an upper face of the landing pad opposite the lower face and extending in the second direction, an input/output pad electrically connected to the rear contact plug, and an upper bonding pad electrically connected to the front contact plug and connected to at least a part of a plurality of circuit elements of the nonvolatile memory device.

Abstract: The present invention relates to a novel heterocyclic compound and a composition, for preventing or treating a cancer, an autoimmune disease, and an inflammatory disease, comprising same. The novel heterocyclic compound of the present invention is a bifunctional compound having a Bruton's tyrosine kinase (BTK) degradation function via a ubiquitin proteasome pathway, and may be utilized as a composition for preventing or treating a cancer, an autoimmune disease, and Parkinson's disease.

Abstract: Disclosed is a binary neural network hardware apparatus. The binary neural network hardware apparatus includes a sense amplifier configured to compare a bit line voltage of a bit line with a predetermined reference voltage; an input unit configured to input the bit line voltage to the sense amplifier; and a threshold voltage regulator configured to be connected to an artificial intelligence binary synapse through the bit line and change the bit line voltage in multiple levels.

Abstract: A method and a device for shard communication in a wireless LAN are disclosed. A method of a first STA comprises the steps of: receiving a first frame for allocation of a shared communication period from an AP; identifying the shared communication period on the basis of one or more fields included in the first frame; and performing shared communication with a second STA in the shared communication period, wherein the shared communication period is configured within a TXOP configured between the AP and a third STA.

Abstract: Provided are a composition, a device, a filter, a method and the like, which convert toxic carbon monoxide and/or carbon dioxide in waste gas to formic acid without by-products at room temperature and at room pressure by using carbon monoxide dehydrogenase and formic acid dehydrogenase. The composition, the device, the filter, the method and the like enable the removal of carbon monoxide which is emitted in a great amount from industries such as petrochemical and steel industry and tobacco combustion, household cooking appliances, and various boiler combustion, through a cigarette filter, an air purifier, a household cooking appliance suction filter, a gas boiler, etc. Accordingly, the production method can be variously applied.

Abstract: Disclosed are methods for treating or ameliorating metabolic diseases, cholestatic liver diseases, disorder of bile acid homeostasis, or organ fibrosis, which includes administering to a subject a therapeutically effective amount of a pharmaceutical composition containing an isoxazole derivative, a racemate, an enantiomer, or a diastereoisomer thereof, or a pharmaceutically acceptable salt of the derivative, the racemate, the enantiomer, or the diastereoisomer.

Abstract: A positive electrode active material for a secondary battery includes a lithium composite transition metal oxide including nickel (Ni), cobalt (Co), and manganese (Mn), and at least one particle growth-promoting element selected from the group consisting of strontium (Sr), zirconium (Zr), magnesium (Mg), yttrium (Y), and aluminum (Al). The lithium composite transition metal oxide includes the nickel (Ni) in an amount of 65 mol % or more and the manganese (Mn) in an amount of 5 mol % or more based on a total amount of transition metals, and the positive active material has a single particle.

Abstract: This disclosure generally relates to a method for manufacturing a Group III-nitride semiconductor light emitting structure. In particular, it relates to a method for manufacturing a Group III-nitride semiconductor light emitting structure capable of shifting the emission wavelength towards to a longer wavelength through an appropriate barrier (the Group III-nitride semiconductor is composed of a compound of Al(x)Ga(y)In(1-x-y)N (0?x?1, 0?y?1, 0?x+y?1)).

Abstract: The present disclosure provides a method for manufacturing a positive electrode for a secondary battery, the method including forming a positive electrode mixture layer including a positive electrode active material on a positive electrode current collector, and forming a metal oxide coating layer on the positive electrode mixture layer by atomic layer deposition, wherein the positive electrode active material includes lithium composite transition metal oxide particles and a boron-containing coating layer formed on the lithium composite transition metal oxide particles, and the lithium composite transition metal oxide particles include nickel (Ni), cobalt (Co), and manganese (Mn), wherein the nickel (Ni) is 60 mol % or greater of all metals excluding lithium.

Abstract: A semiconductor memory device includes a first stacked structure, a first supporter layer, a second stacked structure, a block cut structure, and a second supporter layer on the second stacked structure and separated by a second cut pattern. The first stacked structure includes a first and second stack, the second stacked structure includes a third stack separated by the block cut structure and a fourth stack, the first supporter layer is on the first stack and the second stack, the second supporter layer is on the third stack and the fourth stack, the first cut pattern includes a first connection on the block cut structure and connecting the first supporter layer and the second stack, and the second cut pattern of the second supporter layer includes a second connection on the block cut structure and connecting the second supporter layer placed on the third stack and the fourth stack.

Abstract: A semiconductor device and electronic system, the device including a cell structure stacked on a peripheral circuit structure, wherein the cell structure includes a first interlayer dielectric layer and first metal pads exposed at the first interlayer dielectric layer and connected to gate electrode layers and channel regions, the peripheral circuit structure includes a second interlayer dielectric layer and second metal pads exposed at the second interlayer dielectric layer and connected to a transistor, the first metal pads include adjacent first and second sub-pads, the second metal pads include adjacent third and fourth sub-pads, the first and third sub-pads are coupled, and a width of the first sub-pad is greater than that of the third sub-pad, and the second sub-pad and the fourth sub-pad are coupled, and a width of the fourth sub-pad is greater than that of the second sub-pad.

Abstract: A semiconductor memory device includes a first semiconductor chip and a second semiconductor chip. Each semiconductor chip of the first and second semiconductor chips may include a cell array region and a peripheral circuit region. The cell array region may include an electrode structure including electrodes sequentially stacked on a body conductive layer and vertical structures extending through the electrode structure and connected to the body conductive layer. The peripheral circuit region may include a residual substrate on the body conductive layer and on which a peripheral transistor is located. A bottom surface of the body conductive layer of the second semiconductor chip may face a bottom surface of the body conductive layer of the first semiconductor chip.

Abstract: The present invention provides an optical filter for its use. In the present invention, it is possible to provide an optical filter that effectively blocks ultraviolet ray and infrared ray and exhibits high transmittance in visible light. Furthermore, it is possible to provide an optical filter where the transmission characteristics are stably maintained even when an incident angle is changed. Moreover, it is possible to provide an optical filter that does not exhibit problems such as ripple or petal flare.

Abstract: The provided is an optical filter for its use. In the present invention, it is possible to provide an optical filter that effectively blocks ultraviolet ray and infrared ray and exhibits high transmittance in visible light. Furthermore, it is possible to provide an optical filter where the transmission characteristics are stably maintained even when an incident angle is changed. Moreover, it is possible to provide an optical filter that does not exhibit problems such as ripple and petal flare, and thus to provide the optical filter with excellent durability.

Abstract: The present invention provides an optical filter for its use. In the present invention, it is possible to provide an optical filter that effectively blocks ultraviolet ray and infrared ray and exhibits high transmittance in visible light. Furthermore, it is possible to provide an optical filter where the transmission characteristics are stably maintained even when an incident angle is changed. Moreover, it is possible to provide an optical filter that does not exhibit problems such as ripple, petal flare, and curl.

Abstract: A semiconductor memory device includes a first stacked structure, a first supporter layer, a second stacked structure, a block cut structure, and a second supporter layer on the second stacked structure and separated by a second cut pattern. The first stacked structure includes a first and second stack, the second stacked structure includes a third stack separated by the block cut structure and a fourth stack, the first supporter layer is on the first stack and the second stack, the second supporter layer is on the third stack and the fourth stack, the first cut pattern includes a first connection on the block cut structure and connecting the first supporter layer and the second stack, and the second cut pattern of the second supporter layer includes a second connection on the block cut structure and connecting the second supporter layer placed on the third stack and the fourth stack.

Abstract: A semiconductor device includes a gate stack structure including insulating patterns and conductive patterns which are alternately stacked, a first separation structure penetrating the gate stack structure, a second separation structure penetrating the gate stack structure and being adjacent to the first separation structure, first and second memory channel structures penetrating the gate stack structure and disposed between the first separation structure and the second separation structure, a first bit line overlapping with the first and second memory channel structures and electrically connected to the first memory channel structure, and a second bit line overlapping with the first and second memory channel structures and the first bit line and electrically connected to the second memory channel structure.

Abstract: A semiconductor memory device includes a gate stack structure including insulating layers, a lower selection line and word lines, the word lines including a first word line adjacent to the lower selection line and a second word line on the first word line, a memory channel structure penetrating the gate stack structure, a plurality of first contact plugs electrically connected to the first word line, a plurality of second contact plugs electrically connected to the second word line, a first conductive line connected to the plurality of first contact plugs, and a second conductive line connected to one of the plurality of second contact plugs.