Patents by Inventor Sung Son

Sung Son has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190002711
    Abstract: A thermoelectric (TE) ink for TE materials, a TE module using the TE ink, and a method of manufacturing the TE module are provided. The TE ink may include an inorganic binder including chalcogenidometallate (ChaM), and TE particles including Bi2-xSbxTe3-ySey (0?x?2, 0?y?1).
    Type: Application
    Filed: December 13, 2017
    Publication date: January 3, 2019
    Inventors: Jae Sung SON, Fredrick KIM
  • Publication number: 20180357924
    Abstract: Provided are a braille actuator and a braille outputting device using the same. The braille actuator includes an electromagnet, a rotation member, and a braille protrusion. With this configuration, the actuator applies a current to the electromagnet to allow the electromagnet to exert a repulsive force or attractive force on the permanent magnet of the rotation member, so that the rotation member is rotated, and due to the rotation of the rotation member, the upper surface of the rotation member allows the lower surface of the braille protrusion to be moved upward, and the braille protrusion is protruded. After that, even though the supplying of the current to the electromagnet is blocked, the braille protrusion is supported by the rotation member, and thus, the output state is maintained, so that it is possible to greatly reduce power consumption for output of braille.
    Type: Application
    Filed: March 22, 2016
    Publication date: December 13, 2018
    Applicant: OHFATECH, INC
    Inventors: Kyoung Hwang LEE, Jae Ryun CHO, Min Sung SON, Hang Sok KIM
  • Publication number: 20180331105
    Abstract: A dummy gate electrode layer and a dummy gate mask layer may be formed on a substrate. The dummy gate mask layer may be patterned to form a dummy gate mask so that a portion of the dummy gate electrode layer is exposed. Ions may be implanted into the exposed portion of the dummy gate electrode layer and a portion of the dummy gate electrode layer adjacent thereto by an angled ion implantation to form a growth blocking layer in the dummy gate electrode layer. The dummy gate electrode layer may be etched using the dummy gate mask as an etching mask to form a dummy gate electrode. A spacer may be formed on side surfaces of a dummy gate structure including the dummy gate electrode and the dummy gate mask. An SEG process may be performed to form an epitaxial layer.
    Type: Application
    Filed: July 5, 2018
    Publication date: November 15, 2018
    Inventors: KOOK-TAE KIM, HO-SUNG SON, DONG-SUK SHIN, HYUN-JUN SIM, JU-RI LEE, SUNG-UK JANG
  • Publication number: 20180306985
    Abstract: Embodiments of the present disclosure provide an optical assembly for high speed optical communications by combining a cover assembly including a lens and a cover post with a body assembly including a lens, reflection prism and body hole, which takes only a few passive optical alignments for providing aligned optical elements that have required multiple complex and sophisticated processes.
    Type: Application
    Filed: April 19, 2018
    Publication date: October 25, 2018
    Inventors: Yung-sung SON, Bong-cheol KIM, Sang-Shin LEE, Yong Geon LEE
  • Publication number: 20180299630
    Abstract: Embodiments according to the present disclosure relate to an optical transmitting device and an optical receiving device which can minimize the alignment error between the light source and the photodetector on the substrate, miniaturize the devices, and require no separate guide member reducing manufacturing costs, while satisfying the design requirements for sub-miniaturization, and performing optical transmission and reception more efficiently.
    Type: Application
    Filed: June 14, 2018
    Publication date: October 18, 2018
    Inventors: Yung-sung SON, Bong-cheol KIM, Sang-sin LEE, Young-geon LEE
  • Patent number: 10043806
    Abstract: A dummy gate electrode layer and a dummy gate mask layer may be formed on a substrate. The dummy gate mask layer may be patterned to form a dummy gate mask so that a portion of the dummy gate electrode layer is exposed. Ions may be implanted into the exposed portion of the dummy gate electrode layer and a portion of the dummy gate electrode layer adjacent thereto by an angled ion implantation to form a growth blocking layer in the dummy gate electrode layer. The dummy gate electrode layer may be etched using the dummy gate mask as an etching mask to form a dummy gate electrode. A spacer may be formed on side surfaces of a dummy gate structure including the dummy gate electrode and the dummy gate mask. An SEG process may be performed to form an epitaxial layer.
    Type: Grant
    Filed: September 26, 2016
    Date of Patent: August 7, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kook-Tae Kim, Ho-Sung Son, Dong-Suk Shin, Hyun-Jun Sim, Ju-Ri Lee, Sung-Uk Jang
  • Publication number: 20180144934
    Abstract: Chalcogenidometallates of group IIB, IV and V elements and, particularly, alkali metal-containing chalcogenidometallates of cadmium, lead and bismuth are provided. Also provided are methods of using the chalcogenidometallates as molecular solders to form metal chalcogenide structures, including thin films, molded objects and bonded surfaces composed of metal chalcogenides.
    Type: Application
    Filed: December 1, 2015
    Publication date: May 24, 2018
    Inventors: Dmitriy S. Dolzhnikov, Hao Zhang, Jaeyoung Jang, Jae Sung Son, Matthew G. Panthani, Dmitri V. Talapin
  • Patent number: 9917174
    Abstract: In a method of manufacturing a semiconductor device, an isolation pattern may be formed on a substrate to define a plurality of active patterns. The active patterns may protrude from the isolation pattern. A preliminary polysilicon layer may be formed on the active patterns to fill a gap between adjacent ones of the active patterns. Ions having no conductivity may be implanted into the preliminary polysilicon layer to form a polysilicon layer having no void. The active patterns maintain their crystalline state during the implanting of the ions. The polysilicon layer may be patterned to form a dummy gate structure on the active pattern. A source/drain region may be formed at an upper portion of the active patterns adjacent to sides of the dummy gate structure.
    Type: Grant
    Filed: February 27, 2017
    Date of Patent: March 13, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-Uk Jang, Gi-Gwan Park, Ho-Sung Son, Dong-Suk Shin
  • Patent number: 9869830
    Abstract: An optical transceiver device includes a baseplate including a set position for mounting an optical element, an alignment plate including a mounting unit, a first and a second reference hole. The device includes an optical-fiber fixing block configured to fixedly mount at least one of a lens unit and an optical fiber optically linked with the optical element and to include a first and a second post, and a housing for enclosing the optical-fiber fixing block and alignment plate. The second post is inserted into the second reference hole in a looser manner than inserting the first post into the first reference hole, and the set position is determined by a first baseline passing through the first and the second reference hole and by a second baseline intersecting with the first baseline and positioned on opposite side of the second reference hole with respect to the first reference hole.
    Type: Grant
    Filed: November 28, 2014
    Date of Patent: January 16, 2018
    Assignees: OPTOMIND INC., MITSUBISHI GAS CHEMICAL COMPANY, INC.
    Inventors: Yung-sung Son, Bong-cheol Kim
  • Patent number: 9786785
    Abstract: Semiconductor device, method for fabricating the same and electronic devices including the semiconductor device are provided. The semiconductor device comprises an interlayer insulating layer formed on a substrate and including a trench, a gate electrode formed in the trench, a first gate spacer formed on a side wall of the gate electrode to have an L shape, a second gate spacer formed on the first gate spacer to have an L shape and having a dielectric constant lower than that of silicon nitride, and a third spacer formed on the second gate spacer.
    Type: Grant
    Filed: March 28, 2016
    Date of Patent: October 10, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kook-Tae Kim, Young-Tak Kim, Ho-Sung Son, Seok-Jun Won, Ji-Hye Yi, Chul-Woong Lee
  • Publication number: 20170271476
    Abstract: In a method of manufacturing a semiconductor device, an isolation pattern may be formed on a substrate to define a plurality of active patterns. The active patterns may protrude from the isolation pattern. A preliminary polysilicon layer may be formed on the active patterns to fill a gap between adjacent ones of the active patterns. Ions having no conductivity may be implanted into the preliminary polysilicon layer to form a polysilicon layer having no void. The active patterns maintain their crystalline state during the implanting of the ions. The polysilicon layer may be patterned to form a dummy gate structure on the active pattern. A source/drain region may be formed at an upper portion of the active patterns adjacent to sides of the dummy gate structure.
    Type: Application
    Filed: February 27, 2017
    Publication date: September 21, 2017
    Inventors: SUNG-UK JANG, GI-GWAN PARK, HO-SUNG SON, DONG-SUK SHIN
  • Patent number: 9739957
    Abstract: An optical device for implementing passive alignment of parts and a method therefor, more particularly an optical device and a method therefor that utilize an alignment reference part arranged on the substrate to passively align an optical element part with a lens-optical fiber connection part. For the passive alignment of parts, connection pillars of an alignment reference part are coupled to substrate holes, one or more light-emitting elements and one or more light-receiving elements are aligned in a row in a particular interval with respect to alignment holes arranged opposite each other in the alignment reference part, a lens-optical fiber connection part is aligned with respect to the alignment holes, and an optical fiber is aligned with the optical alignment point at a surface of a prism forming a portion of the lens-optical fiber connection part.
    Type: Grant
    Filed: January 20, 2016
    Date of Patent: August 22, 2017
    Assignee: UNIVE CO., LTD.
    Inventors: Yung Sung Son, Sang-Shin Lee, Hak-Soon Lee, Jun-Young Park
  • Publication number: 20170205593
    Abstract: An optical transceiver device includes a baseplate including a set position for mounting an optical element, an alignment plate including a mounting unit, a first and a second reference hole. The device includes an optical-fiber fixing block configured to fixedly mount at least one of a lens unit and an optical fiber optically linked with the optical element and to include a first and a second post, and a housing for enclosing the optical-fiber fixing block and alignment plate. The second post is inserted into the second reference hole in a looser manner than inserting the first post into the first reference hole, and the set position is determined by a first baseline passing through the first and the second reference hole and by a second baseline intersecting with the first baseline and positioned on opposite side of the second reference hole with respect to the first reference hole.
    Type: Application
    Filed: November 28, 2014
    Publication date: July 20, 2017
    Applicants: OPTOMIND INC., OPTOMIND INC.
    Inventors: Yung-sung SON, Bong-cheol KIM
  • Patent number: 9681112
    Abstract: An image display apparatus including a remote control interface configured to receive a signal from a remote controller; a controller configured to calculate a first pointer position at which a pointer is to be displayed on a display of the image display apparatus based on the received signal, to determine a depth of a three-dimensional (3D) object displayed on the display of the image display apparatus, and to calculate a second position of the pointer based on the determined depth of the 3D object; and a video processor configured to display the pointer at the calculated second pointer position on the display of the image display apparatus.
    Type: Grant
    Filed: October 14, 2010
    Date of Patent: June 13, 2017
    Assignee: LG ELECTRONICS INC.
    Inventor: Kwon Sung Son
  • Publication number: 20170133379
    Abstract: A dummy gate electrode layer and a dummy gate mask layer may be formed on a substrate. The dummy gate mask layer may be patterned to form a dummy gate mask so that a portion of the dummy gate electrode layer is exposed. Ions may be implanted into the exposed portion of the dummy gate electrode layer and a portion of the dummy gate electrode layer adjacent thereto by an angled ion implantation to form a growth blocking layer in the dummy gate electrode layer. The dummy gate electrode layer may be etched using the dummy gate mask as an etching mask to form a dummy gate electrode. A spacer may be formed on side surfaces of a dummy gate structure including the dummy gate electrode and the dummy gate mask. An SEG process may be performed to form an epitaxial layer.
    Type: Application
    Filed: September 26, 2016
    Publication date: May 11, 2017
    Inventors: KOOK-TAE KIM, HO-SUNG SON, DONG-SUK SHIN, HYUN-JUN SIM, JU-RI LEE, SUNG-UK JANG
  • Publication number: 20170072459
    Abstract: A molten metal pouring device is configured to pour molten metal into a mold cavity formed between an upper mold and a lower mold of a centrifugal casting machine. The molten metal pouring device includes a pouring unit including an end formed with a pouring hole, through which the molten metal is poured into the mold cavity, the end of the pouring unit being inserted into a riser formed along a rotation axis of the upper mold and being drawn out of the riser as the molten metal is poured, a stopper inserted into the pouring unit to open and close the pouring hole so as to adjust the flow of the molten metal, and a base unit, to which the pouring unit is mounted, the base unit being configured to lift the pouring unit up and down.
    Type: Application
    Filed: December 2, 2015
    Publication date: March 16, 2017
    Inventors: Ji Yong Lee, Tae Ho Jeong, Kwang Min Yoon, Woo Ho Son, Hyun Sung Son, Hyung Woo Ko
  • Patent number: 9558050
    Abstract: There are disclosed a general middleware bridge supporting an interoperability operation between devices on different middlewares and a method thereof. The general middleware bridge according to the present invention includes: a conversion rule collector collecting message conversion rules for an interoperability operation between different middleware devices; a conversion rule register registering the message conversion rules for each message type; and a message converter interconverting messages from the middleware devices on the basis of the message conversion rules and transferring the converted messages for each message type.
    Type: Grant
    Filed: September 15, 2010
    Date of Patent: January 31, 2017
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Hark-Jin Lee, Ji-Yeon Son, Young-Sung Son, Kyeong-Deok Moon
  • Patent number: 9542883
    Abstract: A device and a method for controlling brightness of an OLED display device are disclosed. The method for controlling brightness of an OLED display device includes the steps of forwarding external brightness control information in a PWM signal or a brightness control data, selecting and normalizing either the PWM signal or the brightness control data into an external brightness adjusting gain, analyzing a received video data to detect a peak brightness value, multiplying the peak brightness value by the external brightness adjusting gain to produce a final peak brightness value, adjusting the R/G/B maximum gamma voltage values according to the final peak brightness value, and generating R/G/B reference gamma voltage sets by using the R/G/B maximum gamma voltage values adjusted thus.
    Type: Grant
    Filed: February 21, 2014
    Date of Patent: January 10, 2017
    Assignee: LG Display Co., Ltd.
    Inventors: Hyun Jae Lee, Jin-Hyoung Kim, Jae-Sung Son
  • Publication number: 20160359782
    Abstract: A method for operating an electronic device is provided. The method includes receiving information from outside of the electronic device, identifying blocking configuration information on the received information, determining a method for blocking the received information according to the blocking configuration information, and blocking the received information based on the determined blocking method.
    Type: Application
    Filed: May 31, 2016
    Publication date: December 8, 2016
    Inventors: Jae-Sung SON, Hye-Rim KIM, Jae-Hyun PARK, Hey-Young PARK, Jong-Kyu BAE
  • Patent number: 9507105
    Abstract: An optical device for implementing passive alignment of parts and a method therefor, more particularly an optical device and a method therefor that utilize an alignment reference part arranged on the substrate to passively align an optical element part with a lens-optical fiber connection part. For the passive alignment of parts, connection pillars of an alignment reference part are coupled to substrate holes, one or more light-emitting elements and one or more light-receiving elements are aligned in a row in a particular interval with respect to alignment holes arranged opposite each other in the alignment reference part, a lens-optical fiber connection part is aligned with respect to the alignment holes, and an optical fiber is aligned with the optical alignment point at a surface of a prism forming a portion of the lens-optical fiber connection part.
    Type: Grant
    Filed: June 30, 2015
    Date of Patent: November 29, 2016
    Assignee: UNIVE CO., LTD.
    Inventors: Yung Sung Son, Sang-Shin Lee, Hak-Soon Lee, Jun-Young Park