Patents by Inventor Sung Wang

Sung Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor devices with self-heating structures, methods of manufacture thereof, and testing methods
    Patent number: 9076751
    Abstract: Semiconductor devices with self-heating structures, methods of manufacture thereof, and testing methods are disclosed. In one embodiment, a semiconductor device includes a workpiece, an active electrical structure disposed over the workpiece, and at least one self-heating structure disposed proximate the active electrical structure. The active electrical structure may include a capacitor, a resistor, a conductive line, a segment of a conductive line, a transistor, or a combination thereof.
    Type: Grant
    Filed: August 30, 2011
    Date of Patent: July 7, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jia Yang Ko, Ying-Han Chiou, Ling-Sung Wang
  • Metal-oxide-metal capacitor apparatus with a via-hole region
    Patent number: 9064841
    Abstract: A metal-oxide-metal capacitor comprises a first electrode, a second electrode, a plurality of first fingers and a plurality of second fingers. Each first finger and its corresponding second finger are in parallel and separated by a low k dielectric material. A via-hole region is employed to enclose the metal-oxide-metal capacitor so as to remove the moisture stored in the low k dielectric material.
    Type: Grant
    Filed: October 7, 2011
    Date of Patent: June 23, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jiun-Jie Huang, Ling-Sung Wang, Chi-Yen Lin
  • MOS Devices Having Non-Uniform Stressor Doping
    Publication number: 20150171189
    Abstract: A device includes a semiconductor substrate, a gate stack over the semiconductor substrate, and a stressor region having at least a portion in the semiconductor substrate and adjacent to the gate stack. The stressor region includes a first stressor region having a first p-type impurity concentration, a second stressor region over the first stressor region, wherein the second stressor region has a second p-type impurity concentration, and a third stressor region over the second stressor region. The third stressor region has a third p-type impurity concentration. The second p-type impurity concentration is lower than the first and the third p-type impurity concentrations.
    Type: Application
    Filed: March 2, 2015
    Publication date: June 18, 2015
    Inventors: Mei-Hsuan Lin, Chih-Hsun Lin, Ching-Hua Chu, Ling-Sung Wang
  • SRAM cells with dummy insertions
    Patent number: 9053974
    Abstract: A device includes a first pull-up transistor, a second pull-up transistor, and a dummy gate electrode between the first and the second pull-up transistors. The first and the second pull-up transistors are included in a first Static Random Access Memory (SRAM) cell.
    Type: Grant
    Filed: August 24, 2012
    Date of Patent: June 9, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chao-Hsuing Chen, Ling-Sung Wang, Chi-Yen Lin
  • SEMICONDUCTOR DEVICE HAVING V-SHAPED REGION
    Publication number: 20150137182
    Abstract: Among other things, a semiconductor device or transistor and a method for forming the semiconductor device are provided for herein. The semiconductor device comprises one or more v-shaped recesses in which stressed monocrystalline semiconductor material, such as silicon germanium, is grown, to form at least one of a source or a drain of the semiconductor device. The one or more v-shaped recesses are etched into a substrate in-situ. The semiconductor device comprises at least one of a source or a drain having a height-to-length ratio exceeding at least 1.6 when poly spacing between a first part of the semiconductor device (e.g., first transistor) and a second part of the semiconductor device (e.g., second transistor) is less than about 60 nm.
    Type: Application
    Filed: January 20, 2015
    Publication date: May 21, 2015
    Inventors: Chao-Hsuing Chen, Ling-Sung Wang, Chi-Yen Lin
  • Semiconductor structure having stressor
    Patent number: 9024391
    Abstract: A semiconductor structure includes a substrate, a shallow trench isolation (STI) structure embedded in the substrate, a stressor embedded in the substrate, and a conductive plug over and electrically coupled with the stressor. A same-material region is sandwiched by the STI structure and an entire sidewall of the stressor, and the same-material region is a continuous portion of the substrate.
    Type: Grant
    Filed: September 23, 2014
    Date of Patent: May 5, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Mei-Hsuan Lin, Chih-Hsun Lin, Chih-Kang Chao, Ling-Sung Wang
  • ELECTRONIC DEVICE AND METHOD FOR CONTROLLING A SCREEN
    Publication number: 20150121242
    Abstract: The present disclosure relates to an electronic device and a method of controlling a screen. The method of controlling a screen of an electronic device includes transmitting a request comprising at least one keyword to a server. Thumbnails are arranged into an image. The thumbnails are associated with digital content corresponding most with at least one keyword in the request. The image is rendered on a screen.
    Type: Application
    Filed: May 29, 2014
    Publication date: April 30, 2015
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Hyun-Jung KWON, Sung-Wang KIM, Ji-Youn KIM
  • Handheld device
    Patent number: 9013356
    Abstract: A handheld device is disclosed, which includes an appearance part, a system ground plane and a detachable element. The detachable element includes a carrier and a planar antenna. The system ground plane is disposed in the appearance part and has a feed point. The planar antenna is disposed on the carrier and has a connection point. The carrier is detachably connected to the appearance part. When the carrier is connected to the appearance part, the above-mentioned connection point is electrically connected to the feed point. In this way, the radiation performance of the antenna can be improved and the frequency band of the antenna of the handheld device can be changed by replacing the detachable element.
    Type: Grant
    Filed: April 28, 2010
    Date of Patent: April 21, 2015
    Assignee: HTC Corporation
    Inventors: Ching-Sung Wang, Huang-Jen Chen, Bing-Hsiao Wang
  • ELECTRONIC DEVICE, DISPLAY METHOD FOR ELECTRONIC DEVICE, AND COMPUTER-READABLE RECORDING MEDIUM
    Publication number: 20150106492
    Abstract: A display method for an electronic device is provided. The display method includes sending a request for information about at least one other electronic device connected to the electronic device to a management server, receiving a screen image of each of the at least one other electronic device from the management server, and displaying the received screen image.
    Type: Application
    Filed: March 10, 2014
    Publication date: April 16, 2015
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Hae-Ree NA, Sung-Wang KIM, Mi-Yeoung CHUNG, Yoon-Jung CHOI
  • METHOD FOR PROVIDING NOTIFICATION INFORMATION SELECTIVELY AND ELECTRONIC DEVICE THEREOF
    Publication number: 20150095437
    Abstract: An apparatus and method for providing notification information in an electronic device is provided. The method includes receiving a message when a message reception notification is limited. The method also includes providing a reception notification for the message selectively based on one or more of sender information of the message and whether the message includes notification setting information or not.
    Type: Application
    Filed: October 2, 2014
    Publication date: April 2, 2015
    Inventors: Chan-Pyo Park, Sung-Wang Kim
  • MOS devices having non-uniform stressor doping
    Patent number: 8994097
    Abstract: A device includes a semiconductor substrate, a gate stack over the semiconductor substrate, and a stressor region having at least a portion in the semiconductor substrate and adjacent to the gate stack. The stressor region includes a first stressor region having a first p-type impurity concentration, a second stressor region over the first stressor region, wherein the second stressor region has a second p-type impurity concentration, and a third stressor region over the second stressor region. The third stressor region has a third p-type impurity concentration. The second p-type impurity concentration is lower than the first and the third p-type impurity concentrations.
    Type: Grant
    Filed: March 8, 2012
    Date of Patent: March 31, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Mei-Hsuan Lin, Chih-Hsun Lin, Ching-Hua Chu, Ling-Sung Wang
  • ELECTRONIC DEVICE PROVIDING DATA PROTECTION FOR INSERTED SMARTCARD
    Publication number: 20150064947
    Abstract: An electronic device includes a housing for safely breaking electronic communication with a smart card on removal from the electronic device. A safeguard structure rotates with respect to the housing to cover the smart card when inserted, and a switch breaks communication between the smart card and the electronic device when the safeguard structure is rotated away from the housing to enable removal of the smart card. The breaking of communication safely prevents damage to, or corruption of, data in the smart card upon removal from the electronic device.
    Type: Application
    Filed: August 27, 2014
    Publication date: March 5, 2015
    Inventors: WEI-MIN CHANG, PEI-YU HUNG, KUANG-SUNG WANG
  • SEMICONDUCTOR STRUCTURE HAVING STRESSOR
    Publication number: 20150041857
    Abstract: A semiconductor structure includes a substrate, a shallow trench isolation (STI) structure embedded in the substrate, a stressor embedded in the substrate, and a conductive plug over and electrically coupled with the stressor. A same-material region is sandwiched by the STI structure and an entire sidewall of the stressor, and the same-material region is a continuous portion of the substrate.
    Type: Application
    Filed: September 23, 2014
    Publication date: February 12, 2015
    Inventors: Mei-Hsuan LIN, Chih-Hsun LIN, Chih-Kang CHAO, Ling-Sung WANG
  • ELECTRONIC DEVICE
    Publication number: 20150029647
    Abstract: An electronic device includes a frame and a display screen. The frame includes a receiving chamber. The receiving chamber has a slot and a first data connecting portion. The display screen is received in the receiving chamber and removable from the receiving chamber. The display screen includes a display surface, a rear surface and a side surface. The display screen further includes an engaging portion and a second data connecting portion. The engaging portion is engaged with the slot of the receiving chamber. The second data connecting portion is configured to exchange data with the first data connecting portion.
    Type: Application
    Filed: July 24, 2013
    Publication date: January 29, 2015
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: KUANG-SUNG WANG, CHIA-AO CHU
  • Semiconductor device having v-shaped region
    Patent number: 8940594
    Abstract: Among other things, a semiconductor device or transistor and a method for forming the semiconductor device are provided for herein. The semiconductor device comprises one or more v-shaped recesses in which stressed monocrystalline semiconductor material, such as silicon germanium, is grown, to form at least one of a source or a drain of the semiconductor device. The one or more v-shaped recesses are etched into a substrate in-situ. The semiconductor device comprises at least one of a source or a drain having a height-to-length ratio exceeding at least 1.6 when poly spacing between a first part of the semiconductor device (e.g., first transistor) and a second part of the semiconductor device (e.g., second transistor) is less than about 60 nm.
    Type: Grant
    Filed: December 24, 2012
    Date of Patent: January 27, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Chao-Hsuing Chen, Ling-Sung Wang, Chi-Yen Lin
  • System and method of monitoring and controlling atomic layer deposition of tungsten
    Patent number: 8900886
    Abstract: A method of semiconductor processing comprises providing a semiconductor wafer in a processing chamber; feeding at least one tungsten-containing precursor in a gas state into the processing chamber for atomic layer deposition (ALD) of tungsten; feeding at least one reducing chemical in a gas state into the processing chamber; and monitoring a concentration of at least one gaseous byproduct in the chamber; and providing a signal indicating concentration of the at least one gaseous byproduct in the chamber. The byproduct is produced by a reaction between the at least one tungsten-containing precursor and the at least one reducing chemical during the ALD.
    Type: Grant
    Filed: June 1, 2012
    Date of Patent: December 2, 2014
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Kun-Ei Chen, Jen-Yi Chen, Yi-Chung Lin, Chen-Chieh Chiang, Ling-Sung Wang
  • Systems And Methods For Aligning A Near-Eye Display Device
    Publication number: 20140347736
    Abstract: A near-eye display system includes (a) a near-eye display device, having a display and capable of providing, to a pupil of a user, an image from the display superimposed on an ambient scene, and (b) a fixture for coupling the near-eye display device to a holder mounted to the user, wherein the fixture has a plurality of degrees of freedom for alignment of the display device with respect to the pupil.
    Type: Application
    Filed: May 15, 2014
    Publication date: November 27, 2014
    Applicant: OmniVision Technologies, Inc.
    Inventors: Yi-Wei Liu, Wei-Feng Huang, Yen-Sung Wang, Chun-Sheng Fan
  • Near-Eye Display Systems, Devices And Methods
    Publication number: 20140347572
    Abstract: A near-eye display device includes (a) a display unit having a liquid-crystal-on-silicon (LCOS) display and a first polarizing beam splitter interface for (i) reflecting illumination light from an illumination module towards the liquid-crystal-on-silicon display and (ii) transmitting display light from the LCOS display based on the illumination light, and (b) a viewing unit having an imaging objective that forms an image of the LCOS display for the pupil based on the display light, and a second polarizing beam splitter interface for (i) reflecting reflected display light from the imaging objective towards the pupil and (ii) transmitting ambient light from an ambient scene towards a pupil, the second polarizing beam splitter interface and the first polarizing beam splitter interface being orthogonal to a common plane.
    Type: Application
    Filed: May 15, 2014
    Publication date: November 27, 2014
    Applicant: OmniVision Technologies, Inc.
    Inventors: Yi-Wei Liu, Wei-Feng Huang, Yen-Sung Wang, Chun-Sheng Fan
  • Mounting System For Glasses Frames
    Publication number: 20140345090
    Abstract: A system for attaching a device to a glasses frame includes a spring clip that applies pressure to two sides of the glasses frame, and a magnet for attaching the device thereto. The device may attach directly to the magnet, or via a slide-on attachment piece. The spring clip may include a spring arm having distal ends that assist the spring clip in applying pressure to the glasses frames.
    Type: Application
    Filed: May 15, 2014
    Publication date: November 27, 2014
    Applicant: OmniVision Technologies, Inc.
    Inventor: Yen-Sung Wang
  • SiGe SRAM BUTTED CONTACT RESISTANCE IMPROVEMENT
    Publication number: 20140295630
    Abstract: The present disclosure relates to a method for fabricating a butted a contact arrangement configured to couple two transistors, wherein an active region of a first transistor is coupled to a gate of a second transistor. The gate of the second transistor is formed from a gate material which comprises a dummy gate of the first transistor, and is configured to straddle a boundary between the active region of the first transistor and an isolation layer formed about the first transistor. The butted a contact arrangement results in a decreased contact resistance for the butted contact as compared to previous methods.
    Type: Application
    Filed: June 16, 2014
    Publication date: October 2, 2014
    Inventors: Chao-Hsuing Chen, Ling-Sung Wang, Chi-Yen Lin