Patents by Inventor Sung Woong Chung
Sung Woong Chung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11770980Abstract: An electronic device may include a semiconductor memory, and the semiconductor memory may include a multilayer synthetic anti-ferromagnetic (Multi SAF) structure including a first ferromagnetic layer, a second ferromagnetic layer, and a spacer layer interposed between the first ferromagnetic layer and the second ferromagnetic layer, wherein the spacer layer may include n non-magnetic layers and n?1 magnetic layers that are disposed such that each of the n non-magnetic layers and each of the n?1 magnetic layers are alternately stacked, wherein n indicates an odd number equal to or greater than 3, wherein the n?1 magnetic layers and n non-magnetic layers may be configured to effectuate an antiferromagnetic exchange coupling with at least one of the first ferromagnetic layer and the second ferromagnetic layer.Type: GrantFiled: August 12, 2020Date of Patent: September 26, 2023Assignee: SK HYNIX INC.Inventors: Tae Young Lee, Guk Cheon Kim, Soo Gil Kim, Min Seok Moon, Jong Koo Lim, Sung Woong Chung
-
Publication number: 20210184101Abstract: An electronic device may include a semiconductor memory, and the semiconductor memory may include a multilayer synthetic anti-ferromagnetic (Multi SAF) structure including a first ferromagnetic layer, a second ferromagnetic layer, and a spacer layer interposed between the first ferromagnetic layer and the second ferromagnetic layer, wherein the spacer layer may include n non-magnetic layers and n?1 magnetic layers that are disposed such that each of the n non-magnetic layers and each of the n?1 magnetic layers are alternately stacked, wherein n indicates an odd number equal to or greater than 3, wherein the n?1 magnetic layers and n non-magnetic layers may be configured to effectuate an antiferromagnetic exchange coupling with at least one of the first ferromagnetic layer and the second ferromagnetic layer.Type: ApplicationFiled: August 12, 2020Publication date: June 17, 2021Inventors: Tae Young Lee, Guk Cheon Kim, Soo Gil Kim, Min Seok Moon, Jong Koo Lim, Sung Woong Chung
-
Patent number: 10580969Abstract: An electronic device may include a semiconductor memory, and the semiconductor memory may include a first magnetic layer; a second magnetic layer; and a spacer layer interposed between the first magnetic layer and the second magnetic layer, wherein the spacer layer includes a first layer, a second layer and an intermediate layer interposed between the first layer and the second layer, and wherein each of the first layer and the second layer includes an oxide, or a nitride, or a combination of an oxide and a nitride, the intermediate layer includes a multilayer structure including [Ru/x]n or [x/Ru]n, x includes a metal, an oxide, or a nitride, or a combination of a metal, an oxide and a nitride, and n represents an integer of 1 or greater.Type: GrantFiled: December 4, 2018Date of Patent: March 3, 2020Assignees: SK hynix Inc., Toshiba Memory CorporationInventors: Tae-Young Lee, Jae-Hyoung Lee, Sung-Woong Chung, Eiji Kitagawa
-
Patent number: 10403345Abstract: An electronic device including a semiconductor memory. The semiconductor memory includes a bit line; a source line; a plurality of resistive memory cells among which a selected memory cell forms a current path between the bit line and the source line; a read current supply unit configured to supply read current to the bit line in a read operation; a sense amplifier configured to generate read data in response to a voltage level of the bit line in the read operation; and a variable switch element configured to flow current from the source line to a ground terminal in the read operation, and be decreased in its resistance value as a voltage level of the source line is high.Type: GrantFiled: February 12, 2018Date of Patent: September 3, 2019Assignee: SK hynix Inc.Inventors: Jae-Yun Yi, Sung-Woong Chung, Seok-Pyo Song
-
Publication number: 20190173001Abstract: An electronic device may include a semiconductor memory, and the semiconductor memory may include a first magnetic layer; a second magnetic layer; and a spacer layer interposed between the first magnetic layer and the second magnetic layer, wherein the spacer layer includes a first layer, a second layer and an intermediate layer interposed between the first layer and the second layer, and wherein each of the first layer and the second layer includes an oxide, or a nitride, or a combination of an oxide and a nitride, the intermediate layer includes a multilayer structure including [Ru/x]n or [x/Ru]n, x includes a metal, an oxide, or a nitride, or a combination of a metal, an oxide and a nitride, and n represents an integer of 1 or greater.Type: ApplicationFiled: December 4, 2018Publication date: June 6, 2019Inventors: Tae-Young LEE, Jae-Hyoung LEE, Sung-Woong CHUNG, Eiji KITAGAWA
-
Publication number: 20180277745Abstract: According to one embodiment, a magnetic memory device includes a magnetoresistive element, the magnetoresistive element including a first magnetic layer having a variable magnetization direction, a second magnetic layer having a fixed magnetization direction and a nonmagnetic layer provided between the first magnetic layer and the second magnetic layer. The first magnetic layer includes first and second sub-magnetic layers each containing at least iron (Fe) and boron (B), and a concentration of boron (B) contained in the first sub-magnetic layer is different from a concentration of boron (B) contained in the second sub-magnetic layer.Type: ApplicationFiled: September 12, 2017Publication date: September 27, 2018Applicants: TOSHIBA MEMORY CORPORATION, SK HYNIX INC.Inventors: Tadaaki OIKAWA, Toshihiko NAGASE, Youngmin EEH, Daisuke WATANABE, Kazuya SAWADA, Kenichi YOSHINO, Hiroyuki OHTORI, Yang Kon KIM, Ku Youl JUNG, Jong Koo LIM, Jae Hyoung LEE, Soo Man SEO, Sung Woong CHUNG, Tae Young LEE
-
Publication number: 20180166114Abstract: An electronic device including a semiconductor memory. The semiconductor memory includes a bit line; a source line; a plurality of resistive memory cells among which a selected memory cell forms a current path between the bit line and the source line; a read current supply unit configured to supply read current to the bit line in a read operation; a sense amplifier configured to generate read data in response to a voltage level of the bit line in the read operation; and a variable switch element configured to flow current from the source line to a ground terminal in the read operation, and be decreased in its resistance value as a voltage level of the source line is high.Type: ApplicationFiled: February 12, 2018Publication date: June 14, 2018Inventors: Jae-Yun Yi, Sung-Woong Chung, Seok-Pyo Song
-
Patent number: 9923026Abstract: Provided an electronic device including a semiconductor memory. The semiconductor memory may include: a selecting element; a variable resistance element electrically coupled to the selecting element through a first conductive plug; a first line electrically coupled to the variable resistance element through a second conductive plug; a second line electrically coupled to the selecting element through a third conductive plug; and one or more barrier layers arranged to form one or more electrical connections with the variable resistance element or the selecting element or the both and operated as an insulator or conductor according to a resistance state of the variable resistance element during a read operation.Type: GrantFiled: September 24, 2015Date of Patent: March 20, 2018Assignee: SK hynix Inc.Inventors: Yu-Jin Kim, Sung-Woong Chung
-
Patent number: 9892774Abstract: An electronic device including a semiconductor memory. The semiconductor memory includes a bit line; a source line; a plurality of resistive memory cells among which a selected memory cell forms a current path between the bit line and the source line; a read current supply unit configured to supply read current to the bit line in a read operation; a sense amplifier configured to generate read data in response to a voltage level of the bit line in the read operation; and a variable switch element configured to flow current from the source line to a ground terminal in the read operation, and be decreased in its resistance value as a voltage level of the source line is high.Type: GrantFiled: August 8, 2016Date of Patent: February 13, 2018Assignee: SK hynix Inc.Inventors: Jae-Yun Yi, Sung-Woong Chung, Seok-Pyo Song
-
Patent number: 9570511Abstract: Electronic devices having semiconductor elements and methods for fabricating such devices including, a method for fabricating an electronic device including a semiconductor memory, which includes: forming a sacrificial layer on a substrate including a first region and a second region; selectively etching the sacrificial layer and the substrate of the first region to form a trench; forming a first gate that fills a part of the trench in the first region; forming a gate protection layer on the first gate to fill the remaining part of the trench; removing the sacrificial layer of the first region to form a grooved portion surrounded by the gate protection layer; forming a conductive plug to cover the grooved portion; removing the sacrificial layer of the second region; and forming a second gate on the substrate of the second region.Type: GrantFiled: April 30, 2016Date of Patent: February 14, 2017Assignee: SK hynix Inc.Inventors: Seok-Pyo Song, Sung-Woong Chung, Jong-Han Shin
-
Patent number: 9520187Abstract: This patent document relates to memory circuits or devices and their applications in electronic devices or systems. The disclosed technology in this patent document includes memory circuits or devices and their applications in electronic devices or systems and various implementations of an electronic device in which an electronic device capable of reducing an area, improving device characteristics due to a reduction in the resistance of a switching transistor, simplifying the process, and reducing a cost is provided. In accordance with the electronic device of this patent document, an area can be reduced, device characteristics can be improved due to a reduction in the resistance of the switching transistor, the process can be simplified, and a cost can be reduced.Type: GrantFiled: September 28, 2015Date of Patent: December 13, 2016Assignee: SK hynix Inc.Inventors: Jae-Yun Yi, Sung-Woong Chung, Seok-Pyo Song
-
Publication number: 20160351241Abstract: An electronic device including a semiconductor memory. The semiconductor memory includes a bit line; a source line; a plurality of resistive memory cells among which a selected memory cell forms a current path between the bit line and the source line; a read current supply unit configured to supply read current to the bit line in a read operation; a sense amplifier configured to generate read data in response to a voltage level of the bit line in the read operation; and a variable switch element configured to flow current from the source line to a ground terminal in the read operation, and be decreased in its resistance value as a voltage level of the source line is high.Type: ApplicationFiled: August 8, 2016Publication date: December 1, 2016Inventors: Jae-Yun Yi, Sung-Woong Chung, Seok-Pyo Song
-
Publication number: 20160308114Abstract: Provided an electronic device including a semiconductor memory. The semiconductor memory may include: a selecting element; a variable resistance element electrically coupled to the selecting element through a first conductive plug; a first line electrically coupled to the variable resistance element through a second conductive plug; a second line electrically coupled to the selecting element through a third conductive plug; and one or more barrier layers arranged to form one or more electrical connections with the variable resistance element or the selecting element or the both and operated as an insulator or conductor according to a resistance state of the variable resistance element during a read operation.Type: ApplicationFiled: September 24, 2015Publication date: October 20, 2016Inventors: Yu-Jin Kim, Sung-Woong Chung
-
Publication number: 20160247856Abstract: Electronic devices having semiconductor elements and methods for fabricating such devices including, a method for fabricating an electronic device including a semiconductor memory, which includes: forming a sacrificial layer on a substrate including a first region and a second region; selectively etching the sacrificial layer and the substrate of the first region to form a trench; forming a first gate that fills a part of the trench in the first region; forming a gate protection layer on the first gate to fill the remaining part of the trench; removing the sacrificial layer of the first region to form a grooved portion surrounded by the gate protection layer; forming a conductive plug to cover the grooved portion; removing the sacrificial layer of the second region; and forming a second gate on the substrate of the second region.Type: ApplicationFiled: April 30, 2016Publication date: August 25, 2016Inventors: Seok-Pyo Song, Sung-Woong Chung, Jong-Han Shin
-
Patent number: 9412444Abstract: An electronic device including a semiconductor memory. The semiconductor memory includes a bit line; a source line; a plurality of resistive memory cells among which a selected memory cell forms a current path between the bit line and the source line; a read current supply unit configured to supply read current to the bit line in a read operation; a sense amplifier configured to generate read data in response to a voltage level of the bit line in the read operation; and a variable switch element configured to flow current from the source line to a ground terminal in the read operation, and be decreased in its resistance value as a voltage level of the source line is high.Type: GrantFiled: May 13, 2014Date of Patent: August 9, 2016Assignee: SK hynix Inc.Inventors: Jae-Yun Yi, Sung-Woong Chung, Seok-Pyo Song
-
Patent number: 9406380Abstract: Provided is an electronic device including a semiconductor memory unit. The semiconductor memory unit may include: a storage cell comprising a variable resistance element; a first selecting element coupled to one end of the storage cell and having a threshold voltage set to a first voltage; and a second selecting element coupled to the other end of the storage cell and having a threshold voltage set to a second voltage higher than the first voltage.Type: GrantFiled: July 28, 2014Date of Patent: August 2, 2016Assignee: SK hynix Inc.Inventors: Jae-Yun Yi, Sung-Woong Chung, Seok-Pyo Song
-
Patent number: 9331267Abstract: Electronic devices having semiconductor elements and methods for fabricating such devices including, a method for fabricating an electronic device including a semiconductor memory, which includes: forming a sacrificial layer on a substrate including a first region and a second region; selectively etching the sacrificial layer and the substrate of the first region to form a trench; forming a first gate that fills a part of the trench in the first region; forming a gate protection layer on the first gate to fill the remaining part of the trench; removing the sacrificial layer of the first region to form a grooved portion surrounded by the gate protection layer; forming a conductive plug to cover the grooved portion; removing the sacrificial layer of the second region; and forming a second gate on the substrate of the second region.Type: GrantFiled: February 24, 2014Date of Patent: May 3, 2016Assignee: SK hynix Inc.Inventors: Seok-Pyo Song, Sung-Woong Chung, Jong-Han Shin
-
Publication number: 20160019956Abstract: This patent document relates to memory circuits or devices and their applications in electronic devices or systems. The disclosed technology in this patent document includes memory circuits or devices and their applications in electronic devices or systems and various implementations of an electronic device in which an electronic device capable of reducing an area, improving device characteristics due to a reduction in the resistance of a switching transistor, simplifying the process, and reducing a cost is provided. In accordance with the electronic device of this patent document, an area can be reduced, device characteristics can be improved due to a reduction in the resistance of the switching transistor, the process can be simplified, and a cost can be reduced.Type: ApplicationFiled: September 28, 2015Publication date: January 21, 2016Inventors: Jae-Yun Yi, Sung-Woong Chung, Seok-Pyo Song
-
Patent number: 9147442Abstract: This patent document relates to memory circuits or devices and their applications in electronic devices or systems. The disclosed technology in this patent document includes memory circuits or devices and their applications in electronic devices or systems and various implementations of an electronic device in which an electronic device capable of reducing an area, improving device characteristics due to a reduction in the resistance of a switching transistor, simplifying the process, and reducing a cost is provided. In accordance with the electronic device of this patent document, an area can be reduced, device characteristics can be improved due to a reduction in the resistance of the switching transistor, the process can be simplified, and a cost can be reduced.Type: GrantFiled: March 21, 2014Date of Patent: September 29, 2015Assignee: SK hynix Inc.Inventors: Jae-Yun Yi, Sung-Woong Chung, Seok-Pyo Song
-
Publication number: 20150248932Abstract: Provided is an electronic device including a semiconductor memory unit. The semiconductor memory unit may include: a storage cell comprising a variable resistance element; a first selecting element coupled to one end of the storage cell and having a threshold voltage set to a first voltage; and a second selecting element coupled to the other end of the storage cell and having a threshold voltage set to a second voltage higher than the first voltage.Type: ApplicationFiled: July 28, 2014Publication date: September 3, 2015Inventors: Jae-Yun Yi, Sung-Woong Chung, Seok-Pyo Song