Patents by Inventor Sung Woong Chung

Sung Woong Chung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090026541
    Abstract: A semiconductor device includes a tube-type channel formed over a semiconductor substrate. The tube-type channel is connected to first and second conductive lines. A bias electrode is formed in the tube-type channel. The bias electrode is connected to the semiconductor substrate. An insulating film is disposed between the tube-type channel and the bias electrode. A surrounding gate electrode is formed over the tube-type channel.
    Type: Application
    Filed: October 3, 2007
    Publication date: January 29, 2009
    Applicant: Hynix Semiconductor Inc.
    Inventor: Sung Woong CHUNG
  • Publication number: 20090001458
    Abstract: The semiconductor device includes an active region, a stepped recess channel region including vertical channel structures, a gate insulating film, and a gate structure. The active region is defined by a device isolation structure formed in a semiconductor substrate. The stepped recess channel region is formed in the active region. The vertical silicon-on-insulator (SOI) channel structures are disposed at sidewalls of both device isolation structures in a longitudinal direction of a gate region. The gate insulating film is disposed over the active region including the stepped recess channel region. The gate structure is disposed over the stepped recess channel region of the gate region.
    Type: Application
    Filed: August 29, 2008
    Publication date: January 1, 2009
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventors: Sung Woong Chung, Sang Don Lee
  • Patent number: 7459358
    Abstract: The semiconductor device includes an active region, a recess, a Fin-type channel region, a gate insulating film, and a gate electrode. The active region is defined by a device isolation structure formed in a semiconductor substrate. The recess is formed by etching the active region and its neighboring device isolation structure using an island-type recess gate mask as an etching mask. The Fin-type channel region is formed on the semiconductor substrate at a lower part of the recess. The gate insulating film is formed over the active region including the Fin-type channel region and the recess. The gate electrode is formed over the gate insulating film to fill up the Fin-type channel region and the recess.
    Type: Grant
    Filed: May 1, 2006
    Date of Patent: December 2, 2008
    Assignee: Hynix Semiconductor Inc.
    Inventors: Sang Don Lee, Sung Woong Chung
  • Patent number: 7432162
    Abstract: The semiconductor device includes an active region, a stepped recess channel region including vertical channel structures, a gate insulating film, and a gate structure. The active region is defined by a device isolation structure formed in a semiconductor substrate. The stepped recess channel region is formed in the active region. The vertical silicon-on-insulator (SOI) channel structures are disposed at sidewalls of both device isolation structures in a longitudinal direction of a gate region. The gate insulating film is disposed over the active region including the stepped recess channel region. The gate structure is disposed over the stepped recess channel region of the gate region.
    Type: Grant
    Filed: July 6, 2006
    Date of Patent: October 7, 2008
    Assignee: Hynix Semiconductor Inc.
    Inventors: Sung Woong Chung, Sang Don Lee
  • Publication number: 20070252198
    Abstract: The semiconductor device includes a device isolation structure formed in a semiconductor substrate to define an active region having a recess region at a lower part of sidewalls thereof. The semiconductor device additionally has a fin channel region protruded over the device isolation structure in a longitudinal direction of a gate region; a gate insulating film formed over the semiconductor substrate including the protruded fin channel region; and a gate electrode formed over the gate insulating film to fill up the protruded fin channel region.
    Type: Application
    Filed: September 29, 2006
    Publication date: November 1, 2007
    Applicant: Hynix Semiconductor Inc.
    Inventors: Sung Woong Chung, Sang Don Lee
  • Publication number: 20070252199
    Abstract: The semiconductor device having a recess channel transistor includes a device isolation structure formed in a semiconductor substrate to define an active region having a recess region at a lower part of sidewalls thereof and a recess channel region formed in the semiconductor substrate under the active region. A method for fabricating the semiconductor device includes forming a device isolation structure in a semiconductor substrate to form an active region having a recess region at a lower part of sidewalls thereof, a gate insulating film formed over the semiconductor substrate including the recess channel region, and a gate electrode formed over the gate insulating film to fill up the recess channel region.
    Type: Application
    Filed: September 29, 2006
    Publication date: November 1, 2007
    Applicant: Hynix Semiconductor Inc.
    Inventors: Sung Woong Chung, Sang Don Lee
  • Patent number: 6949447
    Abstract: A method for fabricating an isolation layer in a semiconductor device is disclosed. The disclosed method comprises steps of: forming a trench on a semiconductor substrate; forming a flowing insulating layer within the trench; making the insulating layer precise; and forming a precise insulating layer over an upper surface of the whole structure on which the flowing insulating layer is formed. According to the method of fabricating an isolation layer in a semiconductor device, occurrence of fine pores at adjacent active regions of sidewalls in a trench can be prevented.
    Type: Grant
    Filed: December 17, 2003
    Date of Patent: September 27, 2005
    Assignee: Hynix Semiconductor Inc.
    Inventors: Sang Tae Ahn, Sung Woong Chung, Hyun Chul Sohn
  • Publication number: 20040214405
    Abstract: A method for fabricating an isolation layer in a semiconductor device is disclosed. The disclosed method comprises steps of: forming a trench on a semiconductor substrate; forming a flowing insulating layer within the trench; making the insulating layer precise; and forming a precise insulating layer over an upper surface of the whole structure on which the flowing insulating layer is formed. According to the method of fabricating an isolation layer in a semiconductor device, occurrence of fine pores at adjacent active regions of sidewalls in a trench can be prevented.
    Type: Application
    Filed: December 17, 2003
    Publication date: October 28, 2004
    Inventors: Sang Tae Ahn, Sung Woong Chung, Hyun Chul Sohn