Abstract: The present invention relates to a method of generating a word embedding library, including: receiving, by a processor, original text composed of Hangul through an input interface; segmenting, by the processor, the original text by morpheme, combining segmented morphemes step by step according to a preset rule, and matching a tag to a combination of step-by-step morphemes according to a morphological attribute or a syntactic attribute of the combination of step-by-step morphemes; and generating, by the processor, a word embedding library by classifying the morphemes included in the original text based on the tag matched to the combination of step-by-step morphemes.

Abstract: Provided is a method for determining a mobility user's movement pattern using artificial intelligence, the method being performed by a computing device and including: acquiring movement data of the computing device that the user taking a transportation means carries; and acquiring a type of the transportation means by using an artificial intelligence model trained with the movement data.

Abstract: Proposed is a board game system for carbon neutrality education including: a game display unit including a game board, general cards having carbon cards on which carbon emission quantities are indicated and environment cards on which carbon absorption quantities are indicated, disaster cards on which climate crisis disasters are indicated, convention cards on which rights to change greenhouse gas target amounts are indicated, earth money cards on which scores are indicated, and an indicator for indicating the level of global warming and carbon emission targets; and a game control unit for controlling the game display unit to display the general cards, the disaster cards, the convention cards, the earth money cards, or the indicator on the game board.

Abstract: A method of predicting a shape of a semiconductor device includes implementing a modeled semiconductor shape with respect to a designed semiconductor layout, extracting a plurality of samples by independently linearly combining process variables with respect to the modeled semiconductor shape; generating virtual spectrums with respect to ones of the extracted plurality of samples through optical analysis, indexing the virtual spectrums to produce indexed virtual spectrums, generating a shape prediction model by using the indexed virtual spectrums as an input and the modeled semiconductor shape as an output, and indexing a spectrum measured from a manufactured semiconductor device and inputting the spectrum to the shape prediction model to predict a shape of the manufactured semiconductor device.

Abstract: Provided herein may be a semiconductor device. The semiconductor device may include a first substrate, a second substrate disposed on the first substrate, a stack which is disposed on the second substrate and includes stacked memory cells, and a discharge contact structure electrically coupling the second substrate with the first substrate such that charges in the second substrate are discharged to the first substrate.

Abstract: A wafer measurement system for measuring a measurable characteristic of a first measurement target formed on a wafer includes: a memory and a processor. The memory is configured to store an image of the wafer, multiple templates each including at least one line, and a measurement program. The processor is accessible to the memory and is configured to execute multiple modules included in the measurement program. The modules include: a template selection module configured to receive the templates and select a measurement template corresponding to a shape of the first measurement target; a template matching module configured to match the measurement template to the first measurement target; and a measurement module configured to measure the measurable characteristic of the first measurement target based on position information of the measurement template.

Abstract: A system of analyzing a crystal defect includes an image processor, an image generator, and a comparator. The image processor processes a measured transmission electron microscope (TEM) image that is provided by capturing an image of a specimen having a crystal structure, to provide structural defect information of the specimen. The image generator provides a plurality of virtual TEM images corresponding to a plurality of three-dimensional structural defects of the crystal structure. The comparator compares the measured TEM image with the plurality of virtual TEM images using the structural defect information to determine a defect type of the measured TEM image.

Abstract: A method of predicting a shape of a semiconductor device includes implementing a modeled semiconductor shape with respect to a designed semiconductor layout, extracting a plurality of samples by independently linearly combining process variables with respect to the modeled semiconductor shape; generating virtual spectrums with respect to ones of the extracted plurality of samples through optical analysis, indexing the virtual spectrums to produce indexed virtual spectrums, generating a shape prediction model by using the indexed virtual spectrums as an input and the modeled semiconductor shape as an output, and indexing a spectrum measured from a manufactured semiconductor device and inputting the spectrum to the shape prediction model to predict a shape of the manufactured semiconductor device.

Abstract: A system of analyzing a crystal defect includes an image processor, an image generator, and a comparator. The image processor processes a measured transmission electron microscope (TEM) image that is provided by capturing an image of a specimen having a crystal structure, to provide structural defect information of the specimen. The image generator provides a plurality of virtual TEM images corresponding to a plurality of three-dimensional structural defects of the crystal structure. The comparator compares the measured TEM image with the plurality of virtual TEM images using the structural defect information to determine a defect type of the measured TEM image.

Abstract: Provided herein may be a semiconductor device. The semiconductor device may include a first substrate, a second substrate disposed on the first substrate, a stack which is disposed on the second substrate and includes stacked memory cells, and a discharge contact structure electrically coupling the second substrate with the first substrate such that charges in the second substrate are discharged to the first substrate.

Abstract: A wafer measurement system for measuring a measurable characteristic of a first measurement target formed on a wafer includes: a memory and a processor. The memory is configured to store an image of the wafer, multiple templates each including at least one line, and a measurement program. The processor is accessible to the memory and is configured to execute multiple modules included in the measurement program. The modules include: a template selection module configured to receive the templates and select a measurement template corresponding to a shape of the first measurement target; a template matching module configured to match the measurement template to the first measurement target; and a measurement module configured to measure the measurable characteristic of the first measurement target based on position information of the measurement template.

Abstract: Provided herein may be a semiconductor device. The semiconductor device may include a first substrate, a second substrate disposed on the first substrate, a stack which is disposed on the second substrate and includes stacked memory cells, and a discharge contact structure electrically coupling the second substrate with the first substrate such that charges in the second substrate are discharged to the first substrate.

Abstract: A method of inspecting patterns formed the manufacturing of semiconductor devices or the like includes producing an image of the patterns, producing a boundary image including a plurality of boundary patterns corresponding to first and second boundaries of each of the patterns, combining the pattern image and the boundary image to produce an overlapping image including overlapping patterns in which the patterns fill regions between the boundary patterns, and binarizing the overlapping image to produce a binary image including binary patterns corresponding to the overlapping patterns.

Abstract: Provided herein may be a semiconductor device. The semiconductor device may include a first substrate, a second substrate disposed on the first substrate, a stack which is disposed on the second substrate and includes stacked memory cells, and a discharge contact structure electrically coupling the second substrate with the first substrate such that charges in the second substrate are discharged to the first substrate.

Abstract: A method of inspecting patterns formed the manufacturing of semiconductor devices or the like includes producing an image of the patterns, producing a boundary image including a plurality of boundary patterns corresponding to first and second boundaries of each of the patterns, combining the pattern image and the boundary image to produce an overlapping image including overlapping patterns in which the patterns fill regions between the boundary patterns, and binarizing the overlapping image to produce a binary image including binary patterns corresponding to the overlapping patterns.

Abstract: A semiconductor device including conductive lines configured to include first lines extending generally in parallel in a first direction and second lines extending generally in parallel in a second direction to intersect the first direction from the respective ends of the first lines and each second line having a width wider than the first line, and dummy patterns formed between the second lines.

Abstract: A semiconductor memory apparatus comprises first and second memory blocks each comprising semiconductor elements coupled to first and second local line groups, a first switching circuit configured to couple a first global line group to the first local line group of the first memory block in response to a block selection signal, a second switching circuit configured to couple a second global line group to the second local line groups of the first and second memory blocks in response to the block selection signal, and a third switching circuit configured to couple the first global line group to the first local line group of the second memory block in response to the block selection signal.

Abstract: A semiconductor memory apparatus comprises first and second memory blocks each comprising semiconductor elements coupled to first and second local line groups, a first switching circuit configured to couple a first global line group to the first local line group of the first memory block in response to a block selection signal, a second switching circuit configured to couple a second global line group to the second local line groups of the first and second memory blocks in response to the block selection signal, and a third switching circuit configured to couple the first global line group to the first local line group of the second memory block in response to the block selection signal.

Abstract: A semiconductor device including conductive lines configured to include first lines extending generally in parallel in a first direction and second lines extending generally in parallel in a second direction to intersect the first direction from the respective ends of the first lines and each second line having a width wider than the first line, and dummy patterns formed between the second lines.

Abstract: Disclosed is a cosmetic composition having a double-shell type nano-structure. More particularly, the nano-structure of the cosmetic composition includes: a water-soluble bioactive ingredient core; a core shell containing poly(ethyleneglycol)-poly(caprolactone)-poly(ethyleneglycol) (PE-PCL-PEG) triblock copolymer in order to include the bioactive ingredient core therein; and an outer shell containing phospholipids or derivatives thereof in order to enclose the core shell therein. Such a cosmetic composition improves stability of active components which are prone to oxidation, light degradation, heat degradation, etc., is formed in a nanoparticle size which in turn shows high transdermal absorption and is very useful to prepare a cosmetic composition stably encapsulating various bioactive ingredients with anti-wrinkle effects, whitening effects, and so forth.