Patents by Inventor Sungkwan An

Sungkwan An has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210202008
    Abstract: An operation method of a memory system may include monitoring the size of a programmable area included in each of a plurality of open blocks in which a plurality of data having different attributes are stored, respectively, and generating a first free block by performing a first erase operation on a part of a plurality of erase target blocks based on the number of first open blocks, each open block of which the programmable area has a size less than a threshold value, among the plurality of open blocks.
    Type: Application
    Filed: July 2, 2020
    Publication date: July 1, 2021
    Inventors: Jooyoung Lee, Kyumin Lee, Changhan Kim, Sungkwan Hong
  • Patent number: 11004976
    Abstract: A semiconductor device has a silicide source/drain region is fabricated by growing silicon on an epitaxial region including silicon and either germanium or carbon. In the method, a gate electrode is formed on a semiconductor substrate with a gate insulating layer interposed therebetween. An epitaxial layer is formed in the semiconductor substrate at both sides of the gate electrodes. A silicon layer is formed to cap the epitaxial layer. The silicon layer and a metal material are reacted to form a silicide layer. In a PMOS, the epitaxial layer has a top surface and inclined side surfaces that are exposed above the upper surface of the active region. The silicon layer is grown on the epitaxial layer in such a way as to cap the top and inclined surfaces.
    Type: Grant
    Filed: March 12, 2019
    Date of Patent: May 11, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sungkwan Kang, Keum Seok Park, Byeongchan Lee, Sangbom Kang, Nam-Kyu Kim
  • Publication number: 20190214498
    Abstract: A semiconductor device has a silicide source/drain region is fabricated by growing silicon on an epitaxial region including silicon and either germanium or carbon. In the method, a gate electrode is formed on a semiconductor substrate with a gate insulating layer interposed therebetween. An epitaxial layer is formed in the semiconductor substrate at both sides of the gate electrodes. A silicon layer is formed to cap the epitaxial layer. The silicon layer and a metal material are reacted to form a silicide layer. In a PMOS, the epitaxial layer has a top surface and inclined side surfaces that are exposed above the upper surface of the active region. The silicon layer is grown on the epitaxial layer in such a way as to cap the top and inclined surfaces.
    Type: Application
    Filed: March 12, 2019
    Publication date: July 11, 2019
    Inventors: Sungkwan Kang, Keum Seok Park, Byeongchan Lee, Sangbom Kang, Nam-Kyu Kim
  • Patent number: 10263109
    Abstract: A semiconductor device has a silicide source/drain region is fabricated by growing silicon on an epitaxial region including silicon and either germanium or carbon. In the method, a gate electrode is formed on a semiconductor substrate with a gate insulating layer interposed therebetween. An epitaxial layer is formed in the semiconductor substrate at both sides of the gate electrodes. A silicon layer is formed to cap the epitaxial layer. The silicon layer and a metal material are reacted to form a silicide layer. In a PMOS, the epitaxial layer has a top surface and inclined side surfaces that are exposed above the upper surface of the active region. The silicon layer is grown on the epitaxial layer in such a way as to cap the top and inclined surfaces.
    Type: Grant
    Filed: January 14, 2016
    Date of Patent: April 16, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sungkwan Kang, Keum Seok Park, Byeongchan Lee, Sangbom Kang, Nam-Kyu Kim
  • Patent number: 10170622
    Abstract: A semiconductor device has a silicide source/drain region is fabricated by growing silicon on an epitaxial region including silicon and either germanium or carbon. In the method, a gate electrode is formed on a semiconductor substrate with a gate insulating layer interposed therebetween. An epitaxial layer is formed in the semiconductor substrate at both sides of the gate electrodes. A silicon layer is formed to cap the epitaxial layer. The silicon layer and a metal material are reacted to form a silicide layer. In a PMOS, the epitaxial layer has a top surface and inclined side surfaces that are exposed above the upper surface of the active region. The silicon layer is grown on the epitaxial layer in such a way as to cap the top and inclined surfaces.
    Type: Grant
    Filed: June 12, 2017
    Date of Patent: January 1, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sungkwan Kang, Keum Seok Park, Byeongchan Lee, Sangbom Kang, Nam-Kyu Kim
  • Patent number: 9806910
    Abstract: Disclosed herein is a gateway device including a communication interface provided with a plurality of channels capable of connecting to an external device; a switch unit configured to determine a connection state between the plurality of channels; and a controller configured to group a Controller Area Network (CAN) signal, which is received from a first external device connected to a first channel among the plurality of channels, into a message frame, and when an identifier of the message frame is included in a pre-determined high-speed transmission identifier group, configured to control the switch unit so that a second channel to which a second external device corresponding to the identifier is connected, is connected to the first channel.
    Type: Grant
    Filed: October 21, 2015
    Date of Patent: October 31, 2017
    Assignee: Hyundai Motor Company
    Inventors: Jungnan Ryu, SungKwan Choo, Joon Ho Lee
  • Publication number: 20170278967
    Abstract: A semiconductor device has a silicide source/drain region is fabricated by growing silicon on an epitaxial region including silicon and either germanium or carbon. In the method, a gate electrode is formed on a semiconductor substrate with a gate insulating layer interposed therebetween. An epitaxial layer is formed in the semiconductor substrate at both sides of the gate electrodes. A silicon layer is formed to cap the epitaxial layer. The silicon layer and a metal material are reacted to form a silicide layer. In a PMOS, the epitaxial layer has a top surface and inclined side surfaces that are exposed above the upper surface of the active region. The silicon layer is grown on the epitaxial layer in such a way as to cap the top and inclined surfaces.
    Type: Application
    Filed: June 12, 2017
    Publication date: September 28, 2017
    Inventors: Sungkwan Kang, Keum Seok Park, Byeongchan Lee, Sangbom Kang, Nam-Kyu Kim
  • Patent number: 9760795
    Abstract: A method for extracting features from an image for use in a computing device, the method comprising: producing Gaussian Scale Space (GSS) images in the type of a pyramid from the image inputted to the computing device; performing a Scale Normalized Laplacian Filtering on the GSS images; detecting interest points from the images that are subject to the Scale Normalized Laplacian Filtering; and extracting features of the image using the detected interest points.
    Type: Grant
    Filed: April 29, 2014
    Date of Patent: September 12, 2017
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Seungjae Lee, Sangil Na, Keun Dong Lee, Sungkwan Je, Da-Un Jung, Weon Geun Oh, Young Ho Suh, Wookho Son
  • Publication number: 20160381679
    Abstract: Disclosed herein is a gateway device including a communication interface provided with a plurality of channels capable of connecting to an external device; a switch unit configured to determine a connection state between the plurality of channels; and a controller configured to group a Controller Area Network (CAN) signal, which is received from a first external device connected to a first channel among the plurality of channels, into a message frame, and when an identifier of the message frame is included in a pre-determined high-speed transmission identifier group, configured to control the switch unit so that a second channel to which a second external device corresponding to the identifier is connected, is connected to the first channel.
    Type: Application
    Filed: October 21, 2015
    Publication date: December 29, 2016
    Inventors: Jungnan Ryu, SungKwan Choo, Joon Ho Lee
  • Publication number: 20160275124
    Abstract: Provided is a visual search system. The visual search system according to an embodiment of the inventive concept may include a database that stores characteristic information for a visual search, and a visual search update server that updates the DB based on an image of a target captured by a moving object or a fixed object. According to an embodiment of the inventive concept, it is possible to efficiently update a DB for a visual search because images captured by not only the moving object but also the fixed object are used.
    Type: Application
    Filed: March 18, 2016
    Publication date: September 22, 2016
    Inventors: Seungjae LEE, Keun Dong LEE, Weon Geun OH, DA-UN JUNG, Sungkwan JE
  • Patent number: 9449677
    Abstract: A semiconductor device may include a semiconductor substrate with first and second spaced apart source/drain regions defining a channel region therebetween and a control gate structure on the channel region between the first and second spaced apart source/drain regions. More particularly, the control gate structure may include a first gate electrode on the channel region adjacent the first source/drain region, and a second gate electrode on the channel region adjacent the second source/drain region. Moreover, the first and second gate electrodes may be electrically isolated. Related devices, structures, methods of operation, and methods of fabrication are also discussed.
    Type: Grant
    Filed: November 10, 2014
    Date of Patent: September 20, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jiyoung Kim, Yongchul Oh, Dongsoo Woo, Hyun-Woo Chung, Gyoyoung Jin, Sungkwan Choi, Hyeongsun Hong, Yoosang Hwang
  • Publication number: 20160133748
    Abstract: A semiconductor device has a silicide source/drain region is fabricated by growing silicon on an epitaxial region including silicon and either germanium or carbon. In the method, a gate electrode is formed on a semiconductor substrate with a gate insulating layer interposed therebetween. An epitaxial layer is formed in the semiconductor substrate at both sides of the gate electrodes. A silicon layer is formed to cap the epitaxial layer. The silicon layer and a metal material are reacted to form a silicide layer. In a PMOS, the epitaxial layer has a top surface and inclined side surfaces that are exposed above the upper surface of the active region. The silicon layer is grown on the epitaxial layer in such a way as to cap the top and inclined surfaces.
    Type: Application
    Filed: January 14, 2016
    Publication date: May 12, 2016
    Inventors: Sungkwan Kang, Keum Seok Park, Byeongchan Lee, Sangbom Kang, Nam-Kyu Kim
  • Patent number: 9263495
    Abstract: A method of fabricating an image sensor is provided. The method may include preparing a substrate with first to third pixel regions, coating a first color filter layer on the substrate, sequentially forming a first sacrificial layer and a first protection layer to cover the first color filter layer, forming a first photoresist pattern on the first protection layer to be overlapped with the first pixel region, performing a first dry etching process using the first photoresist pattern as an etch mask to the first sacrificial layer and the first protection layer to form a first color filter, a first sacrificial pattern, and a first protection pattern sequentially stacked on the first pixel region, and selectively removing the first sacrificial pattern to separate the first protection pattern from the first color filter.
    Type: Grant
    Filed: November 26, 2014
    Date of Patent: February 16, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sungkwan Kim, Soo-Kyung Kim, Jung-kuk Park, Myung-Sun Kim, Jaesung Yun, Junetaeg Lee, Hakyu Choi
  • Patent number: 9209241
    Abstract: Semiconductor devices are provided. Each of the semiconductor devices may include a substrate including an active region that includes first and second regions. Each of the semiconductor devices may include a device isolation layer between the first and second regions of the active region. Each of the semiconductor devices may include a contact hole defined by recessed portions of the device isolation layer and the first region of the active region, respectively. Moreover, a topmost surface of the first region of the active region may define a bottommost portion of the contact hole. Related methods of forming semiconductor devices are also provided.
    Type: Grant
    Filed: October 22, 2013
    Date of Patent: December 8, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Bongsoo Kim, Junghwan Park, Sungkwan Choi, Kyuhyun Lee, HyeongSun Hong, Yoosang Hwang
  • Patent number: 9176584
    Abstract: A haptic device for human/computer interface includes a user interface tool coupled via cables to first, second, third, and fourth cable control units, each positioned at a vertex of a tetrahedron. Each of the cable control units includes a spool and an encoder configured to provide a signal corresponding to rotation of the respective spool. The cables are wound onto the spool of a respective one of the cable control units. The encoders provide signals corresponding to rotation of the respective spools to track the length of each cable. As the cables wind onto the spools, variations in spool diameter are compensated for. The absolute length of each cable is determined during initialization by retracting each cable In turn to a zero length position. A sensor array coupled to the tool detects rotation around one or more axes.
    Type: Grant
    Filed: October 13, 2011
    Date of Patent: November 3, 2015
    Inventors: Jeffrey J. Berkley, Seahak Kim, Sungkwan Hong
  • Patent number: 9165935
    Abstract: A semiconductor device includes a semiconductor substrate including first trenches defining outer sidewalls of a pair of active pillars and a second trench defining opposing inner sidewalls of the pair of active pillars. The second trench may have a bottom surface located at a higher level than bottom surface of the first trench. Auxiliary conductive lines may be disposed in the first trenches to cover and cross the outer sidewalls of the pair of active pillars. A pair of main conductive lines may be disposed in a pair of recessed regions that are laterally recessed from lower portions of the inner sidewalls of the active pillars into the pair of active pillars. A common impurity region may be disposed in the semiconductor substrate under the second trench. Upper impurity regions may be disposed in upper portions of the active pillars.
    Type: Grant
    Filed: June 26, 2012
    Date of Patent: October 20, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyun-Woo Chung, Jiyoung Kim, Yongchul Oh, Sungkwan Choi, Yoosang Hwang
  • Publication number: 20150242703
    Abstract: A method for extracting features from an image for use in a computing device, the method comprising: producing Gaussian Scale Space (GSS) images in the type of a pyramid from the image inputted to the computing device; performing a Scale Normalized Laplacian Filtering on the GSS images; detecting interest points from the images that are subject to the Scale Normalized Laplacian Filtering; and extracting features of the image using the detected interest points.
    Type: Application
    Filed: April 29, 2014
    Publication date: August 27, 2015
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Seungjae LEE, Sangil NA, Keun Dong LEE, Sungkwan JE, DA-UN JUNG, Weon Geun OH, Young Ho SUH, Wookho SON
  • Publication number: 20150179574
    Abstract: According to a method of fabricating a semiconductor device, a first mask pattern is used to etch first device isolation layers and active lines or form grooves, in which word lines will be provided. Thereafter, the active lines are etched in a self-alignment manner by using the first mask pattern as an etch mask. As a result, it is possible to suppress mask misalignment from occurring.
    Type: Application
    Filed: February 10, 2015
    Publication date: June 25, 2015
    Inventors: Jay-Bok CHOI, Jiyoung KIM, Hyun-Woo CHUNG, Sungkwan CHOI, Yoosang HWANG
  • Publication number: 20150145088
    Abstract: A method of fabricating an image sensor is provided. The method may include preparing a substrate with first to third pixel regions, coating a first color filter layer on the substrate, sequentially forming a first sacrificial layer and a first protection layer to cover the first color filter layer, forming a first photoresist pattern on the first protection layer to be overlapped with the first pixel region, performing a first dry etching process using the first photoresist pattern as an etch mask to the first sacrificial layer and the first protection layer to form a first color filter, a first sacrificial pattern, and a first protection pattern sequentially stacked on the first pixel region, and selectively removing the first sacrificial pattern to separate the first protection pattern from the first color filter.
    Type: Application
    Filed: November 26, 2014
    Publication date: May 28, 2015
    Inventors: Sungkwan Kim, Soo-Kyung Kim, Jung-kuk Park, Myung-Sun Kim, Jaesung Yun, Junetaeg Lee, Hakyu Choi
  • Patent number: 8987111
    Abstract: According to a method of fabricating a semiconductor device, a first mask pattern is used to etch first device isolation layers and active lines or form grooves, in which word lines will be provided. Thereafter, the active lines are etched in a self-alignment manner by using the first mask pattern as an etch mask. As a result, it is possible to suppress mask misalignment from occurring.
    Type: Grant
    Filed: March 8, 2013
    Date of Patent: March 24, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jay-Bok Choi, Jiyoung Kim, Hyun-Woo Chung, Sungkwan Choi, Yoosang Hwang