Patents by Inventor Sungkwan An
Sungkwan An has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240063243Abstract: An image sensor includes a substrate including a pixel array region and an optical black region surrounding the pixel array region, a micro lens over the pixel array region, a dummy lens over the optical black region, and a blocking bar over the optical black region. A length of the blocking bar is greater than a length of the micro lens and a length of the dummy lens. A top surface of the blocking bar is curved.Type: ApplicationFiled: April 13, 2023Publication date: February 22, 2024Applicant: Samsung Electronics Co., Ltd.Inventors: Juyeon IM, Sungkwan Kim, Junetaeg Lee, Doojin Kim, Minwook Jung
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Publication number: 20230010549Abstract: An electronic device is provided. The electronic device includes a housing including a conductive part, a device substrate disposed in an inner space of the housing, an antenna structure, disposed in the inner space to form a directional beam and including a substrate, an array antenna including a plurality of antenna elements disposed on the substrate and a support bracket to support the substrate, an electrical connection member connecting the substrate to the device substrate, a conductive contact connecting the electrical connection member to the conductive part, a first wireless communication circuit disposed in the inner space and configured to transmit or receive a first wireless signal in a first frequency band through the antenna structure, and a second wireless communication circuit disposed on the device substrate and configured to transmit or receive a second wireless signal in a second frequency band through the conductive part.Type: ApplicationFiled: June 21, 2022Publication date: January 12, 2023Inventors: Namwoo KIM, Sungkwan PARK, Jeongho KANG, Changi PARK, Seunggil JEON, Hyunchul HONG
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Publication number: 20220359596Abstract: An image sensor is provided. The image sensor includes: a substrate including a pixel array zone; a microlens layer on the substrate in the pixel array zone; a first passivation layer on the microlens layer; and a second passivation layer on the first passivation layer, wherein the microlens layer includes: a first lens pattern; a second lens pattern at a side of the first lens pattern; and a first point where the first lens pattern meets the second lens pattern, and at least one of the first passivation layer and the second passivation layer is on the first lens pattern, the second lens pattern, and the first point.Type: ApplicationFiled: April 13, 2022Publication date: November 10, 2022Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Doojin KIM, Junetaeg LEE, Sungkwan Kim, Seokha LEE
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Publication number: 20220175127Abstract: A skin care device according to an embodiment of the present disclosure includes a brush module mounting part on which a brush module having a brush fixed thereto is mounted, a vibration motor configured to vibrate the brush module mounting part and the brush module in one direction, a rotating shaft formed in the one direction and configured to be fastened to the brush module mounting part, a rotating motor configured to be connected to the rotating shaft, a mounting detection sensor configured to be obtain a sensing value related to a mounting of the brush module, and a controller configured to detect a type of the mounted brush module on the basis of the sensing value and control driving of at least one of the vibration motor and the rotating motor according to a detected type.Type: ApplicationFiled: March 20, 2019Publication date: June 9, 2022Applicant: LG ELECTRONICS INC.Inventor: Sungkwan SEO
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Patent number: 11348646Abstract: An operation method of a memory system may include monitoring the size of a programmable area included in each of a plurality of open blocks in which a plurality of data having different attributes are stored, respectively, and generating a first free block by performing a first erase operation on a part of a plurality of erase target blocks based on the number of first open blocks, each open block of which the programmable area has a size less than a threshold value, among the plurality of open blocks.Type: GrantFiled: July 2, 2020Date of Patent: May 31, 2022Assignee: SK hynix Inc.Inventors: Jooyoung Lee, Kyumin Lee, Changhan Kim, Sungkwan Hong
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Publication number: 20210202008Abstract: An operation method of a memory system may include monitoring the size of a programmable area included in each of a plurality of open blocks in which a plurality of data having different attributes are stored, respectively, and generating a first free block by performing a first erase operation on a part of a plurality of erase target blocks based on the number of first open blocks, each open block of which the programmable area has a size less than a threshold value, among the plurality of open blocks.Type: ApplicationFiled: July 2, 2020Publication date: July 1, 2021Inventors: Jooyoung Lee, Kyumin Lee, Changhan Kim, Sungkwan Hong
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Patent number: 11004976Abstract: A semiconductor device has a silicide source/drain region is fabricated by growing silicon on an epitaxial region including silicon and either germanium or carbon. In the method, a gate electrode is formed on a semiconductor substrate with a gate insulating layer interposed therebetween. An epitaxial layer is formed in the semiconductor substrate at both sides of the gate electrodes. A silicon layer is formed to cap the epitaxial layer. The silicon layer and a metal material are reacted to form a silicide layer. In a PMOS, the epitaxial layer has a top surface and inclined side surfaces that are exposed above the upper surface of the active region. The silicon layer is grown on the epitaxial layer in such a way as to cap the top and inclined surfaces.Type: GrantFiled: March 12, 2019Date of Patent: May 11, 2021Assignee: Samsung Electronics Co., Ltd.Inventors: Sungkwan Kang, Keum Seok Park, Byeongchan Lee, Sangbom Kang, Nam-Kyu Kim
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Publication number: 20190214498Abstract: A semiconductor device has a silicide source/drain region is fabricated by growing silicon on an epitaxial region including silicon and either germanium or carbon. In the method, a gate electrode is formed on a semiconductor substrate with a gate insulating layer interposed therebetween. An epitaxial layer is formed in the semiconductor substrate at both sides of the gate electrodes. A silicon layer is formed to cap the epitaxial layer. The silicon layer and a metal material are reacted to form a silicide layer. In a PMOS, the epitaxial layer has a top surface and inclined side surfaces that are exposed above the upper surface of the active region. The silicon layer is grown on the epitaxial layer in such a way as to cap the top and inclined surfaces.Type: ApplicationFiled: March 12, 2019Publication date: July 11, 2019Inventors: Sungkwan Kang, Keum Seok Park, Byeongchan Lee, Sangbom Kang, Nam-Kyu Kim
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Patent number: 10263109Abstract: A semiconductor device has a silicide source/drain region is fabricated by growing silicon on an epitaxial region including silicon and either germanium or carbon. In the method, a gate electrode is formed on a semiconductor substrate with a gate insulating layer interposed therebetween. An epitaxial layer is formed in the semiconductor substrate at both sides of the gate electrodes. A silicon layer is formed to cap the epitaxial layer. The silicon layer and a metal material are reacted to form a silicide layer. In a PMOS, the epitaxial layer has a top surface and inclined side surfaces that are exposed above the upper surface of the active region. The silicon layer is grown on the epitaxial layer in such a way as to cap the top and inclined surfaces.Type: GrantFiled: January 14, 2016Date of Patent: April 16, 2019Assignee: Samsung Electronics Co., Ltd.Inventors: Sungkwan Kang, Keum Seok Park, Byeongchan Lee, Sangbom Kang, Nam-Kyu Kim
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Patent number: 10170622Abstract: A semiconductor device has a silicide source/drain region is fabricated by growing silicon on an epitaxial region including silicon and either germanium or carbon. In the method, a gate electrode is formed on a semiconductor substrate with a gate insulating layer interposed therebetween. An epitaxial layer is formed in the semiconductor substrate at both sides of the gate electrodes. A silicon layer is formed to cap the epitaxial layer. The silicon layer and a metal material are reacted to form a silicide layer. In a PMOS, the epitaxial layer has a top surface and inclined side surfaces that are exposed above the upper surface of the active region. The silicon layer is grown on the epitaxial layer in such a way as to cap the top and inclined surfaces.Type: GrantFiled: June 12, 2017Date of Patent: January 1, 2019Assignee: Samsung Electronics Co., Ltd.Inventors: Sungkwan Kang, Keum Seok Park, Byeongchan Lee, Sangbom Kang, Nam-Kyu Kim
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Patent number: 9806910Abstract: Disclosed herein is a gateway device including a communication interface provided with a plurality of channels capable of connecting to an external device; a switch unit configured to determine a connection state between the plurality of channels; and a controller configured to group a Controller Area Network (CAN) signal, which is received from a first external device connected to a first channel among the plurality of channels, into a message frame, and when an identifier of the message frame is included in a pre-determined high-speed transmission identifier group, configured to control the switch unit so that a second channel to which a second external device corresponding to the identifier is connected, is connected to the first channel.Type: GrantFiled: October 21, 2015Date of Patent: October 31, 2017Assignee: Hyundai Motor CompanyInventors: Jungnan Ryu, SungKwan Choo, Joon Ho Lee
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Publication number: 20170278967Abstract: A semiconductor device has a silicide source/drain region is fabricated by growing silicon on an epitaxial region including silicon and either germanium or carbon. In the method, a gate electrode is formed on a semiconductor substrate with a gate insulating layer interposed therebetween. An epitaxial layer is formed in the semiconductor substrate at both sides of the gate electrodes. A silicon layer is formed to cap the epitaxial layer. The silicon layer and a metal material are reacted to form a silicide layer. In a PMOS, the epitaxial layer has a top surface and inclined side surfaces that are exposed above the upper surface of the active region. The silicon layer is grown on the epitaxial layer in such a way as to cap the top and inclined surfaces.Type: ApplicationFiled: June 12, 2017Publication date: September 28, 2017Inventors: Sungkwan Kang, Keum Seok Park, Byeongchan Lee, Sangbom Kang, Nam-Kyu Kim
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Patent number: 9760795Abstract: A method for extracting features from an image for use in a computing device, the method comprising: producing Gaussian Scale Space (GSS) images in the type of a pyramid from the image inputted to the computing device; performing a Scale Normalized Laplacian Filtering on the GSS images; detecting interest points from the images that are subject to the Scale Normalized Laplacian Filtering; and extracting features of the image using the detected interest points.Type: GrantFiled: April 29, 2014Date of Patent: September 12, 2017Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Seungjae Lee, Sangil Na, Keun Dong Lee, Sungkwan Je, Da-Un Jung, Weon Geun Oh, Young Ho Suh, Wookho Son
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Publication number: 20160381679Abstract: Disclosed herein is a gateway device including a communication interface provided with a plurality of channels capable of connecting to an external device; a switch unit configured to determine a connection state between the plurality of channels; and a controller configured to group a Controller Area Network (CAN) signal, which is received from a first external device connected to a first channel among the plurality of channels, into a message frame, and when an identifier of the message frame is included in a pre-determined high-speed transmission identifier group, configured to control the switch unit so that a second channel to which a second external device corresponding to the identifier is connected, is connected to the first channel.Type: ApplicationFiled: October 21, 2015Publication date: December 29, 2016Inventors: Jungnan Ryu, SungKwan Choo, Joon Ho Lee
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Publication number: 20160275124Abstract: Provided is a visual search system. The visual search system according to an embodiment of the inventive concept may include a database that stores characteristic information for a visual search, and a visual search update server that updates the DB based on an image of a target captured by a moving object or a fixed object. According to an embodiment of the inventive concept, it is possible to efficiently update a DB for a visual search because images captured by not only the moving object but also the fixed object are used.Type: ApplicationFiled: March 18, 2016Publication date: September 22, 2016Inventors: Seungjae LEE, Keun Dong LEE, Weon Geun OH, DA-UN JUNG, Sungkwan JE
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Patent number: 9449677Abstract: A semiconductor device may include a semiconductor substrate with first and second spaced apart source/drain regions defining a channel region therebetween and a control gate structure on the channel region between the first and second spaced apart source/drain regions. More particularly, the control gate structure may include a first gate electrode on the channel region adjacent the first source/drain region, and a second gate electrode on the channel region adjacent the second source/drain region. Moreover, the first and second gate electrodes may be electrically isolated. Related devices, structures, methods of operation, and methods of fabrication are also discussed.Type: GrantFiled: November 10, 2014Date of Patent: September 20, 2016Assignee: Samsung Electronics Co., Ltd.Inventors: Jiyoung Kim, Yongchul Oh, Dongsoo Woo, Hyun-Woo Chung, Gyoyoung Jin, Sungkwan Choi, Hyeongsun Hong, Yoosang Hwang
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Publication number: 20160133748Abstract: A semiconductor device has a silicide source/drain region is fabricated by growing silicon on an epitaxial region including silicon and either germanium or carbon. In the method, a gate electrode is formed on a semiconductor substrate with a gate insulating layer interposed therebetween. An epitaxial layer is formed in the semiconductor substrate at both sides of the gate electrodes. A silicon layer is formed to cap the epitaxial layer. The silicon layer and a metal material are reacted to form a silicide layer. In a PMOS, the epitaxial layer has a top surface and inclined side surfaces that are exposed above the upper surface of the active region. The silicon layer is grown on the epitaxial layer in such a way as to cap the top and inclined surfaces.Type: ApplicationFiled: January 14, 2016Publication date: May 12, 2016Inventors: Sungkwan Kang, Keum Seok Park, Byeongchan Lee, Sangbom Kang, Nam-Kyu Kim
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Patent number: 9263495Abstract: A method of fabricating an image sensor is provided. The method may include preparing a substrate with first to third pixel regions, coating a first color filter layer on the substrate, sequentially forming a first sacrificial layer and a first protection layer to cover the first color filter layer, forming a first photoresist pattern on the first protection layer to be overlapped with the first pixel region, performing a first dry etching process using the first photoresist pattern as an etch mask to the first sacrificial layer and the first protection layer to form a first color filter, a first sacrificial pattern, and a first protection pattern sequentially stacked on the first pixel region, and selectively removing the first sacrificial pattern to separate the first protection pattern from the first color filter.Type: GrantFiled: November 26, 2014Date of Patent: February 16, 2016Assignee: Samsung Electronics Co., Ltd.Inventors: Sungkwan Kim, Soo-Kyung Kim, Jung-kuk Park, Myung-Sun Kim, Jaesung Yun, Junetaeg Lee, Hakyu Choi
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Patent number: 9209241Abstract: Semiconductor devices are provided. Each of the semiconductor devices may include a substrate including an active region that includes first and second regions. Each of the semiconductor devices may include a device isolation layer between the first and second regions of the active region. Each of the semiconductor devices may include a contact hole defined by recessed portions of the device isolation layer and the first region of the active region, respectively. Moreover, a topmost surface of the first region of the active region may define a bottommost portion of the contact hole. Related methods of forming semiconductor devices are also provided.Type: GrantFiled: October 22, 2013Date of Patent: December 8, 2015Assignee: Samsung Electronics Co., Ltd.Inventors: Bongsoo Kim, Junghwan Park, Sungkwan Choi, Kyuhyun Lee, HyeongSun Hong, Yoosang Hwang
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Patent number: 9176584Abstract: A haptic device for human/computer interface includes a user interface tool coupled via cables to first, second, third, and fourth cable control units, each positioned at a vertex of a tetrahedron. Each of the cable control units includes a spool and an encoder configured to provide a signal corresponding to rotation of the respective spool. The cables are wound onto the spool of a respective one of the cable control units. The encoders provide signals corresponding to rotation of the respective spools to track the length of each cable. As the cables wind onto the spools, variations in spool diameter are compensated for. The absolute length of each cable is determined during initialization by retracting each cable In turn to a zero length position. A sensor array coupled to the tool detects rotation around one or more axes.Type: GrantFiled: October 13, 2011Date of Patent: November 3, 2015Inventors: Jeffrey J. Berkley, Seahak Kim, Sungkwan Hong