Abstract: A semiconductor device includes a semiconductor substrate including first trenches defining outer sidewalls of a pair of active pillars and a second trench defining opposing inner sidewalls of the pair of active pillars. The second trench may have a bottom surface located at a higher level than bottom surface of the first trench. Auxiliary conductive lines may be disposed in the first trenches to cover and cross the outer sidewalls of the pair of active pillars. A pair of main conductive lines may be disposed in a pair of recessed regions that are laterally recessed from lower portions of the inner sidewalls of the active pillars into the pair of active pillars. A common impurity region may be disposed in the semiconductor substrate under the second trench. Upper impurity regions may be disposed in upper portions of the active pillars.

Abstract: A method for extracting features from an image for use in a computing device, the method comprising: producing Gaussian Scale Space (GSS) images in the type of a pyramid from the image inputted to the computing device; performing a Scale Normalized Laplacian Filtering on the GSS images; detecting interest points from the images that are subject to the Scale Normalized Laplacian Filtering; and extracting features of the image using the detected interest points.

Abstract: According to a method of fabricating a semiconductor device, a first mask pattern is used to etch first device isolation layers and active lines or form grooves, in which word lines will be provided. Thereafter, the active lines are etched in a self-alignment manner by using the first mask pattern as an etch mask. As a result, it is possible to suppress mask misalignment from occurring.

Abstract: A method of fabricating an image sensor is provided. The method may include preparing a substrate with first to third pixel regions, coating a first color filter layer on the substrate, sequentially forming a first sacrificial layer and a first protection layer to cover the first color filter layer, forming a first photoresist pattern on the first protection layer to be overlapped with the first pixel region, performing a first dry etching process using the first photoresist pattern as an etch mask to the first sacrificial layer and the first protection layer to form a first color filter, a first sacrificial pattern, and a first protection pattern sequentially stacked on the first pixel region, and selectively removing the first sacrificial pattern to separate the first protection pattern from the first color filter.

Abstract: According to a method of fabricating a semiconductor device, a first mask pattern is used to etch first device isolation layers and active lines or form grooves, in which word lines will be provided. Thereafter, the active lines are etched in a self-alignment manner by using the first mask pattern as an etch mask. As a result, it is possible to suppress mask misalignment from occurring.

Abstract: A semiconductor device may include a semiconductor substrate with first and second spaced apart source/drain regions defining a channel region therebetween and a control gate structure on the channel region between the first and second spaced apart source/drain regions. More particularly, the control gate structure may include a first gate electrode on the channel region adjacent the first source/drain region, and a second gate electrode on the channel region adjacent the second source/drain region. Moreover, the first and second gate electrodes may be electrically isolated. Related devices, structures, methods of operation, and methods of fabrication are also discussed.

Abstract: A semiconductor device has a silicide source/drain region is fabricated by growing silicon on an epitaxial region including silicon and either germanium or carbon. In the method, a gate electrode is formed on a semiconductor substrate with a gate insulating layer interposed therebetween. An epitaxial layer is formed in the semiconductor substrate at both sides of the gate electrodes. A silicon layer is formed to cap the epitaxial layer. The silicon layer and a metal material are reacted to form a silicide layer. In a PMOS, the epitaxial layer has a top surface and inclined side surfaces that are exposed above the upper surface of the active region. The silicon layer is grown on the epitaxial layer in such a way as to cap the top and inclined surfaces.

Abstract: A semiconductor device includes a semiconductor substrate, a gate electrode structure including a gate electrode located on an active region of the semiconductor substrate, first and second epitaxial regions located in the active region at opposite sides of the gate electrode structure, and first and second silicide layers on upper surfaces of the first and second epitaxial regions, respectively. The first and second epitaxial regions include Si—X, where X is one of germanium and carbon, and at least a portion of each of the first and second silicide layers is devoid of X and includes Si—Y, where Y is a metal or metal alloy.

Abstract: Semiconductor devices are provided. Each of the semiconductor devices may include a substrate including an active region that includes first and second regions. Each of the semiconductor devices may include a device isolation layer between the first and second regions of the active region. Each of the semiconductor devices may include a contact hole defined by recessed portions of the device isolation layer and the first region of the active region, respectively. Moreover, a topmost surface of the first region of the active region may define a bottommost portion of the contact hole. Related methods of forming semiconductor devices are also provided.

Abstract: According to a method of fabricating a semiconductor device, a first mask pattern is used to etch first device isolation layers and active lines or form grooves, in which word lines will be provided. Thereafter, the active lines are etched in a self-alignment manner by using the first mask pattern as an etch mask. As a result, it is possible to suppress mask misalignment from occurring.

Abstract: The present invention relates to a new use of Hades as a tumor suppressor target, more particularly to a composition for suppressing tumor comprising an expression or action inhibitor of Hades protein having an amino acid sequence of SEQ ID NO: 2 as an effective ingredient. The present inventors have found that the overexpressed Hades protein interacts with p53 to inhibit the exonuclear mechanism of p53 and the knowdown of Hades induces increase in the expression of p53, demonstrating that Hades is a negative regulator to p53. Therefore, it would be understood that the inhibition of Hades overexpressed in tumor cells contributes to tumor-supressive effects of p53. The drug candidates capable of modulating the expression of the Hades protein, inhibiting the actions of the Hades protein or inhibiting interecation between Hades and p53 are considered a promising anticancer drug.

Abstract: A semiconductor device includes a semiconductor substrate including first trenches defining outer sidewalls of a pair of active pillars and a second trench defining opposing inner sidewalls of the pair of active pillars. The second trench may have a bottom surface located at a higher level than bottom surface of the first trench. Auxiliary conductive lines may be disposed in the first trenches to cover and cross the outer sidewalls of the pair of active pillars. A pair of main conductive lines may be disposed in a pair of recessed regions that are laterally recessed from lower portions of the inner sidewalls of the active pillars into the pair of active pillars. A common impurity region may be disposed in the semiconductor substrate under the second trench. Upper impurity regions may be disposed in upper portions of the active pillars.

Abstract: A method and apparatus for updating firmware of a mobile device based on the result of verification of integrities of a plurality of update files is provided. The firmware update method includes downloading a plurality of update files corresponding to the firmware and checksums corresponding to each of the update files in a user data storage region upon detecting a firmware update event; verifying whether each of the update files is valid; and updating the firmware using at least one valid update file from among the plurality of update files.

Abstract: A semiconductor device includes a semiconductor substrate, a gate electrode structure including a gate electrode located on an active region of the semiconductor substrate, first and second epitaxial regions located in the active region at opposite sides of the gate electrode structure, and first and second silicide layers on upper surfaces of the first and second epitaxial regions, respectively.

Abstract: A haptic device for human/computer interface includes a user interface tool coupled via cables to first, second, third, and fourth cable control units, each positioned at a vertex of a tetrahedron. Each of the cable control units includes a spool and an encoder configured to provide a signal corresponding to rotation of the respective spool. The cables are wound onto the spool of a respective one of the cable control units. The encoders provide signals corresponding to rotation of the respective spools to track the length of each cable. As the cables wind onto the spools, variations in spool diameter are compensated for. The absolute length of each cable is determined during initialization by retracting each cable In turn to a zero length position. A sensor array coupled to the tool detects rotation around one or more axes.

Abstract: A haptic device for human/computer interface includes a user interface tool coupled via cables to first, second, third, and fourth cable control units, each positioned at a vertex of a tetrahedron. Each of the cable control units includes a spool and an encoder configured to provide a signal corresponding to rotation of the respective spool. The cables are wound onto the spool of a respective one of the cable control units. The encoders provide signals corresponding to rotation of the respective spools to track the length of each cable. As the cables wind onto the spools, variations in spool diameter are compensated for. The absolute length of each cable is determined during initialization by retracting each cable In turn to a zero length position. A sensor array coupled to the tool detects rotation around one or more axes.

Abstract: A haptic device for human/computer interface includes a user interface tool coupled via cables to first, second, third, and fourth cable control units, each positioned at a vertex of a tetrahedron. Each of the cable control units includes a spool and an encoder configured to provide a signal corresponding to rotation of the respective spool. The cables are wound onto the spool of a respective one of the cable control units. The encoders provide signals corresponding to rotation of the respective spools to track the length of each cable. As the cables wind onto the spools, variations in spool diameter are compensated for. The absolute length of each cable is determined during initialization by retracting each cable In turn to a zero length position. A sensor array coupled to the tool detects rotation around one or more axes.

Abstract: A method for retrieving an image based on a region of interest (ROI) includes: requesting an image retrieval server to retrieve candidate images corresponding to a query in a mobile communication terminal; retrieving the candidate images corresponding to the query in the image retrieval server to transmit the candidate images to the mobile communication terminal; designating an ROI on one of the received candidate images in the mobile communication terminal; converting the designated ROI image into a descriptor to request the image retrieval server to retrieve ROI-based images corresponding to the descriptor; retrieving the ROI-based images in the image retrieval server to transmit the ROI-based images to the mobile communication terminal; and displaying an image selected by a user among the transmitted ROI-based images in the mobile communication terminal.

Abstract: A method of fabricating a multilevel semiconductor integrated circuit is provided, comprising: forming on a first active semiconductor structure a first plurality of transistors with respective gate structures disposed on a first substrate and source or drain regions disposed within the first substrate; depositing a first insulation layer on the first substrate and the gate structures; etching the insulation layer to form a plurality of openings exposing portions of the first substrate contacting the bottoms of the openings; forming a semiconductor seed layer filling the openings; forming an amorphous layer on the seed layer and the insulation layer; subjecting the first active semiconductor structure to at least one application of laser irradiation to transform the amorphous layer to a crystalline semiconductor layer having a protrusion region with a peak at or near the middle of two adjacent openings; forming on a second active semiconductor structure a second plurality of transistors with respective gate s

Abstract: In some methods of fabricating a silicon-on-insulator substrate, a semiconductor substrate is provided that includes a single crystalline structure within at least a defined region thereof. A first insulating film is formed on the defined region of the semiconductor substrate with an opening that exposes a portion of the defined region of the semiconductor substrate having the single crystalline structure. A first non-single crystalline film is formed on the exposed portion of the semiconductor substrate and that at least substantially fills the opening in the first insulating film. A laser beam is generated that heats the first non-single crystalline film to change the first non-single crystalline film into a first single crystalline film having substantially the same single crystalline structure as the defined region of the semiconductor substrate.