Patents by Inventor Sung Kyu Kim

Sung Kyu Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250206182
    Abstract: A vehicle to building (V2B) charge/discharge scheduling method can include inputting input data including at least one of electric vehicle information related to battery charging and discharging of electric vehicles, building information related to power use of a building, and electric vehicle supply equipment (EVSE) information related to EVSEs connected to the electric vehicles and charging and discharging a battery; setting a scheduling model using the input data and an objective function; outputting optimization data using the scheduling model; and performing charge/discharge scheduling of the electric vehicles using the optimization data, wherein the setting a scheduling model includes setting the scheduling model using mixed-integer linear programming (MILP) if a number of electric vehicles is not greater than a number of EVSEs; and setting the scheduling model using mixed-integer quadratic programming (MIQP) if the number of electric vehicles is greater than the number of EVSEs.
    Type: Application
    Filed: July 18, 2024
    Publication date: June 26, 2025
    Inventors: Dae Gun Ko, Hyun Sup Kim, Kyoung Joo Kim, Min Kyu Lee, Jeong Hoon Choi, Bum Su Park, Hye Seung Han, Sung Kyu Kim, Jae Yun Jung
  • Publication number: 20250200524
    Abstract: An electric vehicle charging and discharging scheduling method can include setting a scheduling model based on a constraint function and an objective function considering a contract for difference, smart charging, a plus demand response (DR), and a national DR, optimizing the set scheduling model, and performing electric vehicle charging and discharging scheduling using the optimized scheduling model. The constraint function can include a function for at least one of restrictions on charging/discharging for each electric vehicle. The objective function can include a regular scheduling function considering the contract for difference and the plus DR market, and an irregular scheduling function considering the contract for difference, the plus DR market, and a national DR market.
    Type: Application
    Filed: July 24, 2024
    Publication date: June 19, 2025
    Inventors: Jeong Hoon Choi, Hyun Sup Kim, Kyoung Joo Kim, Min Kyu Lee, Bum Su Park, Dae Gun Ko, Hye Seung Han, Sung Kyu Kim, Jae Yun Jung
  • Publication number: 20250196629
    Abstract: A driving apparatus for a four-wheel drive electric vehicle, torque output from a motor is reduced by a reducer and driving torque is transmitted to both wheels through a differential while compensating for the difference in rotation speed, the driving apparatus includes a first disconnector that transmits or blocks torque output from the reducer to the two wheels, and a second disconnector configured inside the reducer to selectively output or block the torque of the motor selectively shifted to two speeds by the reducer.
    Type: Application
    Filed: December 5, 2024
    Publication date: June 19, 2025
    Applicants: Hyundai Motor Company, Kia Corporation
    Inventors: Jongyun PARK, Sangjin PARK, Sung Kyu KIM, Chonok KIM
  • Patent number: 12327779
    Abstract: A semiconductor chip may include: a body portion with a front surface and a rear surface; a pair of through electrodes penetrating the body portion; an insulating layer disposed over the rear surface of the body portion and the pair of through electrodes; and a rear connection electrode disposed over the insulating layer and connected simultaneously with the pair of through electrodes, wherein a distance between the pair of through electrodes is greater than twice a thickness of the insulating layer.
    Type: Grant
    Filed: October 18, 2023
    Date of Patent: June 10, 2025
    Assignee: SK hynix Inc.
    Inventors: Ho Young Son, Sung Kyu Kim, Mi Seon Lee
  • Publication number: 20250167123
    Abstract: A semiconductor die includes interlayer insulating layer, a signal horizontal metal interconnection and a power horizontal metal interconnection, a front-side passivation layer, a signal front-side bump structure and a power front-side bump structure, a signal vertical via plug, and a power vertical via plug over a front-side of a substrate; and a back-side insulating layer, a back-side metal plate layer, a back-side passivation layer, a signal back-side bump structure and a power back-side bump structure, a signal through-electrode, and a power through-electrode over a back-side of the substrate. Upper ends of the signal through-electrode and the power through-electrode protrude from the back-side surface of the substrate. The back-side metal plate layer is not to be electrically connected to the signal through-electrode. The back-side metal plate layer is electrically connected to the power bump structure.
    Type: Application
    Filed: January 23, 2025
    Publication date: May 22, 2025
    Applicant: SK hynix Inc.
    Inventors: Jae Jun LEE, Sung Kyu KIM, Jong Yeon KIM, Ki Ill MOON, Ju Heon YANG, BEOLI OK
  • Publication number: 20250160031
    Abstract: Various aspects of the present disclosure provide a semiconductor device, for example comprising a finger print sensor, and a method for manufacturing thereof. Various aspects of the present disclosure may, for example, provide an ultra-slim finger print sensor having a thickness of 500 ?m or less that does not include a separate printed circuit board (PCB), and a method for manufacturing thereof.
    Type: Application
    Filed: January 16, 2025
    Publication date: May 15, 2025
    Inventors: Jin Young Kim, No Sun Park, Yoon Joo Kim, Seung Jae Lee, Se Woong Cha, Sung Kyu Kim, Ju Hoon Yoon
  • Patent number: 12255126
    Abstract: There are provided a semiconductor and a method of fabricating the same. The semiconductor device may include a second semiconductor substrate directly bonded to a first semiconductor substrate. The first semiconductor substrate may include a first through via with an end portion protruding through a first top surface, the first top surface being a top surface of a first semiconductor substrate body, a liner extending to partially expose a side surface of the end portion of the first through via, and a first diffusion barrier layer. The liner may include a third top surface that is positioned at a lower height than a second top surface, the second top surface being a top surface of the end portion of the first through via and substantially equal to the first top surface. Alternatively, the liner may include a third surface positioned at a height that is lower than the second top surface and higher than the first top surface.
    Type: Grant
    Filed: March 8, 2022
    Date of Patent: March 18, 2025
    Assignee: SK hynix Inc.
    Inventors: Mi Seon Lee, Sung Kyu Kim, Jong Hoon Kim
  • Publication number: 20250084517
    Abstract: The present invention relates to a steel sheet for use in automobiles, etc., and to a steel sheet that has high strength and high formability and is superb in terms of spot weldability, and a manufacturing method therefor.
    Type: Application
    Filed: December 19, 2022
    Publication date: March 13, 2025
    Applicant: POSCO CO., LTD
    Inventors: Sung-Kyu Kim, Tae-Kyo Han, Jun-Ho Park, Kyoung-Rae Cho, Sang-Ho Han
  • Patent number: 12230661
    Abstract: Various aspects of the present disclosure provide a semiconductor device, for example comprising a finger print sensor, and a method for manufacturing thereof. Various aspects of the present disclosure may, for example, provide an ultra-slim finger print sensor having a thickness of 500 ?m or less that does not include a separate printed circuit board (PCB), and a method for manufacturing thereof.
    Type: Grant
    Filed: April 12, 2024
    Date of Patent: February 18, 2025
    Assignee: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Jin Young Kim, No Sun Park, Yoon Joo Kim, Seung Jae Lee, Se Woong Cha, Sung Kyu Kim, Ju Hoon Yoon
  • Patent number: 12221680
    Abstract: The cryogenic austenitic high-manganese steel having excellent corrosion resistance, according to one aspect of the present invention, comprises 0.2-0.5 wt % of C, 23-28 wt % of Mn, 0.05-0.5 wt % of Si, 0.03 wt % or less of P, 0.005 wt % or less of S, 0.5 wt % or less of Al, and 3-4 wt % of Cr, with the remainder being Fe and other unavoidable impurities, also comprises at least 95 area % of austenite as a microstructure, and has Cr concentration sections continuously formed within an area of 50 ?m in the thickness direction from the surface, wherein the Cr concentration sections comprise a high Cr concentration section having a relatively high concentration of Cr, and a low Cr concentration section having a relatively low concentration of Cr, and the high Cr concentration section may be distributed at 30 area % or less (but not 0%) relative to the whole surface area of the Cr sections.
    Type: Grant
    Filed: October 25, 2019
    Date of Patent: February 11, 2025
    Assignee: POSCO CO., LTD
    Inventors: Un-Hae Lee, Dong-Ho Lee, Sang-Deok Kang, Sung-Kyu Kim
  • Publication number: 20250022869
    Abstract: A method of manufacturing a semiconductor die stack structure includes: preparing a base die including a base die substrate and a base die inter-layer dielectric layer; forming a base die front-side bonding pad structure; preparing a bottom die having a bottom die substrate and bottom die through-electrode; forming a bottom die front-side bonding pad structure in the bottom die substrate; forming a base-bottom die stack structure where the bottom die front-side bonding pad structure is directly in contact with the base die front-side; forming a base die through-electrode vertically passing through the base die substrate and electrically connected to the base die front-side bonding pad structure; forming a base die back-side bump structure electrically connected to the base die through-electrode; stacking middle dies and a top die in the base-bottom die stack structure; and forming a bottom die back-side bump structure electrically connected to the bottom die through-electrode.
    Type: Application
    Filed: December 7, 2023
    Publication date: January 16, 2025
    Applicant: SK hynix Inc.
    Inventors: Sung Kyu KIM, Jong Yeon KIM, Ki Ill MOON, Sang Yong LEE, Gyu Jei LEE
  • Publication number: 20240401164
    Abstract: The present invention relates to steel suitable as a material for an automotive structural member and particularly, to a high-strength and thick steel sheet having a low yield ratio and high strength, excellent formability and collision resistance due to excellent hole expandability through improved ductility, and a method thereof.
    Type: Application
    Filed: September 21, 2022
    Publication date: December 5, 2024
    Applicant: POSCO CO., LTD
    Inventors: Kyoung-Rae Cho, Sung-Kyu Kim, Jun-Ho Park, Sang-Ho Han, Jeong-Hun Kim
  • Publication number: 20240395746
    Abstract: In an embodiment, a semiconductor die includes a substrate, an interlayer insulating layer under a front-side surface the substrate, a horizontal metal interconnection in the interlayer insulating layer, a front-side pad under a lower surface of the interlayer insulating layer, a front-side bump structure under a lower surface of the front-side pad, a through-electrode vertically passing through the substrate, a back-side insulating layer over the back-side surface of the substrate, a first back-side metal plate layer over the back-side insulating layer, a back-side passivation layer over the back-side insulating layer and covering the first back-side metal plate layer, and a back-side bump structure over the through-electrode and the back-side passivation layer.
    Type: Application
    Filed: October 30, 2023
    Publication date: November 28, 2024
    Applicant: SK hynix Inc.
    Inventors: Jae Jun LEE, Sung Kyu KIM, Jong Yeon KIM, Ki Ill MOON, Mi Seon LEE
  • Publication number: 20240347575
    Abstract: Various aspects of the present disclosure provide a semiconductor device, for example comprising a finger print sensor, and a method for manufacturing thereof. Various aspects of the present disclosure may, for example, provide an ultra-slim finger print sensor having a thickness of 500 ?m or less that does not include a separate printed circuit board (PCB), and a method for manufacturing thereof.
    Type: Application
    Filed: April 12, 2024
    Publication date: October 17, 2024
    Inventors: Jin Young Kim, No Sun Park, Yoon Joo Kim, Seung Jae Lee, Se Woong Cha, Sung Kyu Kim, Ju Hoon Yoon
  • Publication number: 20240287639
    Abstract: Provided is a steel suitable as a material for automobiles and, specifically, to a high-strength steel sheet having excellent hole expandability and ductility, and a manufacturing method therefor. The high-strength steel sheet of the present invention has a microstructure comprising a hard phase and a soft phase, wherein a martensite phase, which is the hard phase, is evenly distributed in a recrystallized ferrite matrix through optimized cold-rolling and annealing processes, and a nonequilibrium (quasi-equilibrium) ferrite phase is introduced at the interface between the hard phase and the soft phase so as to increase the crack resistance during processing.
    Type: Application
    Filed: June 22, 2022
    Publication date: August 29, 2024
    Inventors: Kyoung-Rae CHO, Sung-Kyu KIM, Jun-Ho PARK, Sang-Ho HAN
  • Publication number: 20240243084
    Abstract: A wafer level fan out semiconductor device and a manufacturing method thereof are provided. A first sealing part is formed on lateral surfaces of a semiconductor die. A plurality of redistribution layers are formed on surfaces of the semiconductor die and the first sealing part, and solder balls are attached to the redistribution layers. The solder balls are arrayed on the semiconductor die and the first sealing part. In addition, a second sealing part is formed on the semiconductor die, the first sealing part and lower portions of the solder balls. The solder balls are exposed to the outside through the second sealing part. Since the first sealing part and the second sealing part are formed of materials having thermal expansion coefficients which are the same as or similar to each other, warpage occurring to the wafer level fan out semiconductor device can be suppressed.
    Type: Application
    Filed: December 21, 2023
    Publication date: July 18, 2024
    Inventors: Boo Yang Jung, Jong Sik Paek, Choon Heung Lee, In Bae Park, Sang Won Kim, Sung Kyu Kim, Sang Gyu Lee
  • Patent number: 12040308
    Abstract: A method of manufacturing a semiconductor device includes forming a first through via surrounded by a liner in a first semiconductor substrate, first-recessing the semiconductor substrate to expose a first portion of the liner covering an end portion of the first through via, and forming a first diffusion barrier layer covering the first-recessed first semiconductor substrate and exposing a second portion of the liner. The method also includes removing the second portion of the liner and second-recessing the first diffusion barrier layer. The method further includes forming a second diffusion barrier layer that covers the second-recessed first diffusion barrier layer and a top portion of the liner from which the second portion is removed and exposes a top surface of the end portion of the first through via.
    Type: Grant
    Filed: March 29, 2022
    Date of Patent: July 16, 2024
    Assignee: SK hynix Inc.
    Inventors: Jin Woong Kim, Sung Kyu Kim
  • Publication number: 20240234255
    Abstract: A semiconductor chip may include: a body portion with a front surface and a rear surface; a pair of through electrodes penetrating the body portion; an insulating layer disposed over the rear surface of the body portion and the pair of through electrodes; and a rear connection electrode disposed over the insulating layer and connected simultaneously with the pair of through electrodes, wherein a distance between the pair of through electrodes is greater than twice a thickness of the insulating layer.
    Type: Application
    Filed: March 25, 2024
    Publication date: July 11, 2024
    Applicant: SK hynix Inc.
    Inventors: Ho Young SON, Sung Kyu KIM, Mi Seon LEE
  • Publication number: 20240186291
    Abstract: A semiconductor die stack structure includes a base die, a plurality of semiconductor die stack units, and bumps. Each of the plurality of semiconductor die stack units includes a lower semiconductor die and an upper semiconductor die. Each of the lower semiconductor die and the upper semiconductor die includes a body and a front-side pad structure. The front-side pad structure includes a front-side pad seed layer and a front-side pad pattern. The front-side pad pattern includes a first front-side pad portion, a second front-side pad portion, and a third front-side pad portion. The first front-side pad portion and the second front-side pad portion forms a staircase. The first front-side pad portion and the third front-side pad form a reverse staircase. The first front-side pad portion, the second front-side pad portion, and the third front-side pad include a same metal.
    Type: Application
    Filed: July 3, 2023
    Publication date: June 6, 2024
    Applicant: SK hynix Inc.
    Inventors: Sung Kyu KIM, Jong Yeon KIM, Song NA, Sang Hyuk LIM, Jong Oh KWON, Jin Woo PARK
  • Patent number: 11961867
    Abstract: Various aspects of the present disclosure provide a semiconductor device, for example comprising a finger print sensor, and a method for manufacturing thereof. Various aspects of the present disclosure may, for example, provide an ultra-slim finger print sensor having a thickness of 500 ?m or less that does not include a separate printed circuit board (PCB), and a method for manufacturing thereof.
    Type: Grant
    Filed: June 10, 2022
    Date of Patent: April 16, 2024
    Assignee: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Jin Young Kim, No Sun Park, Yoon Joo Kim, Seung Jae Lee, Se Woong Cha, Sung Kyu Kim, Ju Hoon Yoon